JPH0348652B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a bipolar semiconductor device by self-alignment.

As is well known, the base and emitter contact holes of conventional bipolar transistors are formed by photoetching using different masks. Therefore, it is unavoidable that errors in mask alignment occur each time each photoetching process is performed, which increases the occupied area and base-collector junction capacitance, which becomes a major obstacle in increasing the speed and density of devices. Ta.

In order to solve these problems, a method has been proposed in which the emitter and base contact holes are formed in a self-aligned manner to eliminate errors caused by mask alignment and reduce the occupied area (Japanese Patent Application Laid-Open No. 1989-1999). 132275).

Although this method is extremely effective for reducing the lateral dimension of the base and improving high frequency characteristics, the distance between the base electrode extension and the emitter region is extremely small. As a result, the diffusion layer (so-called graft base) in the base contact portion tends to come into contact with the emitter layer, causing undesirable phenomena such as a decrease in current amplification factor, emitter-base resistance, and an increase in emitter-base junction capacitance. Further improvements are needed to put the method into practical use.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that solves the above-mentioned conventional problems and allows bipolar transistors with excellent characteristics to be easily formed with high precision.

Another object of the present invention is to provide a method for manufacturing a semiconductor device in which an emitter and a base contact hole can be formed in self-alignment without fear of deteriorating the characteristics of a transistor.

In order to achieve the above object, the present invention prevents a decrease in breakdown voltage and an increase in junction capacitance by giving a slope to the impurity distribution of the graft base.

The present invention will be explained in detail below.

FIG. 1 is a diagram schematically showing a cross-sectional structure of a base contact portion of a bipolar transistor formed by a conventional method, and the base contact and emitter are formed by self-alignment.

On the surface of the silicon substrate 1, a silicon dioxide film 2, a silicon nitride film 3, and a polycrystalline silicon film 4 are deposited as shown in FIG.
are uniformly formed by impurity diffusion through the polycrystalline silicon film 4.

Since the emitter region 8 and the base contact region are separated from each other by the silicon dioxide film 6 formed by oxidizing the surface of the polycrystalline silicon layer 4, the distance between the graft base and the emitter inevitably becomes small. Moreover, since the graft base 5 and the emitter 8 are formed by diffusion, it is inevitable that they each spread laterally.

As a result, as shown in FIG. 1, the graft base 5 and the emitter 8 largely overlap beyond the base 7, resulting in a decrease in current amplification factor and an increase in the emitter-base junction capacitance, resulting in a decrease in operating speed, etc. The characteristics of the device are significantly degraded.

In the present invention, as shown in FIG. 2, from a polycrystalline silicon film 4' doped with impurities such as boron,
By performing thermal diffusion through the polycrystalline silicon film 4 deposited on the graft base 5', the impurity concentration becomes lower and the thickness becomes thinner as it approaches the emitter 8. This also suppresses problems caused by the overlap of the graft base and emitter.

FIG. 3 is a process diagram showing an embodiment of the present invention. First, as shown in FIG. The substrate 1 having the n-type layer thus formed was thermally oxidized to form a silicon dioxide film 2 having a thickness of 50 nm.

Next, a well-known method is applied on the silicon dioxide film 2.
A silicon nitride film (120 nm thick) 3 and a first polycrystalline silicon film 4' 200 nm thick were laminated and deposited by CVD (chemical vapor deposition).

Using a well-known thermal diffusion method, boron is added as a P-type impurity to the first polycrystalline silicon film at 950°C.
Allowed to diffuse for 30 minutes.

Using a well-known photoetching technique, the polycrystalline silicon film 4' deposited on the portions where the base contact region and base-emitter region are to be formed was etched and removed.

At this time, after over-etching the first polycrystalline silicon film 4' to form the eaves of the photoresist film 9 as shown in FIG. Membrane 10 was applied. For the eaves of the photoresist film 9,
The aluminum film 10 was not formed as a continuous film, but was separately deposited on the photoresist film 9 and the silicon nitride film 3, respectively. It goes without saying that various metals other than aluminum, such as chromium, and non-metallic films can be used in this step.

The photoresist film 9 is removed together with the aluminum film 10 deposited thereon, and as shown in FIG. After removal by ivy etching, the aluminum film 10 deposited on the silicon nitride film 3 was removed with aqua regia.

Incidentally, in order to obtain the structure shown in FIG. 3c, in this example, the lift-off method was used as described above. However, the structure shown in Fig. 3c can also be formed by a well-known method other than the lift-off method, and it goes without saying that the present invention is not limited to the above-mentioned lift-off method.

As shown in FIG. 3d, after the second polycrystalline silicon film 4 is deposited on the entire surface, it is heated to remove impurities doped in the first polycrystalline silicon film 4'. It is diffused into the polycrystalline silicon film 4 of No. 2.

At this time, impurities were also diffused from the first polycrystalline silicon film 4' into the base contact region of the silicon substrate 1, and a graft base 5 was formed as shown in FIG. 3e. In addition, in this example, the heat treatment in this step was performed in a nitrogen atmosphere for 1000 m
The test was carried out at ℃ for 30 minutes.

Next, using an etch solution that does not easily dissolve polycrystalline silicon with a high impurity concentration (in this example, hydrazine hydrate added with alcohol and a surfactant was used to obtain a flat etched surface). Etching was carried out at 50 DEG C. to remove the portions of the second polycrystalline silicon film 4 in which high concentration impurities were not diffused in the above process, as shown in FIG. 3e.

FIG. 4 shows the impurity concentration dependence of the specific etching rate when etching was performed using the above-mentioned etching solution.

Figure 4 shows the results of measurements on the (100) plane of a single-crystal silicon substrate. When the impurity concentration exceeds approximately 10 ¹⁹ cm ^-3 , the specific etch rate begins to decrease and reaches approximately 10 ²⁰ cm ^-3. If this is the case, the specific etching rate will decrease significantly, and selective removal by etching can be easily carried out.

Although a hydrazine etch solution was used in the examples, it goes without saying that reactive sputter etch can also be used if equivalent etch characteristics can be obtained.

In addition, FIG. 5 shows that in the above thermal diffusion process,
When the heat treatment condition is 1000℃ in nitrogen atmosphere,
The results of determining the impurity diffusion rate in the second polycrystalline silicon film are shown, and it was found that if the heat treatment was performed under the above conditions for 30 minutes, the impurity diffused by approximately 0.7 μm.

As described above, in the diffusion step, the impurity is diffused not only into the second polycrystalline silicon film but also into the silicon substrate 1, thereby forming the graft base 5'. The diffusion of impurities in this substrate gradually spreads from the outside of the base contact region to the inner emitter region, so the impurity concentration gradually decreases as it approaches the emitter side, and the thickness (depth) It also becomes thinner.

As shown in FIG. 2, even if such a graft base 5' comes into contact with the emitter region 8, the actual effect is extremely small, and there is almost no reduction in breakdown voltage or increase in junction capacitance.

Therefore, there is no reduction in current amplification factor or operating speed, and a bipolar transistor with extremely excellent characteristics can be easily formed.

Note that in order to form the bipolar transistor having the structure shown in FIG. 2, after forming the graft base 5 by the process shown in FIG. 3, the surface of the second polycrystalline silicon film 4 is oxidized. The silicon dioxide film 2 and silicon nitride film 3 deposited on the emitter region are etched and removed, and the base 7 and emitter 8 are formed by known means. .

As explained above, according to the present invention, since the emitter does not come into contact with the highly concentrated graft base, a decrease in the breakdown voltage between the emitter and the base, a decrease in the current amplification factor, and an increase in the junction capacitance can be effectively prevented. Therefore, a bipolar transistor with excellent high frequency characteristics can be formed.

[Brief explanation of drawings]

1 and 2 are schematic diagrams showing the cross-sectional structures of essential parts of bipolar transistors formed according to the conventional method and the present invention, respectively, FIG. 3 is a process diagram showing an embodiment of the present invention, and FIG. The figure is a curve diagram showing the dependence of specific etch rate on impurity concentration, and FIG. 5 is a curve diagram showing the relationship between heating time and impurity diffusion distance. 1... Silicon substrate, 2, 6... Silicon dioxide film, 3... Silicon nitride film, 4, 4'... Polycrystalline silicon film, 5, 5'... Graft base, 7
...Base, 8...Emitsuta.

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device including the following steps. (1) A step of laminating and depositing a silicon dioxide film, a silicon nitride film, and a first polycrystalline silicon film containing a large amount of impurities of a second conductivity type on a semiconductor substrate having a first conductivity type. (2) removing the first polycrystalline silicon film deposited on the portion where the emitter and graft base are to be formed, and further exposing the surface of the silicon substrate in the portion where the graft base is to be formed; Process. (3) A step of depositing a second polycrystalline silicon film over the entire surface. (4) Heat treatment is performed to remove the impurities contained in the first polycrystalline silicon film into the silicon substrate through the second polycrystalline silicon film on the side of the first polysilicon film. forming a graft base in which the impurity concentration in a portion close to the emitter is lower than that in a portion far from the emitter. (5) After removing the portion of the second polycrystalline silicon film in which the impurity is not diffused, the remaining surface of the second polycrystalline silicon film is oxidized, and the exposed portion of the silicon nitride film is removed. and a step of removing the silicon dioxide film. (6) A step of forming a base and an emitter on the silicon substrate.