JPH0352263B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a signal detection method, and more particularly to a signal detection method in communication management via a communication line such as a facsimile. Currently, such receiving devices employ a tonal signal (single frequency signal) reception method or an N-value FSK signal reception method. For example, in conventional tonal signal reception systems, there are two methods in which a filter corresponding to the frequency of each tonal signal is provided and a tuning circuit such as a PLL is added at the next stage, and another method in which the tonal signal is binarized and a filter corresponding to the frequency of each tonal signal is added. Something that counts the number of binarized pulses or one of the binarized pulse train
There is a method to measure the period time. In the former case, depending on the performance of the filter and tuning circuit, it may be difficult to distinguish between two signals with close frequencies, and it is necessary to prepare as many filters as there are signals. On the other hand, the latter has a simple circuit and has sufficient frequency identification accuracy, but if it is a method that simply detects only the signal frequency, there is a risk that it will react to spurious signal components in noise (including non-standard frequencies). In addition, in the case of the N-value FSK signal reception method, a predetermined synchronization signal is detected in the output of the FSK demodulation circuit (N-value digital signal sequence) and reception of one series of data is started, but the performance of the FSK demodulation circuit If noise (including non-standard frequencies) is mixed into the received signal, normal demodulation may not be performed and the same pattern as the synchronizing signal may be output, resulting in system malfunction. The present invention has been made in view of the above points, and
The purpose of this invention is to provide a signal detection method that prevents malfunctions of a receiving system due to various noises, speech sounds, pseudo noises, etc. existing on a line, and realizes highly reliable communication management. In order to achieve this objective, the present invention provides a signal detection method for detecting whether a received signal is a significant signal to be received by detecting the frequency of the signal component and the frequency of the noise component of the received signal. , detecting the time for detecting the frequency of the received signal multiple times, and calculating the time ratio between the time when the frequency of the signal component of the received signal was detected and the time when the frequency of the noise component of the received signal was detected; The method is characterized in that the received signal is determined to be a significant signal by the time ratio. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Prior to describing embodiments of the present invention, the principle of the present invention will be explained. The present invention targets the CCITT G standard and the transmission control procedure of a system equipped with the G standard.
The tonal signal frequency is 2100Hz, 1850Hz,
5 types: 1650Hz, 1100Hz, 462Hz, FSK frequency is 1850Hz and 1650 which are common to tonal frequency
There are two types: Hz. Therefore, the regular signals handled here are the above-mentioned five types, and all signal components at frequencies other than these are considered to be noise. In the following description, the five types of frequencies will be collectively referred to as signal frequencies. Now, within a certain predetermined time T, the time occupied by the signal frequency component is ts, and the time occupied by the noise component is tn.
Then, T=ts+tn...(A) If α=tn/ts, then ts=T/1+α...(B) At this time, ts>T/1+α _p (α _p : minimum value of α)...( If C) holds true, it is necessary to determine the value of α _p that allows it to be determined that the signal arriving within T is not noise. In fact, the ratio α between noise components and significant signal components was measured for factory noise, music tape, white noise, and speech noise, and the results were as shown in the table.

[Table] When the minimum value α _p of α is determined from the table, α _p =2.0, which corresponds to the case of white noise. If α _p is set larger than this, noise may be mistaken for a normal signal. Therefore, α _p <2.0...(D). Assuming that the reliability of the receiving device for all measurement frequencies of input signals within T is 80%, ts≦0.8T ...(E) From equations (D) and (E), 2.0>α _p >0.25 ...(F) Therefore, if the minimum value α _p of the ratio α between the time occupied by the noise component and the time occupied by the significant signal is within the above range, the received input signal is considered to be meaningful. In the present invention, based on this premise,
In order to simplify the circuit configuration, the circuit of the embodiment described below was realized by setting α _p =1. That is, if ts>T/2...(G), the incoming signal is determined to be reliable data. An embodiment of the present invention will be described below with reference to the attached drawings. FIG. 1 is a block diagram showing the circuit configuration of this embodiment, and FIG. 2 is a timing chart thereof. In these drawings, it is assumed that the signals a to j correspond to each other. In FIG. 1, 1 is a binarization circuit for converting an input received signal into a predetermined binarization code;
is a frequency divider circuit for dividing the output of this binarization circuit by two, and 3 is a period measurement counter to which the output signal c of the binarization circuit 2 is directly input, and is cleared at each rising edge of the counter. , the counter clock signal d is input to the clock input terminal via the gate 4 when the signal c is at a high level. Reference numeral 5 denotes a comparator circuit which receives the output of the period measuring counter 3 as a binary signal g of an arbitrary number of bits, for example 8 bits, and compares it with a reference signal period count value H which can be set in advance from the outside. The comparator circuit 5 outputs a high level when the output signal g of the counter 3 and the reference signal cycle count value H match. 6 and 7 are gates, and when the output signal b of the binarization circuit 1 is high level and the output signal c of the divide-by-2 circuit 2 is low level, the output signal f of the gate 6 becomes high level, and the output signal f of the gate 6 becomes high level. It is opened to output the binary signal g obtained as the output of the comparator circuit 5. Each circuit 1 to 7 described above
The detection means X is constituted by this, and the signal g becomes the detection output of this detection means X. 8 is a multi-vibrator which is triggered by the rising edge of signal g and outputs pulse i. Reference numeral 9 denotes an 8-bit adder which outputs, as a signal K, the result of adding the reference signal count value H and the output L of a latch circuit, which will be described later, in response to a pulse i. A multi-vibrator 10 generates a pulse j delayed by a predetermined time from the pulse i, taking into account the calculation time and propagation delay in the 8-bit adder 9. 11 is a latch circuit and multi-vibrator 1
Pulse j from 0 latches the output K of 8-bit adder 9. The latched output L of the latch circuit 11 is input to the comparator circuit 12 and also to the 8-bit adder 9 as described above. In this case, the binary value of the signal L is the sum of the reference period components (the value of H) in the signal c.
13 is a time management counter, and like the period measurement counter 3, the signal e is input to its clock input terminal, and the signal P is input at the start of this circuit.
It is configured so that by raising it to a high level, it will be cleared with that rising edge. Further, the output M obtained by integrating the signal e by this counter 13 is also input to the above-mentioned comparison circuit 12, and is compared with the output L of the above-mentioned latch circuit 11. In this comparison, L is ts in the above-mentioned formula (A), and M corresponds to T in formula (A). In this circuit, in order to determine whether ts>T/2, each bit of M input to the comparator circuit 12 is connected to each bit of L in a manner shifted by one bit toward the LSB. Therefore, ts
>T/2, that is, L>M/2, the output of the comparison circuit 12 is configured to be at a high level. One embodiment of the signal detection circuit according to the present invention is configured as described above, and its operation will be described next. For example, if an input signal as indicated by a in FIG. be done. This signal c divided by two
Counter 3 is cleared at the rising edge of . At this time, since the signal c is also applied to the gate 4, the counter clock d during the period when the signal c is at a high level is input to the counter 3, and a predetermined counting operation is started. Note that the signal c has a specified period T when it does not contain noise. The comparator circuit 5 compares the counter output from the counter 3 with a preset reference signal period count value H, and when the counter output of the counter 3 and H match, the output of the comparator circuit 5 becomes high level. The output of the comparison circuit 5 is taken out as a signal g via the gate 7 when the output f of the gate 6 is at a high level. The multivibrator 8 is triggered by the rising edge of the signal g and outputs a pulse i. The adder 9 starts adding the H and L values in synchronization with this pulse i and outputs the addition output K to the latch circuit 11. At this time, the multivibrator 10 is triggered by the pulse i and outputs the pulse j. The latch circuit 11 performs a latch operation in synchronization with this pulse j, and outputs L to the comparison circuit 12. At this time, counter 1
3 starts the counting operation of the pulse e supplied through the gate 4, and calculates this integrated value M to the comparator circuit 12.
Output to. In the comparison circuit 12, as mentioned above,
L corresponding to ts and M corresponding to tn are compared, and if L>M/2, the output is set to high level. The comparison circuit 12 determines that the received signal is not noise if the output is at a high level within a time period in which the counter 11 does not overflow, and determines that the received signal is noise if the output is at a low level. In this way, by calculating the time occupied by the noise component and the time occupied by the significant signal of the received signal received during a predetermined observation time, and comparing the calculated values, it is possible to determine whether the received signal is noise. It is possible to judge whether the data is valid or not, that is, whether it is significant. In the above embodiment, the value of H is fixed, that is, one type of signal frequency is explained. However, by switching the value of H from the outside at high speed using the rising edge of the signal f, five types of signal frequencies can be occupied. Time ts (value of L)
can be obtained. Furthermore, although the circuit shown in FIG.
If the value of H when becomes high level is arranged in terms of time, this circuit becomes a highly reliable tonal receiving circuit as it is. As explained above, according to the signal detection method according to the present invention, it is possible not only to prevent noise from being mistakenly recognized as a significant signal, but also to prevent the occupancy of each signal frequency in a tonal signal composed of different signal frequencies. Analysis of time values is also possible.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of a signal detection circuit according to the present invention, and FIGS. 2 a to 2 j are timing chart diagrams of FIG. 1. 1... Binarization circuit, 2... Frequency divider circuit, 3... Period measurement counter, 5... Comparison circuit, 8... Multivibrator, 9... Adder, 10... Multivibrator, 11... Latch circuit, 12... Comparison circuit , 13...
Time management counter, X...detection means.

Claims (1)

[Claims] 1. A signal detection method for detecting whether a received signal is a significant signal to be received by detecting the frequency of a signal component and the frequency of a noise component of a received signal, comprising: The time for detecting the frequency is detected multiple times, the time ratio between the time when the frequency of the signal component of the received signal is detected and the time when the frequency of the noise component of the received signal is detected, and the time ratio is calculated based on the time ratio. A signal detection method characterized in that the received signal is determined to be a significant signal.