JPH0352716B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an apparatus for storing and reproducing color images such as composite video signals of television.

BACKGROUND ART A conventional television receiver outputs a composite video signal through analog signal processing, and this signal is sequentially reproduced as a color image on a cathode ray tube in response to a synchronization signal.

On the other hand, with recent technological advances in ICs (integrated circuits) and LSIs (large-scale integrated circuits), digital signal processing, which converts composite video signals into digital signals and processes them, has come to be performed. After converting it to a digital signal, the video signal from at least one scanning line to several frames is stored in memory, and after performing predetermined signal manipulation, it is converted to an analog signal as needed to reproduce a color image on a cathode ray tube. A television receiver has been developed to do this.

Problems to be Solved by the Invention In such prior art, since the video signal and the synchronization signal are stored in the memory, a large capacity memory is required and the circuit cannot be miniaturized. Therefore, if we consider a configuration in which only the video signal displayed on the cathode ray tube is stored in memory and the blanking period part is removed, the blanking period part of the color signal will be reproduced as the three primary color signals. Since this is an important element that serves as a reference level, a means to reproduce it again is required.

The present invention solves the above-mentioned technical problems, and provides a video signal storage/reproduction device that can reduce the memory capacity and reproduce the blanking period portion of a color signal with a simple configuration. It is to provide.

Embodiment FIG. 1 is a block diagram of one embodiment of the present invention. This color signal processing circuit 1 basically processes a luminance signal Y and first and second color difference signals R-Y, B-Y.
an analog/digital conversion circuit 2 that performs analog/digital conversion; a memory 3 that removes and stores the blanking period signal from the digital signal from the analog/digital conversion circuit 2; and a digital signal from the memory 3. a digital/analog conversion circuit 4 that reads out and converts it into digital/analog, and a DC bias circuit 5 that is a voltage adjustment means that provides an adjustable DC bias signal during the blanking period of the analog signal from the digital/analog conversion circuit 4. including. The analog/digital conversion circuit 2, the memory 3, the digital/analog conversion circuit 4, and the control circuit 7 described later constitute memory means.

A television composite video signal, which is a video signal, is demodulated into a luminance signal Y and color difference signals RY, BY in a video signal processing circuit 6, and a horizontal synchronization signal H and a vertical synchronization signal V are separated. The luminance signal Y and color difference signals RY and BY from the video signal processing circuit 6 are applied to the analog/digital conversion circuit 2 via lines 11, 12 and 13, respectively. In the analog/digital conversion circuit 2, each analog/digital converted digital signal is sent to lines l11, l12, l in synchronization with a sampling clock la from a control circuit 7, which will be described later.
13, respectively. Line l11-l1
Each digital signal from 3 is stored in memory 3 except for the digital signal included in the blanking period. This memory 3 has a capacity to store each digital signal, and only the digital signal during the horizontal scanning period displayed on the screen of a cathode ray tube CRT, which is a display means described later, is an address signal from the control circuit 7.
Stored according to lb. Thereby, the capacity of the memory 3 can be reduced by the amount of digital signals during the horizontal blanking period, which are not displayed as images on the cathode ray tube CRT. The digital signals stored in the memory 3 are read out to lines 121, 122, and 123 in accordance with the address signal lb, and are applied to the latch circuits 8, respectively. The latch circuit 8 sends each digital signal to the lines l31 and l3 according to the transfer clock lc from the control circuit 7.
2 and 133, and provided to the digital/analog conversion circuit 4, respectively. The analog luminance signal Y from the digital/analog conversion circuit 4 is given to the matrix circuit 9, which is a restoring means, via the line l41, and the analog color difference signals R-Y, B- Y
are input to the DC bias circuit 5 via lines l42 and l43, and in this DC bias circuit 5, during the blanking period, as will be described later, the color difference signals R-Y and B-Y to which the DC bias signal is applied are ,
Matrix circuit 9 via lines l52 and l53
are given to each. In the matrix circuit 9, primary color signals are regenerated from the luminance signal Y and the color difference signals R-Y, B-Y, and are transmitted to the cathode ray tube via the line lx.
is applied to a CRT and a color image is reproduced.

On the other hand, the horizontal synchronizing signal H and vertical synchronizing signal V separated from the composite video signal in the signal processing circuit 1 are provided to the control circuit 7 via lines lH and lV, respectively. The control circuit 7 generates a reference clock from an oscillation circuit 10 realized by a high-precision crystal oscillator, and a sampling clock la, an address signal lb, and a transfer clock lc synchronized with the synchronization signals H and V. This sampling clock la is given to the analog/digital conversion circuit 2 as described above, the address signal lb is given to the memory 3, and the transfer clock lc is given to the latch circuit 8.
given to. The control circuit 7 is provided with a switch S for turning the control circuit 7 on and off. When the switch S is temporarily turned on, one field or one frame worth of video signal from the video processing circuit 1 is reproduced as a still image on the cathode ray tube CRT at the timing of the on state, and the switch S When turned on intermittently, the cathode ray tube
On a CRT, moving images can be reproduced intermittently in still motion.

FIG. 2 is an electrical circuit diagram of the DC bias circuit 5, and FIG. 3 is a waveform diagram of the color difference signal RY or BY. The DC bias circuit 5 includes transistors Tr1, Tr2, and Tr3 as shown in FIG. The base of the transistor Tr1 is connected to the line l4.
2, the color difference signal R-Y from the digital/analog conversion circuit 4 is inputted, and the transistor Tr
The color difference signal B-Y from the digital/analog conversion circuit 4 is inputted to the base of the transistor Tr3 via the line l43, and the synchronizing signals lH and lV are inputted to the base of the transistor Tr3 via the line l62.

The bias voltage of the transistor Tr3 controlled by the bias adjustment variable resistor VR is applied to the bases of the transistors Tr1 and Tr2 during the blanking period. For example, assuming that a color difference signal as shown in FIG. The adjusted bias voltage is applied to the diode D1,
It is applied to each base of transistors Tr1 and Tr2 via D2. The transistor Tr3 is
It is turned off during the vertical retrace period as well as during the horizontal retrace period. When transistor Tr3 is turned on, the collector voltage is close to zero and the diode D
1 and D2 are reverse biased, so no bias voltage is applied. The level of the bias voltage is adjusted to the optimum color balance by applying an appropriate bias to the blanking period of the output of the digital/analog conversion circuit 4 shown in FIG. 3 using the bias adjustment variable resistor VR. I can do it. Furthermore, by adjusting the bias adjustment variable resistor VR, it is possible to prevent changes in the color balance of the color difference signal without depending on the reference voltage of the analog/digital conversion circuit 2. In addition, the color balance can be adjusted by simply adding the level-adjusted DC bias signal to the blanking period of the analog-converted color difference signal using the variable resistor VR for bias adjustment. It is possible to reduce this and improve reliability.

Effects As described above, according to the present invention, the luminance signal Y, the first and second color difference signals R-
Since Y, B-Y are not stored in the memory means 2, 3, 4, 7 during the horizontal blanking period or the vertical blanking period, the memory requirements of the memory means 2, 3, 4, 7 are reduced. Capacity can be reduced.
Moreover, the adjustable DC voltage is stored in the memory means 2, 3,
The first and second color difference signals R- read from 4 and 7
With the simple structure of giving Y, B-Y,
Video signals can be restored.

Further, according to the present invention, the color balance of the video signal can be adjusted by the voltage adjustment means 5 applying an adjustable DC voltage to the first and second color difference signals R-Y and B-Y. .

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG.
The figure is an electric circuit diagram of the DC bias circuit 5, and FIG. 3 is a waveform diagram of the color difference signal. 1... Color signal processing circuit, 2... Analog/digital conversion circuit, 3... Memory, 4... Digital/
Analog conversion circuit, 5...DC bias circuit,
Tr1 to Tr3...transistor, VR...variable resistor for bias adjustment.

Claims (1)

[Scope of Claims] 1. The luminance signal Y included in the video signal and the first and second color signals R-Y, B-Y are transmitted to each other during the horizontal blanking period or the vertical blanking period. Signal Y,
Memory means 2, 3, 4, 7 for removing and storing R-Y, B-Y; and responsive to the stored contents of the memory means 2, 3, 4, 7, the first and second color difference signals R- Voltage adjustment means 5 for applying an adjustable DC voltage to the read signal Y, B-Y during the horizontal blanking period or the vertical blanking period; and memory means 2, 3, 4, 7. Luminance signal Y from
and the first and second color difference signals R-Y, B-Y from the voltage adjustment means 5, the respective signals Y, R-
Restoration means 9 for restoring the video signal before being stored in the memory means 2, 3, 4, 7 using Y, B-Y
and a display means CRT for displaying the restored video signal in response to the output from the restoration means 5.