JPH0359591B2 - - Google Patents
Info
- Publication number
- JPH0359591B2 JPH0359591B2 JP58016576A JP1657683A JPH0359591B2 JP H0359591 B2 JPH0359591 B2 JP H0359591B2 JP 58016576 A JP58016576 A JP 58016576A JP 1657683 A JP1657683 A JP 1657683A JP H0359591 B2 JPH0359591 B2 JP H0359591B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- integrated circuit
- conductive path
- substrate
- connecting body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0393—Flexible materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Structure Of Printed Boards (AREA)
Description
【発明の詳細な説明】
(イ) 産業上の利用分野
本発明は混成集積回路、特に高密度集積化に適
合した混成集積回路の改良に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to hybrid integrated circuits, and particularly to improvements in hybrid integrated circuits suitable for high-density integration.
(ロ) 従来技術
従来の混成集積回路は第1図に示す如く、金属
基板1の一主面に絶縁薄層を設けて所望の導電路
2を設け、導電路2上に半導体集積回路、チツプ
抵抗あるいはチツプコンデンサー等の回路素子3
を固着して、第2図の如く外部リード4のみを残
して全体を樹脂5でモールドして形成していた。(b) Prior Art As shown in FIG. 1, a conventional hybrid integrated circuit has a thin insulating layer provided on one main surface of a metal substrate 1 to provide a desired conductive path 2, and a semiconductor integrated circuit and a chip on the conductive path 2. Circuit elements such as resistors or chip capacitors 3
was fixed, and the whole was molded with resin 5, leaving only the external leads 4 as shown in FIG.
斯る混成集積回路は金属基板1の一主面に形成
されるため、ある程度の集積度を確保するには高
さが必要となり、電子機器の薄型化設計の難点と
なつていた。この原因は主として外部リード4の
固着パツド6にかなりの面積が必要となるためで
ある。 Since such a hybrid integrated circuit is formed on one main surface of the metal substrate 1, a certain height is required to ensure a certain degree of integration, which has been a difficulty in designing thinner electronic devices. This is mainly due to the fact that the fixing pad 6 of the external lead 4 requires a considerable area.
本発明者は斯上の欠点を除去するために第3図
および第4図に示す混成集積回路を考えた。この
混成集積回路は2枚の金属基板11,12と、基
板11,12を接続する絶縁フイルム13と、フ
イルム13上に設けた導電路14と、導電路14
上に固着した半導体集積回路、チツプ抵抗あるい
はチツプコデンサー等の複数の回路素子15とを
具備し、基板11,12の離間部分で絶縁フイル
ム13を折り曲げて第4図の如くプリント基板1
6に実装される。この構造に依れば従来と同じ集
積度を有する混成集積回路を約半分の高さにでき
る利点を有する。 In order to eliminate the above-mentioned drawbacks, the inventor of the present invention devised a hybrid integrated circuit shown in FIGS. 3 and 4. This hybrid integrated circuit includes two metal substrates 11 and 12, an insulating film 13 connecting the substrates 11 and 12, a conductive path 14 provided on the film 13, and a conductive path 14 provided on the film 13.
A printed circuit board 1 is provided with a plurality of circuit elements 15 such as a semiconductor integrated circuit, a chip resistor, or a chip capacitor fixed thereon, and the insulating film 13 is bent at the space between the boards 11 and 12, as shown in FIG.
Implemented in 6. This structure has the advantage that a hybrid integrated circuit having the same degree of integration as the conventional one can be reduced in height to about half.
しかし折曲部分がフレキシブルな絶縁フイルム
13であるので、折曲角度等の形状を定型化でき
ず自動挿入を行なえず、また絶縁フイルム13で
の破断も発生するおそれがあつた。 However, since the bent portion is the flexible insulating film 13, the bending angle and other shapes cannot be standardized, making automatic insertion impossible, and there is also a risk that the insulating film 13 may break.
(ハ) 発明の目的
本発明は斯上した欠点に鑑みてなされ、斯る欠
点を大巾に除去した量産容易な混成集積回路を提
供することにある。(c) Object of the Invention The present invention has been made in view of the above-mentioned drawbacks, and an object of the present invention is to provide a hybrid integrated circuit which can be easily mass-produced and which largely eliminates such drawbacks.
(ニ) 発明の構成
本発明による混成集積回路は第5図に示す如
く、金属基板21と、基板21と折曲部分に設け
た切欠孔22および連結体23と、基板21の一
主面に付着した絶縁フイルム24と、絶縁フイル
ム24上に設けた導電路25と、導電路25上に
固着した複数の回路素子26とを具備し、絶縁フ
イルム24を連結体23部分で切欠いたことを特
徴としている。(d) Structure of the Invention As shown in FIG. 5, the hybrid integrated circuit according to the present invention includes a metal substrate 21, a notch hole 22 and a connecting body 23 provided in the bent portion of the substrate 21, and a metal substrate 21 on one principal surface of the substrate 21. It is characterized by comprising an attached insulating film 24, a conductive path 25 provided on the insulating film 24, and a plurality of circuit elements 26 fixed on the conductive path 25, and the insulating film 24 is cut out at the connecting body 23 part. It is said that
(ホ) 実施例
金属基板21は0.5〜1.0mm厚の良熱伝導性のア
ルミニウムで形成され、その表面は酸化アルミニ
ウム膜で被覆しても良い。金属基板21の折曲部
分20となる中央部にはプレス打抜きで設けた細
長い切欠孔22と金属基板21をそのまま残存さ
せた複数本の連結体23を設ける。連結体23は
金属基板21を一体的に支持し、折曲げても定型
を保持する働きを有する。絶縁フイルム24はポ
リイミド等を用い、金属基板21の一主面の略全
面にエポキシ樹脂等の接着剤で付着する。絶縁フ
イルム24の一主面には導電路25となる銅箔を
貼着しておき、この銅箔を選択的にエツチングし
て所望形状の導電路25と形成する。導電路25
は第5図から明らかな様に両端に実装するプリン
ト基板の電極に半田付けするパツド27を配列
し、パツド27から導電路25を絶縁フイルム2
4上に延在させる。回路素子26が固着される導
電路25の部分は基板21全体に位置する様に設
計し、基板21の折曲部分を除いて半導体集積回
路、チツプ抵抗あるいはチツプコンデンサー等の
複数の回路素子を導電路25上に固着する。(E) Embodiment The metal substrate 21 is made of aluminum with good thermal conductivity and has a thickness of 0.5 to 1.0 mm, and its surface may be coated with an aluminum oxide film. At the center of the metal substrate 21, which is the bent portion 20, there are provided an elongated notch hole 22 formed by press punching and a plurality of connecting bodies 23 in which the metal substrate 21 remains as it is. The connecting body 23 has the function of integrally supporting the metal substrate 21 and maintaining its regular shape even when bent. The insulating film 24 is made of polyimide or the like, and is attached to substantially the entire surface of one principal surface of the metal substrate 21 with an adhesive such as epoxy resin. A copper foil serving as a conductive path 25 is adhered to one main surface of the insulating film 24, and this copper foil is selectively etched to form the conductive path 25 in a desired shape. Conductive path 25
As is clear from FIG. 5, the pads 27 to be soldered to the electrodes of the printed circuit board to be mounted are arranged at both ends, and the conductive path 25 is connected to the insulating film 2 from the pads 27.
4.Extend on top. The portion of the conductive path 25 to which the circuit element 26 is fixed is designed to be located over the entire substrate 21, and the conductive path 25, excluding the bent portion of the substrate 21, is designed to conduct electricity between multiple circuit elements such as a semiconductor integrated circuit, a chip resistor, or a chip capacitor. It sticks to the road 25.
本発明の特徴は絶縁フイルム24を金属基板2
1の連結体23の部分で切欠くことにある。即ち
絶縁フイルム24は折曲部分では切欠孔22上に
のみ存在させるのである。その結果金属基板21
を折曲部分で曲折しても、第6図の如く連結体2
3が単に曲折されているだけで、絶縁フイルム2
4のある曲折部分では切欠孔22の存在により絶
縁フイルム24が引き伸ばされることなく基板2
1を曲折できる。 The feature of the present invention is that the insulating film 24 is attached to the metal substrate 2.
1 is cut out at the connecting body 23. That is, the insulating film 24 is present only over the cutout hole 22 at the bent portion. As a result, the metal substrate 21
Even if the connecting body 2 is bent at the bending part, as shown in Fig. 6,
3 is simply bent, the insulation film 2
4, the presence of the cutout hole 22 prevents the insulating film 24 from being stretched.
1 can be bent.
(ハ) 発明の効果
本発明に依れば、従来と同じ集積度を有する混
成集積回路を約半分の高さにでき、且つフレキシ
ブルな絶縁フイルム24により基板の折曲も容易
に行なえる利点を有する。(C) Effects of the Invention According to the present invention, a hybrid integrated circuit having the same degree of integration as a conventional hybrid integrated circuit can be reduced in height to about half, and the flexible insulating film 24 allows the board to be easily bent. have
更に絶縁フイルム24の切欠によつて基板21
の曲折を連結体23ででき、絶縁フイルム24が
無用に引つ張られるおそれは完全に防止できる。
そして基板21の曲折形状は任意であり、その形
状に定型化でき、実装上きわめて有利となる。 Furthermore, the substrate 21 is
This bending can be done by the connecting body 23, and the possibility that the insulating film 24 will be stretched unnecessarily can be completely prevented.
The bent shape of the board 21 is arbitrary and can be standardized, which is extremely advantageous in terms of mounting.
第1図は従来の混成集積回路を説明する平面
図、第2図はその側面断面図、第3図は従来の改
良した混成集積回路を説明する平面図、第4図は
第3図の混成集積回路を実装した側面断面図、第
5図は本発明の混成集積回路を説明する平面図、
第6図および第7図は本発明の混成集積回路の側
面断面図である。
主な図番の説明、21は金属基板、22は切欠
孔、23は連結体、24は絶縁フイルム、25は
導電路、26は回路素子である。
Fig. 1 is a plan view illustrating a conventional hybrid integrated circuit, Fig. 2 is a side sectional view thereof, Fig. 3 is a plan view illustrating a conventional improved hybrid integrated circuit, and Fig. 4 is a hybrid of Fig. 3. FIG. 5 is a side cross-sectional view of the integrated circuit mounted thereon; FIG. 5 is a plan view illustrating the hybrid integrated circuit of the present invention;
6 and 7 are side sectional views of the hybrid integrated circuit of the present invention. Explanation of main figure numbers: 21 is a metal substrate, 22 is a notch hole, 23 is a connecting body, 24 is an insulating film, 25 is a conductive path, and 26 is a circuit element.
Claims (1)
切欠孔と前記基板の切欠孔両端部に設けられた連
結体と、 前記基板の表面に付着した絶縁フイルムと、 前記フイルム上に設けた所望の導電路と、 前記導電路上に固着された複数の回路素子とを
具備し、 前記絶縁フイルムを前記連結体部分で切欠き、
前記連結体を用いて折り曲げ配置し、前記切欠孔
で分離された基板の夫々の金属露出面を対向保持
させたことを特徴とする混成集積回路。[Scope of Claims] 1. A metal substrate, an elongated notch hole provided in a bent portion of the metal substrate, a connecting body provided at both ends of the notch hole of the substrate, and an insulating film attached to a surface of the substrate. , comprising a desired conductive path provided on the film and a plurality of circuit elements fixed on the conductive path, the insulating film is notched at the connecting body portion,
A hybrid integrated circuit characterized in that the metal exposed surfaces of the substrates separated by the notch holes are held facing each other by being bent and arranged using the connecting body.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58016576A JPS59141258A (en) | 1983-02-02 | 1983-02-02 | Hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58016576A JPS59141258A (en) | 1983-02-02 | 1983-02-02 | Hybrid integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59141258A JPS59141258A (en) | 1984-08-13 |
| JPH0359591B2 true JPH0359591B2 (en) | 1991-09-11 |
Family
ID=11920114
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58016576A Granted JPS59141258A (en) | 1983-02-02 | 1983-02-02 | Hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59141258A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61207041U (en) * | 1985-06-14 | 1986-12-27 | ||
| FR2714250B1 (en) * | 1993-12-21 | 1996-01-19 | Siemens Automotive Sa | Method of folding a metal support integral with a flexible printed circuit and electronic box comprising such a support. |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5082662U (en) * | 1973-12-03 | 1975-07-16 | ||
| JPS5795691A (en) * | 1980-12-08 | 1982-06-14 | Matsushita Electric Industrial Co Ltd | Compact electronic circuit and method of producing same |
-
1983
- 1983-02-02 JP JP58016576A patent/JPS59141258A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59141258A (en) | 1984-08-13 |
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