JPH0362679B2 - - Google Patents
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- Publication number
- JPH0362679B2 JPH0362679B2 JP59149106A JP14910684A JPH0362679B2 JP H0362679 B2 JPH0362679 B2 JP H0362679B2 JP 59149106 A JP59149106 A JP 59149106A JP 14910684 A JP14910684 A JP 14910684A JP H0362679 B2 JPH0362679 B2 JP H0362679B2
- Authority
- JP
- Japan
- Prior art keywords
- crystal
- melt
- type
- pulling
- single crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/02—Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は引き上げ(CZ)法による結晶成長方
法に係り、特に引き上げ軸方向の比抵抗値が一定
になるように成長させる方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for growing crystals by pulling (CZ) method, and particularly to a method for growing crystals so that the specific resistance value in the direction of the pulling axis is constant.
半導体装置製造に用いられる珪素(Si)等の結
晶はp型不純物としてボロン(B)、n型不純物
として燐(P)、砒素(As)、アンチモン(Sb)
等を入れ、或る一定の比抵抗値(通常0.01〜
100Ωcmの間で用途に応じて選ばれる)にして使
用する。 Crystals such as silicon (Si) used in semiconductor device manufacturing contain boron (B) as a p-type impurity, and phosphorus (P), arsenic (As), and antimony (Sb) as n-type impurities.
etc., and set a certain specific resistance value (usually 0.01~
100Ωcm (selected depending on the application).
半導体装置は設計上の要求より、比抵抗分布が
均一であることが望ましいが、通常のCZ法で成
長した結晶は偏析により、引き上げ軸方向に不純
物の濃度分布は次式に従つて変化する。1)
C=KC0(1−l)K-1,
ここで、
C0はメルト中の初期不純物濃度、
lは初期メルト量に対して結晶化した量の割合
(固化率)、
Cは固化率lにおける不純物濃度、
kは偏析係数
である。 Due to design requirements, it is desirable for semiconductor devices to have a uniform resistivity distribution, but due to segregation in crystals grown by the normal CZ method, the impurity concentration distribution in the pulling axis direction changes according to the following equation. 1) C=KC 0 (1-l) K-1 , where C 0 is the initial impurity concentration in the melt, l is the ratio of the amount crystallized to the initial melt amount (solidification rate), and C is the solidification rate. The impurity concentration at a rate l, k is the segregation coefficient.
引き上げ軸方向の比抵抗分布は上式に従つて取
り込まれた不純物の濃度分布で決まる。 The specific resistance distribution in the direction of the pulling axis is determined by the concentration distribution of the impurities taken in according to the above equation.
第3図は代表的な不純物の比抵抗分布で、20Kg
のメルトから4inch結晶を引き上げたときの計算
値である。 Figure 3 shows the resistivity distribution of typical impurities, 20Kg
This is the calculated value when a 4-inch crystal is pulled from the melt.
図から分かるように半導体基板として要求され
る結晶の比抵抗の均一性が厳しくなると、引き上
げた単結晶の1部分しか使用できず、歩留りは減
少する。この傾向は偏析係数kの小さい不純物程
甚だしい。 As can be seen from the figure, when the uniformity of the crystal resistivity required for a semiconductor substrate becomes strict, only a portion of the pulled single crystal can be used, and the yield decreases. This tendency is more severe for impurities with a smaller segregation coefficient k.
そのため結晶の比抵抗の均一性を良くする種々
の方法が用いられている。 Therefore, various methods are used to improve the uniformity of the specific resistance of the crystal.
(参考)
1 W.G.Pfann,AIME194,747(1952).
〔従来の技術〕
以下に、結晶の比抵抗の均一性を良くする方法
の従来例を示す。(Reference) 1 WGPfann, AIME 194 , 747 (1952). [Prior Art] Below, a conventional example of a method for improving the uniformity of specific resistance of a crystal will be shown.
i Multiple Ingot Growth法2)
この方法は要求される比抵抗幅の限界で一旦単
結晶の引き上げを終了し、新たに多結晶をメルト
に継ぎ足して不純物濃度を調製し、再度結晶の引
き上げを行う。i Multiple Ingot Growth Method 2) In this method, pulling of a single crystal is once completed at the limit of the required resistivity width, a new polycrystal is added to the melt, the impurity concentration is adjusted, and the crystal is pulled again.
連続Charge法3)
第4図に示すように、単結晶引き上げ中に連続
的にメルトを継ぎ足す方法である。溶融炉12の
圧力を単結晶育成炉13のそれより大きくするこ
とによりメルト2を移動させ、育成炉13のメル
トの不純物濃度が常に一定に保たれるようにす
る。 Continuous Charge Method 3) As shown in Figure 4, this is a method in which melt is continuously added during single crystal pulling. By making the pressure in the melting furnace 12 higher than that in the single crystal growth furnace 13, the melt 2 is moved so that the impurity concentration of the melt in the growth furnace 13 is always kept constant.
なお、図において、14はメルトを移動させる
連通管、15はヒータ、16はアルゴンガス入
口、17は内圧コントロールバルブ、18はメル
トの液面位置センサ、19は自動直径制御センサ
を示す。 In the figure, 14 is a communication pipe for moving the melt, 15 is a heater, 16 is an argon gas inlet, 17 is an internal pressure control valve, 18 is a melt level position sensor, and 19 is an automatic diameter control sensor.
二重ルツボ法4)
第5図に示すように、石英ルツボを二重にして
内外のルツボ1Aと1Bを細管20で連絡し、内
部ルツボの不純物濃度C′を
C′=C0/K
となるようにすると、結晶内に取り込まれる不純
物濃度は常にC0となる。 Double crucible method 4) As shown in Fig. 5, the quartz crucible is doubled and the inner and outer crucibles 1A and 1B are connected through a thin tube 20, and the impurity concentration C' in the inner crucible is set as C'=C 0 /K. If so, the concentration of impurities taken into the crystal will always be C 0 .
しかし従来の各方法にはつぎのような欠点があ
る。 However, each conventional method has the following drawbacks.
全メルト量に対して得られた単結晶の直胴部
分が少なく歩留りが悪く、再チヤ ージ時に汚
染されやすい。 The yield rate is poor because the straight body portion of the single crystal obtained is small compared to the total amount of melt, and it is easily contaminated during recharging.
装置が大規模になり、経済的でない。 The equipment becomes large-scale and uneconomical.
装置が複雑になり、内部ルツボの保持、回転
および調節が困難である。 The equipment becomes complex and the internal crucible is difficult to hold, rotate and adjust.
(参考)
2 R.L.Lane and A.H.Kachare,
J.Crys.Growth50,437(1983).
3 G.Fiegl,
Solid State Technology,August,
121(1983).
4 K.E.Benson,W.Lin and E.P.Martin,
Semiconductor Silicon 1981,33
(1981).
〔発明が解決しようとする問題点〕
CZ法で結晶の比抵抗の均一性を良くする従来
の方法は歩留りが悪く汚染のおそれがあるか、装
置が複雑、大規模になり装置の操作、保全、調節
が難しい。(Reference) 2 RLLane and AHKachare, J.Crys.Growth 50 , 437 (1983). 3 G. Fiegl, Solid State Technology, August,
121 (1983). 4 KEBenson, W.Lin and EPMartin, Semiconductor Silicon 1981, 33
(1981). [Problems to be solved by the invention] The conventional method of improving the uniformity of the resistivity of crystals using the CZ method has poor yields and may cause contamination, or the equipment is complicated and large-scale, making it difficult to operate and maintain the equipment. , difficult to adjust.
上記の問題の解決は、硼素を不純物として含有
するシリコンのメルトを用い、シリコン結晶を引
き上げ法によつて成長する方法において、結晶の
成長とともに、燐を含む結晶を成長結晶の周囲の
該メルトに徐々に溶かしながら成長させることを
特徴とする結晶成長方法により達成される。
The solution to the above problem is to grow a silicon crystal by a pulling method using a silicon melt containing boron as an impurity. This is achieved by a crystal growth method characterized by growing the crystal while gradually melting it.
結晶成長中に、メルトに含まれる不純物と反対
導電型の不純物を含む結晶を溶解して単結晶に両
方の型の不純物を取り込み、これらの不純物がお
互いに打ち消し合つて補償した値に相当するキヤ
リア濃度(この値が比抵抗に関係する)が一定に
なるようにすれば、結晶の比抵抗の均一性が比較
的簡易な装置により得られる。
During crystal growth, a crystal containing impurities of the opposite conductivity type to the impurities contained in the melt is dissolved and both types of impurities are incorporated into the single crystal, and these impurities cancel each other out to produce a carrier corresponding to the compensated value. By keeping the concentration (this value is related to specific resistance) constant, uniformity in the specific resistance of the crystal can be obtained using a relatively simple device.
第1図aは本発明の実施例を示す装置の模式的
な断面図である。
FIG. 1a is a schematic cross-sectional view of a device showing an embodiment of the present invention.
図は約10Ωcmのp型Si結晶を成長する場合を示
す。 The figure shows the case of growing a p-type Si crystal of about 10 Ωcm.
まず石英ルツボ1に、Bを添加したSi単結晶を
入れ溶解してメルト2を得る。成長開始後直胴部
に入る直前に、Pを含むn型Si結晶3をメルト2
に浸け、Si単結晶4の成長とともに徐々に溶かし
てゆく。この場合Pを含むn型Si結晶3は、引き
上げ軸に垂直な断面の比抵抗分布をよくするため
に図のように円筒形が望ましい。 First, a Si single crystal doped with B is placed in a quartz crucible 1 and melted to obtain a melt 2. Immediately before entering the straight body after the start of growth, the n-type Si crystal 3 containing P is melted 2.
The Si single crystal 4 is immersed in water and gradually melted as the Si single crystal 4 grows. In this case, the n-type Si crystal 3 containing P is preferably cylindrical as shown in the figure in order to improve the resistivity distribution in the cross section perpendicular to the pulling axis.
またPを含むn型Si結晶3の引き下げ速度は、
Si単結晶4の引き上げ速度、直径と、Pを含むn
型Si結晶3のP濃度、メルトとの接触面積により
異なり、10Ωcmのp型Si単結晶4がえられるよう
に調節する。 In addition, the pulling down speed of the n-type Si crystal 3 containing P is:
Pulling speed, diameter, and n including P of Si single crystal 4
It varies depending on the P concentration of the type Si crystal 3 and the contact area with the melt, and is adjusted so that a p-type Si single crystal 4 of 10 Ωcm can be obtained.
なお5はモータ、6はモリブデン(Mo)ワイ
ヤ、7はモータ、8はヒータを示す。 Note that 5 is a motor, 6 is a molybdenum (Mo) wire, 7 is a motor, and 8 is a heater.
第1図bはPを含んだn型Si結晶3の斜視図で
ある。 FIG. 1b is a perspective view of an n-type Si crystal 3 containing P.
第2図に本発明により得られた結晶の引き上げ
軸方向の分布を示す。 FIG. 2 shows the distribution of crystals obtained according to the present invention in the direction of the pulling axis.
比抵抗の許容範囲を10±1Ωcmとすれば、点線
で示される通常のCZ法では10に示すように全メ
ルトの約25%しか使えないが、本発明によると11
に示すように約70%が使えることになる。 If the allowable range of specific resistance is 10 ± 1 Ωcm, the normal CZ method shown by the dotted line can only use about 25% of the total melt as shown in 10, but according to the present invention, 11
As shown in the figure, approximately 70% can be used.
またPを含むn型Si結晶3の引き下げ駆動部は
簡単に作れる。 Further, the pull-down drive section of the n-type Si crystal 3 containing P can be easily made.
さらにB不純物にP不純物を混入した結晶の結
晶性について考える。Siの共有結合半径を1とす
ると、Bは0.75で、Pは0.94でPの方が結合半径
の差による歪が小さいことが分かる。5)
実際に本発明により得られた結晶の微少欠陥密
度をSeccoエツチングを用いて評価してみると、
103cm-2程度でPを導入しない場合と同程度であ
り、結晶性に影響を与えないことが明らかとなつ
た。 Furthermore, consider the crystallinity of a crystal in which a P impurity is mixed with a B impurity. If the covalent bond radius of Si is 1, then B is 0.75 and P is 0.94, indicating that P has smaller distortion due to the difference in bond radius. 5) When the microdefect density of the crystal actually obtained according to the present invention was evaluated using Secco etching, it was found that
It was found that the crystallinity was approximately 10 3 cm -2 , which is the same level as when no P is introduced, and that it does not affect crystallinity.
(参考)
5 津屋英樹、近藤陽二郎、金森克、
第30回応用物理学関係連合講演予稿集
(1983)p.662
〔発明の効果〕
以上詳細に説明したように本発明によれば、
CZ法において、汚染のおそれがなくて装置の操
作、保全、調節が簡単な装置で、結晶の比抵抗の
均一性を良くし、しかも欠陥密度の増加をきたさ
ない。(Reference) 5 Hideki Tsuya, Yojiro Kondo, Masaru Kanamori, Proceedings of the 30th Applied Physics Association Lecture (1983) p.662 [Effects of the Invention] As explained in detail above, according to the present invention,
In the CZ method, there is no risk of contamination, the equipment is easy to operate, maintain, and adjust, and the uniformity of the resistivity of the crystal is improved, and the defect density does not increase.
第1図aとbは本発明の実施例を示す装置の模
式的な断面図とPを含んだn型Si結晶の斜視図、
第2図に本発明により得られた結晶の引き上げ軸
方向の分布図、第3図は通常のCZ法による代表
的な不純物の引き上げ軸方向の比抵抗分布図、第
4図は従来の連続Charge法による装置の模式的
な断面図、第5図は従来の二重ルツボ法による装
置の模式的な断面図である。
図において、1は石英ルツボ、2はメルト、3
はPを含むn型Si結晶、4はp型Si単結晶を示
す。
FIGS. 1a and 1b are a schematic cross-sectional view of a device showing an embodiment of the present invention, a perspective view of an n-type Si crystal containing P,
Figure 2 is a distribution diagram of the crystal obtained by the present invention in the pulling axis direction, Figure 3 is a resistivity distribution diagram of typical impurities in the pulling axis direction by the ordinary CZ method, and Figure 4 is a diagram of the resistivity distribution diagram of the conventional continuous charge crystal. FIG. 5 is a schematic sectional view of an apparatus using the conventional double crucible method. In the figure, 1 is a quartz crucible, 2 is a melt, and 3 is a quartz crucible.
4 indicates an n-type Si crystal containing P, and 4 indicates a p-type Si single crystal.
Claims (1)
トを用い、シリコン結晶を引き上げ法によつて成
長する方法において、結晶の成長とともに、燐を
含む結晶を成長結晶の周囲の該メルトに徐々に溶
かしながら成長させることを特徴とする結晶成長
方法。1. In a method of growing silicon crystals by a pulling method using a silicon melt containing boron as an impurity, as the crystal grows, a crystal containing phosphorus is grown while being gradually dissolved in the melt surrounding the growing crystal. A crystal growth method characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14910684A JPS6126591A (en) | 1984-07-18 | 1984-07-18 | Crystal growing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14910684A JPS6126591A (en) | 1984-07-18 | 1984-07-18 | Crystal growing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6126591A JPS6126591A (en) | 1986-02-05 |
| JPH0362679B2 true JPH0362679B2 (en) | 1991-09-26 |
Family
ID=15467825
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14910684A Granted JPS6126591A (en) | 1984-07-18 | 1984-07-18 | Crystal growing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6126591A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62226890A (en) * | 1986-03-27 | 1987-10-05 | Komatsu Denshi Kinzoku Kk | Single crystal and its production |
| JPH085740B2 (en) * | 1988-02-25 | 1996-01-24 | 株式会社東芝 | Semiconductor crystal pulling method |
| FR2940806B1 (en) * | 2009-01-05 | 2011-04-08 | Commissariat Energie Atomique | SEMICONDUCTOR SOLIDIFICATION METHOD WITH ADDED DOPE SEMICONDUCTOR LOADS DURING CRYSTALLIZATION |
| DE102014107590B3 (en) | 2014-05-28 | 2015-10-01 | Infineon Technologies Ag | Semiconductor device, silicon wafer and method for producing a silicon wafer |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5266372A (en) * | 1975-11-28 | 1977-06-01 | Nec Home Electronics Ltd | Manufacture of silicon single crystal |
| JPS55130894A (en) * | 1979-03-28 | 1980-10-11 | Hitachi Ltd | Single crystal picking up apparatus |
-
1984
- 1984-07-18 JP JP14910684A patent/JPS6126591A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6126591A (en) | 1986-02-05 |
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