JPH0365027B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to a low-loss semiconductor rectifier that combines a shot barrier and a pn junction, and more specifically,
This invention relates to a semiconductor rectifying element with low loss at high current densities of 150 A/cm ² or more.

[Prior art] A shotgun barrier diode (SBD) operates mainly using multiple carriers, so it has excellent high-speed performance.
It also has the advantage of having a small forward voltage V _F and low forward power loss. However, unlike a p-n junction diode, the substrate resistance does not decrease due to conductivity modulation, so if the current density becomes large, the voltage drop due to the substrate resistance cannot be ignored. For example, if the forward current density becomes 100A/cm ² Forward voltage V _F is 0.7V
The forward voltage is equivalent to that of a pn junction diode.
V _F , and as the current density increases further, the forward voltage V _F becomes larger than that of a pn junction diode.
On the other hand, at low current densities, p-n junction diodes have a higher forward voltage V _F than shot-type barrier diodes, but at high current densities, the apparent substrate resistance decreases due to conductivity modulation. V _F becomes smaller. However, due to the injection of minority carriers, the high speed performance is inferior to that of a shotgun barrier diode. If 150A/ ^cm2
If a rectifying element with a forward voltage V _F lower than that of a pn junction diode when used at a high current density as described above can be obtained, it will be possible to reduce power loss and chip area for the purpose of reducing costs. has great meaning.

On the other hand, general shotgun barrier diodes have a drawback of low reverse breakdown voltage. However, this drawback is that the shot barrier diode disclosed in Japanese Patent Application Laid-open No. 52-24465 is
This problem can be solved to some extent by the technical concept of providing a pn junction, or by the technical concept of Japanese Patent Application Laid-Open No. 56-90565, which utilizes the technical concept of the above-mentioned publication. However, these publications do not disclose any technique for reducing the forward voltage V _F in a high current density region. The conventional shotgun barrier diode described above, which has a pn junction in parallel, maintains high speed by minimizing the injection of minority carriers through the pn junction, and also reduces the current density to a level where voltage drop due to substrate resistance does not become a problem. By suppressing this, the forward voltage V _F is kept small, making full use of the characteristics of the shotgun barrier diode. For this reason,
The area of the pn junction is made as small as possible and the area of the shot barrier is made as large as possible, and as a result, the area of the pn junction is set smaller than the area of the shot barrier. Furthermore, since the current density is suppressed, the chip area increases, leading to an increase in cost.

[Object of the Invention] Therefore, an object of the present invention is to provide a low-loss semiconductor rectifying element that has a large current density of 150 A/cm ² or more and a small forward voltage V _F .

[Structure of the Invention] To achieve the above object, the present invention will be described with reference to the reference numerals in the drawings showing the embodiments. 1 and is surrounded by a semiconductor region 2 of the semiconductor substrate 1 .
a second semiconductor region 3 which is arranged so as to be exposed alternately with the first semiconductor region 2 on one surface of the semiconductor region and has a second conductivity type opposite to the first conductivity type; One electrode metal layer 5 contacts the exposed surface of the region 2 to form a shot barrier and contacts the exposed surface of the second semiconductor region 3 in a non-rectifying manner; 150 A/cm 2 , comprising the exposed first semiconductor region 2 or the other electrode metal layer 6 provided on the surface of the semiconductor region 4 having the same conductivity type as the first semiconductor region ² and having low resistivity. The device allows use at a current density above, and has a surface area S1 of the first semiconductor region 2 in contact with the one electrode metal layer 5 on the one main surface, and the second electrode in contact with the one electrode metal layer 5;
The ratio S2/S1+S2 of the surface area S2 of the second semiconductor region 3 to the sum S1+S2 of the surface area S2 of the semiconductor region 3 is 0.65 to 0.80, and
The present invention relates to a semiconductor rectifying element characterized in that the width of the portion exposed to the surface of the semiconductor region 2 is twice or less the diffusion length of the carrier.

[Effects of the Invention] According to the above invention, the ratio of the surface area S2 of the second semiconductor region 3 for forming a pn junction is 0.65 to
0.80 (65% to 80%), and furthermore, by setting the width exposed on the surface of the first semiconductor region 2 to be less than twice the carrier diffusion length, 150A/cm ²
When used at a current density above, the ratio of carriers injected through the shot barrier to flow through the conductivity modulation region (apparent low resistance region) based on minority carriers injected through the pn junction increases, and The problem of increased voltage drop is eliminated. In other words, even at a high current density, this is equivalent to connecting a shot barrier diode with a small forward voltage V _F in parallel with a pn junction diode, making it possible to reduce the loss or size of the rectifying element and reduce the chip area.

[Example] Next, a semiconductor rectifier according to an example of the present invention will be described with reference to FIGS. 1 to 4.

First, as shown in FIG. 1, a silicon substrate 1 having an epitaxial growth layer is prepared, and an n-type (first
A p ⁺ -type (second conductivity type) second semiconductor region 3 was formed in a rectangular shape by selective diffusion in a first conductivity type (conductivity type) first semiconductor region 2 . The silicon substrate 1 has an n-type first semiconductor region 2 with an impurity concentration of 2×10 ¹⁵ /cm ³ on top of an n ⁺ type region 4 with an impurity concentration of 5×10 ¹⁸ /cm ³ to a thickness of 10 μm. This is the silicon wafer formed. Also
The p ⁺ type second semiconductor region 3 has an average impurity concentration of 6
×10 ¹⁸ /cm ³ , width A is 70 μm, depth is
It is formed to have a thickness of 2 μm. Also, the second
The width B of the n-type first semiconductor region 2 exposed between the semiconductor regions 3 is 30 μm.

Next, Cr was vapor-deposited on one main surface of the substrate 1 to obtain a shot barrier, and further AgNi was continuously vapor-deposited to form an electrode metal layer 5. Also board 1
An electrode metal layer 6 was formed on the other main surface. Note that 7 in FIGS. 1 and 2 is a SiO ₂ film.

In the rectifying element formed as described above, the n-type first semiconductor region 2 is in contact with one electrode metal layer 5 so as to create a shot barrier (rectifying contact).
However, the p ⁺ type second semiconductor region 3 is connected to the electrode metal layer 5
is in resistive contact (non-rectifying contact). Further, the first semiconductor region 2 in contact with the electrode metal layer 5
The ratio of the surface area S2 of the second semiconductor region 3 to the sum S1+S2 of the surface area S1 of the second semiconductor region 3 and the surface area S2 of the second semiconductor region 3 in contact with the electrode metal layer 5 is a=S2/
(S1+S2) is 0.7. In this embodiment, the p ⁺ type second semiconductor regions 3 are regularly arranged in a strip shape, so the ratio of the width A of the region 3 to the width B of the exposed surface of the region 2 is equal to the ratio of S1 and S2. matches A/
(A+B) is 0.7. Furthermore, the width B (30 μm) of the strip-shaped exposed surface of the first semiconductor region 2 is set to a value less than twice the diffusion length of carriers injected from the shot barrier. This is because if the diffusion length of the carrier injected into the shot barrier is smaller than the width B, the resistance in the direction parallel to the main surface cannot be ignored.

When a forward current is passed through the rectifying element as described above at a high current density of 150A/cm ² , the forward voltage V _F is 0.595V.
and was extremely low. Note that the current density was calculated based on the current with respect to the sum of the surface areas S1 and S2 of the first and second semiconductor regions 2 and 3. In order to investigate the relationship between the ratio a=S2/(S1+S2) of the second semiconductor region 3 and the forward voltage V _F , a large number of When a rectifying element was made and the forward voltage V _F at a current density of 150 A/cm ² was measured, the results shown in Figure 4 were obtained.
As is clear from this result, when the ratio a of the second semiconductor region 3 is in the range of 0.65 to 0.80, the current density is 150A/
A rectifying element with a forward voltage V _F of about 0.60 or less in cm ² can be obtained.

The reason why the rectifier according to the present invention has a small forward voltage V _F in the high current density region will be described below with reference to FIG. FIG. 3 is an enlarged view of a part of FIG. 1, with dotted lines representing equipotential lines and arrows representing the flow of carriers injected from the shot barrier. When the voltage applied to the rectifying element shown in FIG. 3 is low, that is, when the current density is low, most of the forward current passes through the shutoff barrier diode portion 2a of the first semiconductor region 2 where the forward voltage _VF is low. flows. On the other hand, as the applied voltage increases (current density increases), the voltage drop due to the substrate resistance of the shot barrier diode portion 2a increases, and the forward voltage applied to the pn junction also increases. Then, when it becomes possible to sufficiently inject minority carriers into the pn junction diode portion 2b of the first semiconductor region 2 by increasing the applied voltage, conductivity modulation occurs here, and the pn junction diode portion 2b of the first semiconductor region 2 undergoes conductivity modulation.
The resistance value of b is apparently small, and part or all of the carrier of the shot barrier diode part 2a becomes a pn junction diode part 2b with a small resistance value.
through which it flows as indicated by the arrows in FIG. The forward voltage V _F of the rectifying element at this time can be approximately expressed by the following equation.

V _F =kT/qlnI ₀ /Js(1-a)+ρLI ₀ /1+(K-
1) a...Equation (1) where I ₀ is the current density, Js is the saturation current density, K is the strength of conductivity modulation, k is Boltzmann's constant, T is the absolute temperature, q is the electron charge, and ρ is resistivity of the first semiconductor region 2, L is the thickness of the first semiconductor region 2, a
is the ratio S2/(S1+S2) of the second semiconductor region 3 to the sum of the exposed surface area S1 of the first semiconductor region 2 and the second semiconductor region S2.

The first term in equation (1) above represents the voltage drop at the shot barrier, and the second term represents the voltage drop at the portions 2a and 2b. In this equation, when each constant is determined in accordance with the example and the relationship between a and V _F is determined by setting K=2, a curve similar to the tendency shown in FIG. 4 is obtained.

As is clear from the above, by setting a in the range of 0.65 to 0.80, it becomes possible to effectively utilize the conductivity modulation region with a low resistance value to flow the current injected into the shotgun barrier, and the current is 150 A/cm ² The increase in forward voltage V _F in the above-described large current region can be effectively suppressed. Therefore, a rectifying element with low power loss can be provided.

Furthermore, when a reverse voltage is applied, the space charge region expands in the n-type first semiconductor region 2, so that the reverse current is reduced and the reverse characteristics are improved.

[Modifications] The present invention is not limited to the above-described embodiments, but includes, for example, the following modifications.

(a) In order to compensate for the reduction in high speed (switching speed) due to the accumulation of minority carriers injected from the p-n junction, Au is placed near the p-n junction as shown in Figure 5.
A lifetime killer diffusion region 8 such as Pt or Pt may be provided.

(b) The impurity concentration of part or all of the pn junction diode portion 2b of the first semiconductor region 2 may be set to a different concentration from that of the shot barrier diode portion 2a so that conductivity modulation is likely to occur.

(c) In order to improve the reverse characteristics, the portion near the surface of the first semiconductor region 2 may be made with a low impurity concentration so that the space charge layer tends to spread.

(d) The second semiconductor region 3 may not be formed into a rectangular shape, but may be formed into a large number of polygonal or round island-like regions.

(e) The first semiconductor region 2 may be of p type and the second semiconductor region 3 may be of n type.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a part of a rectifying element according to an embodiment of the present invention, FIG. 2 is a plan view showing the rectifying element shown in FIG. 1 with the metal layer removed, and FIG. 4 is a cross-sectional view showing an enlarged part of the structure shown in _FIG . , FIG. 5 is a sectional view showing a part of a modified rectifying element. 1... Semiconductor substrate, 2... First semiconductor region,
2a... shot barrier part, 2b... pn junction diode part, 3... second semiconductor region,
5, 6...metal layer.

Claims (1)

[Scope of Claims] 1: a first semiconductor region 2 of a first conductivity type; and a first semiconductor region surrounded by the first semiconductor region 2 with the surface thereof remaining and on one surface of the semiconductor substrate 1; 2 and a second conductivity type opposite to the first conductivity type.
and one electrode metal layer 5 that contacts the exposed surface of the first semiconductor region 2 to form a shot barrier and contacts the exposed surface of the second semiconductor region 3 in a non-rectifying manner. , the other electrode metal provided on the surface of the first semiconductor region 2 exposed on the other main surface of the semiconductor substrate 1 or the semiconductor region 4 of the same conductivity type and low resistivity as the first semiconductor region 2; layer 6 to allow use at a current density of 150 A/cm ² or more, and the first semiconductor region is in contact with the one electrode metal layer 5 on the one main surface. surface area of 2
Ratio S2/of the surface area S2 of the second semiconductor region 3 to the sum S1+S2 of S1 and the surface area S2 of the second semiconductor region 3 in contact with the one electrode metal layer 5 on the one main surface S1+S2 is 0.65
~0.80, and the width of the portion exposed on the surface of the first semiconductor region 2 is not more than twice the carrier diffusion length.