JPH0365893B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a gallium arsenide field effect transistor (GaAs
FET) manufacturing method.

[Conventional technology]

In order to improve the noise characteristics and power gain of GaAs FETs, it is necessary to reduce the gate resistance (Rg), source resistance (Rs), and source-drain capacitance (Cgs), and to improve the transconductance (gm). It is.

For this reason, shortening the gate length reduces Cgs,
It is very effective in improving GM, and many efforts have been made to shorten the gate length.

Generally GaAs with short gate length
The general method for manufacturing FETs is to use photolithography to open a hole in a layer of photoresist in the area where the gate will be formed, expose the GaAs surface, deposit gate metal, and then form the gate using a lift-off method. .

[Problem that the invention seeks to solve]

As described above, conventionally, when forming a gate with a short gate length, there have been the following drawbacks. That is, as the gate length is shortened, the gate resistance increases, which has an adverse effect on noise characteristics and the like. For example, assuming that the gate cross section is rectangular, the gate length and resistance will be inversely proportional if the gate metal thickness is the same.

Therefore, the method for manufacturing a semiconductor device of the present invention has a short gate length, a wide cross-sectional area of the gate,
As a result, the object of the present invention is to provide a method for manufacturing a semiconductor device that has low gate resistance and extremely excellent RF characteristics.

[Means for solving problems]

The method for manufacturing a semiconductor device according to the first aspect of the present invention includes the steps of depositing a lower layer photoresist on a semiconductor substrate, and covering the lower layer photoresist with an upper layer photoresist having a faster dissolution rate in a developer than the lower layer photoresist. a process of exposing and developing the pattern of the area where the gate is to be formed, and forming a step-like cross-sectional shape of the two photoresist layers by utilizing the difference in dissolution rate of the two photoresist layers in a developer; and forming the resist on the region from which the resist has been removed.

Further, the method for manufacturing a semiconductor device according to the second aspect of the present invention includes a step of depositing a lower layer photoresist on a semiconductor substrate, a step of forming a metamorphic layer on the surface of the photoresist, and a step of depositing a lower layer on the metamorphic layer. A step of forming an upper layer of photoresist that has a faster dissolution rate in a developing solution than a photoresist, a step of exposing and developing a pattern of a region where a gate is to be formed and opening a hole in the upper layer of photoresist, and a step of removing a metamorphosed layer in the opening. , developing the lower photoresist layer with a developer to expose the substrate surface and simultaneously forming the cross-sectional shape of the photoresist openings in the two layers into a step-like shape; and covering the gate electrode in the region from which the resist has been removed. The method includes a step of forming an adhesive.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIGS. 1A to 1E are cross-sectional views shown in order of steps to explain an embodiment of the present invention.

First, as shown in FIG. 1a, a GaAs active layer 1 is formed.
Apply a positive photoresist (e.g. manufactured by Shipley) on top.
Apply AZ2400) 2 to a thickness of approximately 0.4 μm by spin coating. Next, a metamorphic layer 3 is formed on the surface of the photoresist 2 by dry etching using Freon gas and hydrogen gas. Next, a positive photoresist (AZ1350J manufactured by Shipley) 4 was applied using a spin coating method.
Adheres to 1μm.

Next, as shown in FIG.
Develop the upper layer photoresist 4 with AZ2401).
Next, the metamorphic layer 3 formed on the lower resist surface is removed by oxygen plasma.

Next, as shown in FIG. 1c, the lower photoresist 2 is further developed with the above developer,
Expose the GaAs surface. At this time, since the dissolution rate of the upper layer photoresist 4 in the developer is faster than that of the lower layer photoresist 2, the cross-sectional shapes of the lower layer photoresist 2 and the upper layer photoresist 4 after the GaAs surface is exposed are as shown in FIG. The opening width of the photoresist is wider than the opening width of the underlying photoresist, and the cross section becomes step-like.

Next, as shown in FIG. 1d, aluminum 6 is deposited as a gate metal over the entire surface to a thickness of about 0.5 μm by vacuum evaporation.

Next, as shown in FIG. 1e, by removing the photoresist with an organic solvent, the excess aluminum 6 is lifted off, and a gate electrode 5' can be formed.

The gate electrode formed in this way has a so-called T-shaped cross-sectional shape, with the width in contact with GaAs being short and the top being wide, allowing the production of GaAs FETs with short gate length and low gate resistance. It is possible to do so.

In the above embodiment, a metamorphic layer of the lower photoresist was formed on the surface of the lower photoresist, but the same effect can be obtained by selecting two photoresist layers without forming a metamorphic layer. In addition, when a metamorphic layer is not formed, the effect can be exhibited more if two photoresists are selected that do not mix.

In the above embodiments, examples using specific materials and specific conditions have been explained, but the invention is not limited to this, and can be applied to methods for manufacturing semiconductor devices using not only GaAs but also silicon and other compounds. Needless to say, it can be applied.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to form a semiconductor device with a short gate length and a wide gate cross-sectional area, which is small in size with low gate resistance, and has excellent RF characteristics. You can.

[Brief explanation of drawings]

FIGS. 1A to 1E are cross-sectional views shown in order of steps to explain an embodiment of the present invention and a manufacturing method thereof. DESCRIPTION OF SYMBOLS 1... GaAs active layer, 2... Lower photoresist, 3... Metamorphic layer of lower photoresist, 4... Upper photoresist, 5... Gate formation region,
5'...gate electrode, 6...aluminum.

Claims (1)

[Claims] 1. A step of depositing a lower photoresist layer on a semiconductor substrate, a step of depositing an upper layer photoresist having a higher dissolution rate in a developer than the lower layer photoresist, and a gate formation plan. A process of exposing and developing the area pattern to form a step-like cross-sectional shape of the two photoresist layers by utilizing the difference in dissolution rate of the two photoresist layers in a developer, and forming a gate electrode in the area from which the resist has been removed. 1. A method of manufacturing a semiconductor device, the method comprising the step of forming an adhesive on a semiconductor device. 2. A step of depositing a lower layer photoresist on a semiconductor substrate, a step of forming a metamorphic layer on the surface of the photoresist, and forming an upper layer photoresist having a higher dissolution rate in a developer than the lower layer photoresist on the metamorphic layer. A step of exposing and developing the gate formation area pattern to open a hole in the upper layer of photoresist, a step of removing the metamorphic layer in the hole, and a step of developing the lower layer of photoresist with a developer to expose the substrate surface. Manufacturing a semiconductor device, comprising the steps of simultaneously forming the cross-sectional shape of the photoresist openings in the two layers into a stepped shape, and forming a gate electrode in the region from which the resist has been removed. Method.