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JPH0372196B2 - - Google Patents
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JPH0372196B2 - - Google Patents

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Publication number
JPH0372196B2
JPH0372196B2 JP57039625A JP3962582A JPH0372196B2 JP H0372196 B2 JPH0372196 B2 JP H0372196B2 JP 57039625 A JP57039625 A JP 57039625A JP 3962582 A JP3962582 A JP 3962582A JP H0372196 B2 JPH0372196 B2 JP H0372196B2
Authority
JP
Japan
Prior art keywords
circuit
oscillation
output
discharge lamp
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57039625A
Other languages
Japanese (ja)
Other versions
JPS58157088A (en
Inventor
Mikio Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KYOSHIN DENKI SEISAKUSHO KK
Original Assignee
KYOSHIN DENKI SEISAKUSHO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KYOSHIN DENKI SEISAKUSHO KK filed Critical KYOSHIN DENKI SEISAKUSHO KK
Priority to JP3962582A priority Critical patent/JPS58157088A/en
Publication of JPS58157088A publication Critical patent/JPS58157088A/en
Publication of JPH0372196B2 publication Critical patent/JPH0372196B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は、正常放電から半波放電に移行した初
期状態を正確に検知して放電を停止させることの
できる放電灯の点灯装置に関するものである。 放電灯の寿命末期においては、放電灯の両放電
電極のエミツシヨン効率の間に大きな差が生じ、
遂には一方の電極が謂ゆる「エミレス」状態とな
つて事実上有効に電子放射をしなくなり、放電灯
は半波放電状態で点灯されることになる。この状
態で点灯を続けることは放電灯の点灯効率の低下
をもたらすだけでなく、インバータの発振出力で
放電灯を点灯する場合には、負荷の異常に起因し
て、インバータの発振回路を構成する各部品に電
力損失を伴う発熱あるいはランプ片側の電極近傍
の過熱を生じ、ひいては発振回路の損傷、あるい
は火災などの災害をもたらすことにもなる。これ
に対する公知の対策技術には、発振トランスの2
次側ないし、多灯点灯用の場合には、バランサー
の2次側に追加巻線を設け、その出力を整流して
得られた直流出力電圧が、放電灯の半波放電状態
に起因する発振トランス2次側出力の波形変化に
基づいて変化するのを利用し、このアナログ信号
で発振を微少レベルに抑えるか、あるいは発振を
停止させる方法がある。(例えば、実開昭57−
18300号公報および実開昭56−56199号公報参照)
しかしこのようなアナログ出力は、放電灯の脱着
(多灯点灯用にあつては一部または全部の放電灯
の)の際などに生ずる負荷の変動や、それに伴う
発振周波数の変化によつても影響を受け、その対
策のためにも回路が複雑となつて安定な動作が期
待できない。 また、放電灯の半波放電現象は、白熱電球の断
線のように正常から異常への変化が瞬間的に発生
するものとは異なり、放電灯の点灯時間や点滅回
数が増えるに従つて放電エミツシヨン物質が徐々
に電極から剥離、蒸発および飛散することにより
徐々に発生し始め、然も完全な半波放電状態に至
るまでの間には、放電灯の電極が熱せられて温度
が上昇することにより半波放電と正常放電とを繰
り返す等の複雑な放電状態が発生する。このよう
な正常放電から完全な半波放電状態に至る過程は
数分乃至数日の比較的長い期間を要するのである
が、この長い期間に亘つてインバータ発振回路の
発振トランスのインピーダンスが変化してパルス
状パルスが発生し、このパルスによつて発振トラ
ンスや発振トランジスタに異常なストレスを与え
る。 然し乍ら、前述の実開昭57−18300号公報およ
び実開昭56−56199号公報の装置のように発振ト
ランスの2次側に設けた検出用巻線のアナログ信
号の変化を検知するものでは、半波放電の発生初
期においては検出信号が小さいために検知するこ
とができない。例えば、実開昭57−18300号公報
の装置では、発振トランスの2次側に設けた互い
に巻数が同一で且つ逆極な一対の検出用巻線の出
力電圧のレベル差を差動増幅器で検出している
が、半波放電の発生初期ではレベル差が極めて小
さいために検出できない。そこで、差動増幅器の
増幅率を大きく設定すると、インバータ発振回路
のスイツチングや放電灯の放電現象に伴い発生し
てインバータ発振回路側に還流される雑音により
誤動作することになる。 本発明の目的は、発振周波数の変化や正常点灯
時の負荷の変動および発振パワーの変化に影響さ
れず、しかも半波放電の発生初期にこれを確実に
検出して発振を停止させることのできる放電灯の
点灯装置を提供することにある。 本発明は、上記目的を達成するために、放電灯
の放電波形が正負非対称になつたのを判別してイ
ンバータ発振回路を発振停止させる制御手段が、
放電灯の両電極間電圧に比例した電圧を正、負に
ついて検知出力する検知手段の正負両側の出力電
圧における各半サイクルの瞬時絶対値が所定レベ
ルを超えた時にそれぞれ所定電圧値のデイジタル
信号をインバータ発振回路の発振周期で出力する
第1および第2の2個の論理回路と、この各論理
回路の出力デイジタル信号をそれぞれ発振周期よ
りも長い時定数により個別に平滑化してパルス信
号に変換する第1および第2の2個の積分回路
と、この各積分回路の何れか一方からのみパルス
信号が出力されたのを検知して出力する第3の論
理回路と、この第3の論理回路の出力パルスをイ
ンバータ発振回路の交流電源の交流周期の約十倍
以上の長い時定数により平滑化して一定の直流電
圧を出力する第3の積分回路と、この第3の積分
回路の出力直流電圧によりオンしてインバータ発
振回路への駆動電流を短絡するスイツチング素子
とを備えてなることを特徴として構成されてい
る。 次に本発明の実施例を図に基づいて説明する。
第1図は本実施例の回路である。 第1図において1点鎖線で囲まれた部分は、既
存の放電灯点灯装置に用いられているのと同等の
インバータ発振回路1である。但し、ダイオード
6、ベース電流付勢用トランス4の巻線5および
発振トランス2の巻線3は、本実施例に基づいて
追加挿入ないし巻回されたものである。上記巻線
5は本実施例により追加された回路部分の電源用
である。巻線3は、放電灯放電電極間の電圧に比
例した電圧をその端子7,9間に出力する。この
巻線の中点端子8は回路の共通基準電位ラインに
接続され、端子8に対する端子7および9の出力
は、それぞれ抵抗10,11および10a,11
aで分圧され、それぞれ論理回路13および13
aの第1の入力端子に入力されている。論理回路
13および13aの第2の入力端子は、それぞれ
抵抗12および12aを介して回路の共通基準ラ
インに接続され(直接、回路の共通基準ラインに
接続してもよい)、その入力状態は常に“O”に
保たれている。ここで上記の論理回路13,13
aおよび後記の論理回路16,27は、すべて
Ex−OR(排他的論理和)回路であつて、その真
理値表は下記に示す通りである。
The present invention relates to a lighting device for a discharge lamp that can accurately detect the initial state of transition from normal discharge to half-wave discharge and stop discharge. At the end of a discharge lamp's life, there is a large difference between the emission efficiencies of both discharge electrodes of the discharge lamp.
Eventually, one of the electrodes enters the so-called "emiless" state, effectively no longer emitting electrons, and the discharge lamp is operated in a half-wave discharge state. Continuing to light the discharge lamp in this state not only causes a decrease in the lighting efficiency of the discharge lamp, but also when lighting the discharge lamp with the oscillation output of the inverter, the inverter's oscillation circuit may be configured due to an abnormality in the load. Each component generates heat accompanied by power loss or overheats near the electrodes on one side of the lamp, which may eventually damage the oscillation circuit or cause disasters such as fire. Known countermeasure techniques for this include two oscillation transformers.
In the case of lighting multiple lamps, an additional winding is installed on the secondary side of the balancer, and the DC output voltage obtained by rectifying the output is caused by oscillation caused by the half-wave discharge state of the discharge lamp. There is a method of suppressing the oscillation to a minute level or stopping the oscillation by using this analog signal, which changes based on the waveform change of the output of the secondary side of the transformer. (For example, Utsukai 57-
(Refer to Publication No. 18300 and Publication No. 56-56199)
However, this kind of analog output is sensitive to changes in the load that occur when discharging lamps (part or all of them in the case of multiple lamp lighting) and changes in the oscillation frequency that occur as a result. Due to the influence, the circuit becomes complicated to take countermeasures against it, and stable operation cannot be expected. In addition, the half-wave discharge phenomenon of a discharge lamp differs from a phenomenon in which the change from normal to abnormal occurs instantaneously, such as when an incandescent light bulb breaks, and the discharge emission changes as the lamp's lighting time and number of flashes increases. The substance gradually peels off from the electrode, evaporates, and scatters, and the discharge begins to occur.However, until a complete half-wave discharge state is reached, the electrode of the discharge lamp is heated and the temperature rises. A complicated discharge state occurs, such as repeating half-wave discharge and normal discharge. The process from normal discharge to complete half-wave discharge takes a relatively long period of time ranging from several minutes to several days, but over this long period the impedance of the oscillation transformer of the inverter oscillation circuit changes. A pulse-like pulse is generated, and this pulse applies abnormal stress to the oscillation transformer and oscillation transistor. However, in devices that detect changes in the analog signal of the detection winding provided on the secondary side of the oscillation transformer, such as the devices of the aforementioned Utility Model Application No. 57-18300 and 1987-56199, In the early stages of half-wave discharge, the detection signal is too small to detect it. For example, in the device disclosed in Japanese Utility Model Application Publication No. 57-18300, a differential amplifier detects the level difference between the output voltages of a pair of detection windings with the same number of turns and opposite polarities provided on the secondary side of an oscillation transformer. However, in the early stages of half-wave discharge, the level difference is extremely small and cannot be detected. Therefore, if the amplification factor of the differential amplifier is set to a large value, malfunction will occur due to noise that is generated due to switching of the inverter oscillation circuit or discharge phenomenon of the discharge lamp and circulated to the inverter oscillation circuit side. An object of the present invention is to be able to stop oscillation by reliably detecting half-wave discharge at the early stage of occurrence, without being affected by changes in oscillation frequency, load fluctuations during normal lighting, and changes in oscillation power. An object of the present invention is to provide a lighting device for a discharge lamp. In order to achieve the above object, the present invention provides a control means that determines when the discharge waveform of the discharge lamp has become asymmetric between positive and negative and stops the oscillation of the inverter oscillation circuit.
A digital signal of a predetermined voltage value is output when the instantaneous absolute value of each half cycle of the output voltage on both the positive and negative sides of the detection means that detects and outputs a voltage proportional to the voltage between both electrodes of the discharge lamp exceeds a predetermined level. Two logic circuits, a first and a second, output at the oscillation period of the inverter oscillation circuit, and the output digital signals of each logic circuit are individually smoothed using a time constant longer than the oscillation period and converted into pulse signals. two integrating circuits, a first and second integrating circuit; a third logic circuit that detects and outputs a pulse signal from only one of the integrating circuits; A third integrating circuit outputs a constant DC voltage by smoothing the output pulse using a time constant approximately ten times longer than the AC cycle of the AC power source of the inverter oscillation circuit, and the output DC voltage of this third integrating circuit The device is characterized in that it includes a switching element that is turned on to short-circuit the drive current to the inverter oscillation circuit. Next, embodiments of the present invention will be described based on the drawings.
FIG. 1 shows the circuit of this embodiment. In FIG. 1, a portion surrounded by a dashed line is an inverter oscillation circuit 1 equivalent to that used in an existing discharge lamp lighting device. However, the diode 6, the winding 5 of the base current energizing transformer 4, and the winding 3 of the oscillation transformer 2 are additionally inserted or wound based on this embodiment. The winding 5 is for the power supply of the circuit section added in this embodiment. Winding 3 outputs a voltage between its terminals 7 and 9 that is proportional to the voltage between the lamp discharge electrodes. The midpoint terminal 8 of this winding is connected to the common reference potential line of the circuit, and the outputs of terminals 7 and 9 to terminal 8 are connected to resistors 10, 11 and 10a, 11, respectively.
a and logic circuits 13 and 13, respectively.
It is input to the first input terminal of a. The second input terminals of the logic circuits 13 and 13a are connected to the circuit's common reference line via resistors 12 and 12a, respectively (or may be directly connected to the circuit's common reference line), and their input states are always It is kept at “O”. Here, the above logic circuits 13, 13
a and the logic circuits 16 and 27 described below are all
It is an Ex-OR (exclusive OR) circuit, and its truth table is as shown below.

【表】 この表においてAは第1入力の状態、Bは第2
入力の状態、fは出力の状態を示す。以上におい
て放電灯が正常点灯状態にあるときは、放電灯放
電電極間の電圧は正負両側に対称で、第2図aに
示すような波形を示し、このような波形の電圧が
巻線3の端子7,9間にも出力される。従つて論
理回路13,13aの第1の入力端子には第2図
bに示すような波形の電圧が入力され、その最高
値を論理回論の入力状態を“1”にするに必要な
値より低く設定しておけば、両論理回路の入力状
態は、第2の入力端子が常に“0”に保たれてい
るので、共に“0”,“0”状態になり、真理値表
から出力状態も共に“0”である。従つてこれら
の出力で駆動される論理回路16の入出力状態も
すべて“0”で、この論理回路16の出力でスイ
ツチングされるトランジスタ23は遮断状態に保
たれる。このため抵抗25に電流が流れず、抵抗
25,26を介して電源ライン24に接続されて
いる論理回路27の両入力は共に状態“1”に保
たれたままで、この場合も真理値表によれば出力
状態は“0”である。従つて、この出力で駆動さ
れるサイリスタ28は遮断状態に保たれ、インバ
ータの発振用トランジスタ31,32のベース・
バイアス回路29,30は何の影響もうけず、発
振は継続されたままである。 また何等かの理由により発振レベルの増大があ
つても、放電灯が正常放電状態にある限り論理回
路13,13aの入力状態は共に“1”,“0”と
なり、共に出力が状態“1”になるので、論理回
路16の入力状態は“1”,“1”となつてその出
力状態は“0”を保ち、この場合にも発振の停止
は起らない。 次に放電灯が半波放電状態になると、放電灯放
電電極間の電圧および巻線3の端子7,9間の電
圧は、第2図cに示すような、上下非対称な波形
となる。この傾向は半波放電状態の進行に伴つて
益々増大する。従つて、巻線3の、端子8に対す
る端子7および端子9の電位は第3図aおよびb
のような波形となる。端子7および9のいづれの
出力が図のaおよびbのいづれに対応するかは、
放電灯のいづれの放電電極の電子放射効率が低下
したかによる。ここでは仮りに端子7の出力がa
に、端子9の出力がbに対応しているものとす
る。これらの電圧が、上述のように抵抗10,1
1または10a,11aで分圧されて、それぞれ
論理回論13および13aの第1の入力端子に入
力される。この時、第3図bの波形が入力される
論理回路13aの方は、入出力ともその状態が変
らず、出力状態は依然として“0”状態にある。
これに対して論理回路13の方は、放電灯の半波
放電状態の進行度により、第3図aの点線で示し
たレベルに対応する抵抗11の両端の電圧が、論
理回路の入力を状態“1”にする値に達していれ
ば、論理回路13の第1の入力は、第3図aの点
線と波形包絡線が交わる期間だけ、発振の周波数
に対応して状態“1”と状態“0”をくり返す。
従つてこの入力信号に応じて、論理回路13の出
力も状態“1”と“0”をくり返し、第3図cに
示すようなデイジタル信号を出力する。このデイ
ジタル信号は、発振の周期より充分に長い時定数
を有する積分回路15で平滑され、第3図dの示
すようなパルス信号として論理回路16の第1の
入力端子に送られる。この論理回路16の第2の
入力端子(論理回路13aの出力に係わる入力端
子)は状態“0”にあるから、出力端子は上記第
3図dのパルスに対応して状態“0”と“1”を
くり返す。この出力は、時定数を発振器交流電源
33の交流周期より10倍以上のオーダーの長い時
間に設定した積分回路22を経て、事実上一定の
直流電圧となり、トランジスタ23のベースに入
力される。この入力によりトランジスタ23は導
通し、その出力抵抗25に電圧降下が生ずるの
で、論理回路27はその入力状態が“1”および
“0”となつて状態“1”を出力する。この出力
によりサイリスタ28が導通し、発振用トランジ
スタ31,32のベース・バイアス回路29,3
0が短絡され、発振は停止する。ここで重要なこ
とは、サイリスタ28が導通しても、その導通抵
抗は完全にゼロとならず、その両端には僅かなが
ら電圧が残り、もし、ダイオード6の挿入がなけ
れば、発振回路は微弱な発振状態を持続するとい
うことである。ダイオード6の立上り電圧がこの
効果を抑止している。 以上の説明において積分回路22の時定数が大
きな値に選ばれているのは、電源投入後放電灯が
定常点灯状態に達するまでの間に起り得る、放電
電極間の電圧異常に装置が応答して発振停止に至
ることを避けるためである。 以上のように本発明の放電灯の点灯装置によれ
ば、少なくとも3個の論理回路により放電灯の両
電極間電圧に比例した正、負の電圧をデイジタル
信号に変換して処理していので、発振周波数の変
動、定常点灯時の負荷の変動、発振パワーの変化
並びにインバータ発振回路のスイツチングや放電
灯の放電に起因する雑音等に影響されることな
く、半波放電現象の発生初期状態を確実に検知し
て発振を停止することができる。然も、この種の
雑音の多い装置において数個の論理回路によるデ
イジタル集積回路を用いても、検出用巻線による
検出信号を、第1および第2の論理回路で波形整
形した後に、発振周期よりも長い時定数を有する
積分回路で平滑化しているので、雑音の影響を除
外できる。 尚、Ex−OR(排多的論理和)回路は、AND回
路、OR回路、NOT回路等の他の論理回路の組み
合わせからもつくられることは勿論である。
[Table] In this table, A is the state of the first input, B is the state of the second input.
The input state and f indicate the output state. In the above, when the discharge lamp is in the normal lighting state, the voltage between the discharge electrodes of the discharge lamp is symmetrical on both the positive and negative sides, and shows a waveform as shown in Figure 2a, and the voltage of this waveform is the voltage of the winding 3. It is also output between terminals 7 and 9. Therefore, a voltage having a waveform as shown in FIG. 2b is input to the first input terminals of the logic circuits 13 and 13a, and its maximum value is the value necessary to set the input state of the logic circuit to "1". If it is set lower, the input states of both logic circuits will be in the "0", "0" state since the second input terminal is always kept at "0", and the output from the truth table will be Both states are "0". Therefore, the input/output states of the logic circuit 16 driven by these outputs are also all "0", and the transistor 23 switched by the output of this logic circuit 16 is kept in a cut-off state. Therefore, no current flows through the resistor 25, and both inputs of the logic circuit 27, which is connected to the power supply line 24 through the resistors 25 and 26, remain in the state "1", and in this case as well, the truth table is According to this, the output state is "0". Therefore, the thyristor 28 driven by this output is kept in a cut-off state, and the bases of the oscillation transistors 31 and 32 of the inverter are
The bias circuits 29 and 30 are not affected and oscillation continues. Even if the oscillation level increases for some reason, as long as the discharge lamp is in a normal discharge state, the input states of the logic circuits 13 and 13a will both be "1" and "0", and both outputs will be in the state "1". Therefore, the input state of the logic circuit 16 becomes "1", "1", and its output state remains "0", and oscillation does not stop in this case as well. Next, when the discharge lamp enters a half-wave discharge state, the voltage between the discharge electrodes of the discharge lamp and the voltage between the terminals 7 and 9 of the winding 3 have vertically asymmetrical waveforms as shown in FIG. 2c. This tendency increases as the half-wave discharge state progresses. Therefore, the potentials of terminals 7 and 9 of winding 3 with respect to terminal 8 are as shown in FIGS. 3a and b.
The waveform will be like this. Which output of terminals 7 and 9 corresponds to a and b in the figure is:
It depends on which discharge electrode of the discharge lamp the electron emission efficiency has decreased. Here, suppose the output of terminal 7 is a
Assume that the output of terminal 9 corresponds to b. These voltages are applied to the resistors 10 and 1 as described above.
1 or divided by voltages 10a and 11a and input to the first input terminals of logic circuits 13 and 13a, respectively. At this time, the input/output state of the logic circuit 13a to which the waveform shown in FIG. 3b is input does not change, and the output state is still in the "0" state.
On the other hand, in the logic circuit 13, depending on the progress of the half-wave discharge state of the discharge lamp, the voltage across the resistor 11 corresponding to the level indicated by the dotted line in FIG. If the value to be set to "1" has been reached, the first input of the logic circuit 13 will be in the state "1" and the state corresponding to the oscillation frequency only during the period where the dotted line in FIG. 3a intersects with the waveform envelope. Repeat “0”.
Accordingly, in response to this input signal, the output of the logic circuit 13 also repeats the states "1" and "0", and outputs a digital signal as shown in FIG. 3c. This digital signal is smoothed by an integrating circuit 15 having a time constant sufficiently longer than the oscillation period, and is sent to a first input terminal of a logic circuit 16 as a pulse signal as shown in FIG. 3d. Since the second input terminal of this logic circuit 16 (the input terminal related to the output of the logic circuit 13a) is in the state "0", the output terminal is in the state "0" and "0" in response to the pulse shown in FIG. Repeat 1”. This output passes through an integrating circuit 22 whose time constant is set to a long time on the order of 10 times or more than the AC cycle of the oscillator AC power supply 33, becomes a virtually constant DC voltage, and is input to the base of the transistor 23. This input makes the transistor 23 conductive and a voltage drop occurs across its output resistor 25, so that the logic circuit 27 has its input states "1" and "0" and outputs the state "1". This output makes the thyristor 28 conductive, and the base bias circuits 29 and 3 of the oscillation transistors 31 and 32
0 is shorted and oscillation stops. What is important here is that even if the thyristor 28 conducts, its conduction resistance does not become completely zero, and a slight voltage remains at both ends.If the diode 6 were not inserted, the oscillation circuit would be weak. This means that the oscillation state is maintained. The rising voltage of diode 6 suppresses this effect. In the above explanation, the time constant of the integrating circuit 22 is selected to be a large value because the device responds to voltage abnormalities between the discharge electrodes that may occur after the power is turned on until the discharge lamp reaches a steady lighting state. This is to prevent the oscillation from stopping. As described above, according to the discharge lamp lighting device of the present invention, the positive and negative voltages proportional to the voltage between the electrodes of the discharge lamp are converted into digital signals and processed by at least three logic circuits. Ensures the initial state of half-wave discharge phenomenon without being affected by fluctuations in oscillation frequency, fluctuations in load during steady lighting, changes in oscillation power, and noise caused by switching of the inverter oscillation circuit and discharge of the discharge lamp. It is possible to detect this and stop the oscillation. However, even if a digital integrated circuit made up of several logic circuits is used in this type of noisy device, the oscillation period can be determined after the detection signal from the detection winding is waveform-shaped by the first and second logic circuits. Since smoothing is performed using an integrating circuit with a longer time constant than the above, the influence of noise can be excluded. It goes without saying that the Ex-OR (exclusive OR) circuit can also be made from a combination of other logic circuits such as an AND circuit, an OR circuit, and a NOT circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本実施例の回路図、第2図および第3
図は、本実施例の回路の各部における電圧波形を
示す図である。 1……インバーターの発振回路、2……発振ト
ランス、3……放電電圧に比例した電力を出力す
る巻線、4……ベース電流付勢用トランス、5…
…電源用巻線、6……ダイオード、7,8,9…
…巻線3の端子、10,11,12,10a,1
1a,12a,25,26……抵抗、13,13
a,16,27……論理回路、15,15a,2
2……積分回路、24……電源ライン、28……
サイリスタ、29,30……ベース・バイアス回
路、32,31……トランジスタ、33……交流
電源。
Figure 1 is a circuit diagram of this embodiment, Figures 2 and 3 are
The figure is a diagram showing voltage waveforms at various parts of the circuit of this example. 1... Inverter oscillation circuit, 2... Oscillation transformer, 3... Winding that outputs power proportional to discharge voltage, 4... Base current energizing transformer, 5...
...Power supply winding, 6...Diode, 7, 8, 9...
...Terminals of winding 3, 10, 11, 12, 10a, 1
1a, 12a, 25, 26...Resistance, 13, 13
a, 16, 27...Logic circuit, 15, 15a, 2
2...Integrator circuit, 24...Power line, 28...
Thyristor, 29, 30...Base bias circuit, 32, 31...Transistor, 33...AC power supply.

Claims (1)

【特許請求の範囲】[Claims] 1 発振トランスの2次側出力により放電灯を点
灯するインバータ発振回路と、前記発振トランス
に巻回して設けた検出用巻線により放電灯の両電
極間電圧に比例した電圧を正、負について検知出
力する検知手段と、この検知手段の出力から放電
灯の放電波形が正負非対称になつたのを判別して
前記インバータ発振回路を発振停止させる制御手
段とを備えてなる放電灯の点灯装置において、前
記制御手段が、前記検知手段の正負両側の出力電
圧における各半サイクルの瞬時絶対値が所定レベ
ルを超えた時にそれぞれ所定電圧値のデイジタル
信号を前記インバータ発振回路の発振周期で出力
する第1および第2の2個の論理回路と、その各
論理回路の出力デイジタル信号をそれぞれ前記発
振周期よりも長い時定数により個別に平滑化して
パルス信号に変換する第1および第2の2個の積
分回路と、この各積分回路の何れか一方からのみ
パルス信号が出力されたのを検知して出力する第
3の論理回路と、この第3の論理回路の出力パル
スを前記インバータ発振回路の交流電源の交流周
期の約十倍以上の長い時定数により平滑化して一
定の直流電圧を出力する第3の積分回路と、この
第3の積分回路の出力直流電圧によりオンして前
記インバータ発振回路への駆動電流を短絡するス
イツチング素子とを備えてなることを特徴とする
放電灯の点灯装置。
1. An inverter oscillation circuit that lights the discharge lamp using the secondary output of the oscillation transformer, and a detection winding wound around the oscillation transformer to detect positive and negative voltages proportional to the voltage between the electrodes of the discharge lamp. A discharge lamp lighting device comprising: a detection means for outputting an output; and a control means for determining from the output of the detection means that the discharge waveform of the discharge lamp has become asymmetric between positive and negative, and stopping the oscillation of the inverter oscillation circuit, A first and a first circuit, wherein the control means outputs a digital signal of a predetermined voltage value at the oscillation period of the inverter oscillation circuit when the instantaneous absolute value of each half cycle of the positive and negative output voltages of the detection means exceeds a predetermined level. a second two logic circuits, and two first and second integration circuits that individually smooth the output digital signals of each of the logic circuits using time constants longer than the oscillation period and convert them into pulse signals. and a third logic circuit that detects and outputs a pulse signal from only one of the integration circuits, and outputs the output pulse of the third logic circuit to the AC power supply of the inverter oscillation circuit. a third integrating circuit that outputs a constant DC voltage by smoothing it with a time constant that is about ten times longer than the AC cycle; and a third integrating circuit that is turned on by the output DC voltage of the third integrating circuit to drive the inverter oscillation circuit. A lighting device for a discharge lamp, comprising a switching element that short-circuits current.
JP3962582A 1982-03-12 1982-03-12 Device for firing discharge lamp Granted JPS58157088A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3962582A JPS58157088A (en) 1982-03-12 1982-03-12 Device for firing discharge lamp

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3962582A JPS58157088A (en) 1982-03-12 1982-03-12 Device for firing discharge lamp

Publications (2)

Publication Number Publication Date
JPS58157088A JPS58157088A (en) 1983-09-19
JPH0372196B2 true JPH0372196B2 (en) 1991-11-15

Family

ID=12558281

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3962582A Granted JPS58157088A (en) 1982-03-12 1982-03-12 Device for firing discharge lamp

Country Status (1)

Country Link
JP (1) JPS58157088A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58178996A (en) * 1982-04-14 1983-10-20 ヘルメス電機株式会社 Device for firing discharge lamp
JPS62234897A (en) * 1986-04-04 1987-10-15 小糸工業株式会社 Lamp device using neon tubes

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5656199U (en) * 1979-10-08 1981-05-15
JPS5718300U (en) * 1980-07-04 1982-01-30

Also Published As

Publication number Publication date
JPS58157088A (en) 1983-09-19

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