Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JPH0374043B2 - - Google Patents
[go: Go Back, main page]

JPH0374043B2 - - Google Patents

Info

Publication number
JPH0374043B2
JPH0374043B2 JP57022505A JP2250582A JPH0374043B2 JP H0374043 B2 JPH0374043 B2 JP H0374043B2 JP 57022505 A JP57022505 A JP 57022505A JP 2250582 A JP2250582 A JP 2250582A JP H0374043 B2 JPH0374043 B2 JP H0374043B2
Authority
JP
Japan
Prior art keywords
signal
drain
gate
fet
mixer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57022505A
Other languages
Japanese (ja)
Other versions
JPS58139505A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2250582A priority Critical patent/JPS58139505A/en
Publication of JPS58139505A publication Critical patent/JPS58139505A/en
Publication of JPH0374043B2 publication Critical patent/JPH0374043B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/12Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes
    • H03D7/125Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes with field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Superheterodyne Receivers (AREA)

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明はFET(電界効果トランジスタ)を用い
たマイクロ波用ミクサ回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a microwave mixer circuit using FETs (field effect transistors).

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

マイクロ波帯のミクサ回路には従来ダイオード
が主に用いられており、第1図にダイオードミク
サ回路の構成を示した。このダイオードミクサ回
路では、信号入力端子1からの信号と、局発信号
入力端子2から局発信号とが方向性結合器等の合
成器3で合成されてミクサダイオード4に印加さ
れ、ダイオード4の電流一電圧の非線形特性によ
つて発生した中間周波信号成分を低域通過フイル
タ5を介して中間周波(IF)出力端子6から取
り出す。すなわち、このダイオードミクサでは信
号と局発信号との合成器3が必要で回路構成が複
雑になる。更に、合成器3は通常局発信号に対し
結合が弱くなるようにしてあるため局発信号源の
出力を大きくする必要があり、また合成器3での
信号損失により性能が低下する等の欠点があつ
た。さらに、通常合成器3とダイオード4の間に
整合回路を必要とするが、信号と局発信号は周波
数が異なるため、両方の周波数で最適整合条件を
満足させることが困難であり、特性が悪くなると
いう欠点があつた。
Conventionally, diodes have been mainly used in microwave band mixer circuits, and the configuration of a diode mixer circuit is shown in FIG. In this diode mixer circuit, a signal from a signal input terminal 1 and a local oscillator signal from a local oscillator signal input terminal 2 are combined by a combiner 3 such as a directional coupler and applied to a mixer diode 4. An intermediate frequency signal component generated due to the nonlinear characteristic of current and voltage is extracted from an intermediate frequency (IF) output terminal 6 via a low-pass filter 5. That is, this diode mixer requires a synthesizer 3 for combining the signal and the local oscillator signal, making the circuit configuration complicated. Furthermore, since the combiner 3 is usually designed to weakly couple the local oscillator signal, it is necessary to increase the output of the local oscillator signal source, and there are disadvantages such as signal loss in the combiner 3, which degrades performance. It was hot. Furthermore, a matching circuit is usually required between the combiner 3 and the diode 4, but since the signal and the local signal have different frequencies, it is difficult to satisfy the optimal matching conditions at both frequencies, resulting in poor characteristics. It had the disadvantage of becoming.

一方、近年GaAsFETの高性能化に伴い、FET
を用いたマイクロ波ミクサ回路が用いられてお
り、局発信号をFETのゲートに印加するゲート
ミクサと、ドレインに印加するドレインミクサが
ある。第2図はゲートミクサの回路構成図であ
り、第1図と共通する部分には同一番号を付し
た。11はFETであり、12,13,14はそ
れぞれソース、ゲート、ドレインである。すなわ
ち、ソース12は接地され、ゲート13には合成
器で合成された信号と局発信号が印加される。ゲ
ート13に印加された局発信号によつてドレイン
電流が変調され、FET11のトランスコンダク
タンス等の非線形性により、信号は中間周波に変
換されて、低域通過フイルタ5を介して端子6か
ら取り出される。このゲートミクサには変換利得
があるという長所はあるが、信号と局発信号を合
成する回路を必要とするため、前述のダイオード
ミクサで述べたのと同様の欠点があつた。
On the other hand, with the improvement in performance of GaAsFET in recent years, FET
A microwave mixer circuit using a FET is used, and there is a gate mixer that applies the local oscillator signal to the gate of the FET, and a drain mixer that applies it to the drain. FIG. 2 is a circuit diagram of the gate mixer, and parts common to those in FIG. 1 are given the same numbers. 11 is a FET, and 12, 13, and 14 are a source, a gate, and a drain, respectively. That is, the source 12 is grounded, and the gate 13 is applied with a signal synthesized by a synthesizer and a local oscillation signal. The drain current is modulated by the local oscillation signal applied to the gate 13, and the signal is converted to an intermediate frequency due to nonlinearity such as the transconductance of the FET 11, and is taken out from the terminal 6 via the low-pass filter 5. . This gate mixer has the advantage of having a conversion gain, but because it requires a circuit to synthesize the signal and the local signal, it has the same drawbacks as the diode mixer described above.

一方、ドレインミクサの回路構成を第3図に示
す。第3図中、第2図と共通するものには同一番
号を付した。なお、37,38はそれぞれFET
のゲートバイアス端子とドレインバイアス端子で
あり、35,36はRFチヨーク、32〜34は
直流阻止用キヤパシタ、30,31はそれぞれ信
号、局発信号に対する整合回路である。すなわ
ち、端子2から入射した局発信号はドレイン14
に印加され、FET11のゲート、ドレイン間容
量Cgd、ドレインコンダクタンスgd等の非線形性
により、端子1から入射し、ゲート13に印加さ
れた信号が中間周波に変換されて、ドレイン14
から低域通過フイルタ5を介して端子6から取り
出される。すなわち、ドレインミクサには第1
図、第2図で述べたような信号と、局発信号との
合成器が不要になるという長所がある。しかしな
がら、従来のFETミクサはいずれもドレインと
ゲートにバイアス電圧を印加する必要があり、と
くにGaAsFETではドレインに正、ゲートに負の
2種類の電源が必要になるという欠点がある。
FETのバイアスを一電源化するため、ソースと
接地間に自己バイアス用の抵抗(RS)と高周波
短絡用のキヤパシタ(CS)を並列に接続すること
もあるが、この方法では回路が複雑であり、相互
接続するワイヤの本数が増すため、高周波特性の
劣化、信頼性の劣化等の問題点が生ずる。
On the other hand, the circuit configuration of the drain mixer is shown in FIG. In FIG. 3, the same numbers as those in FIG. 2 are given the same numbers. In addition, 37 and 38 are FETs, respectively.
35 and 36 are RF chokes, 32 to 34 are DC blocking capacitors, and 30 and 31 are matching circuits for signals and local signals, respectively. That is, the local oscillator signal input from the terminal 2 is transmitted to the drain 14.
Due to the nonlinearity of the capacitance Cgd between the gate and drain of the FET 11, the drain conductance gd, etc., the signal input from the terminal 1 and applied to the gate 13 is converted to an intermediate frequency, and the signal is applied to the drain 14.
is taken out from the terminal 6 via the low-pass filter 5. In other words, the drain mixer has the first
This has the advantage that there is no need for a synthesizer between the signal and the local oscillator signal as described in FIGS. However, all conventional FET mixers require a bias voltage to be applied to the drain and gate, and GaAsFETs in particular have the disadvantage of requiring two types of power supply, one positive for the drain and one negative for the gate.
In order to unify the FET bias from one power supply, a self-biasing resistor ( RS ) and a high-frequency shorting capacitor ( CS ) are sometimes connected in parallel between the source and ground, but this method requires a complicated circuit. As the number of interconnected wires increases, problems such as deterioration of high frequency characteristics and reliability arise.

〔発明の目的〕[Purpose of the invention]

本発明は上記の欠点を除去するもので、信号と
局発信号との合成器を不要とし、かつ全くバイア
ス用電源無しで動作し、しかも信号と局発信号の
分離度に優れたマイクロ波ミクサ回路を提供する
ことを目的とする。
The present invention eliminates the above-mentioned drawbacks, and provides a microwave mixer that eliminates the need for a mixer for the signal and the local oscillation signal, operates without any bias power supply, and has excellent separation between the signal and the local oscillation signal. The purpose is to provide circuits.

〔発明の概要〕[Summary of the invention]

本発明はFETをソース接地とし、ゲートに高
周波信号を、ドレインに局発信号を印加して、前
記ドレインからIFを出力する構成のマイクロ波
ミクサ回路において、前記FETのゲートおよび
ドレインには直流電源によるバイアス電圧を印加
しないことを特徴とするマイクロ波ミクサ回路で
ある。
The present invention provides a microwave mixer circuit having a configuration in which the source of the FET is grounded, a high frequency signal is applied to the gate, a local oscillation signal is applied to the drain, and an IF is output from the drain. This is a microwave mixer circuit characterized in that no bias voltage is applied.

〔発明の実施例〕[Embodiments of the invention]

以下本発明の一実施例を図面を参照して説明す
る。
An embodiment of the present invention will be described below with reference to the drawings.

第4図は本発明のミクサ回路の構成図であり、
44はFET、45,46,47はそれぞれFET
44のソース、ゲート、ドレインである。FET
44のソース45は接地し、ゲート46と信号入
力端子41との間には信号に対する整合回路50
を設ける。信号入力は信号入力端子41から整合
回路50を介してゲート46に印加される。一
方、端子42は局発信号入力端子であり、局発信
号はバンドパスフイルタ49と、局発信号に対す
る整合回路51を介してドレイン47に印加され
る。このようにFET44に信号と局発信号とを
印加すると、以下に述べるFET44の非線形効
果により中間周波成分が発生し、この中間周波信
号はドレイン47から中間周波通過フイルタ48
を介して端子43から取り出される。すなわち、
このミクサは第3図に示したドレインミクサと回
路構成は似ているが、FETのドレインおよびゲ
ートにはバイアスを印加しない。ただし、局発信
号によりFETに自己整流電流が流れる動作条件
の場合にはドレイン47と直流的に同電位の任意
の端子と接地間に直流リターン用のチヨーク回路
55を接続する。また、ゲートをソースと同電位
にするために、ゲート46と直流的に同電位の任
意の端子と接地間にチヨーク回路53を接続す
る。
FIG. 4 is a configuration diagram of the mixer circuit of the present invention,
44 is FET, 45, 46, 47 are each FET
44 sources, gates, and drains. FET
The source 45 of 44 is grounded, and a matching circuit 50 for the signal is connected between the gate 46 and the signal input terminal 41.
will be established. A signal input is applied from the signal input terminal 41 to the gate 46 via the matching circuit 50. On the other hand, the terminal 42 is a local oscillation signal input terminal, and the local oscillation signal is applied to the drain 47 via a bandpass filter 49 and a matching circuit 51 for the local oscillation signal. When a signal and a local oscillation signal are applied to the FET 44 in this way, an intermediate frequency component is generated due to the nonlinear effect of the FET 44 described below, and this intermediate frequency signal is passed from the drain 47 to the intermediate frequency pass filter 48.
It is taken out from the terminal 43 via. That is,
This mixer has a similar circuit configuration to the drain mixer shown in FIG. 3, but no bias is applied to the drain and gate of the FET. However, in the case of an operating condition in which a self-rectified current flows through the FET due to a local signal, a DC return circuit 55 is connected between an arbitrary terminal having the same DC potential as the drain 47 and the ground. Further, in order to make the gate and the source have the same potential, a chiyoke circuit 53 is connected between an arbitrary terminal having the same DC potential as the gate 46 and the ground.

以下、このFETミクサの動作原理をシヨツク
レーのグラジユアルチヤネルモデルを用いて説明
する。ソース接地FETのソース、ゲート、ドレ
インの電圧をそれぞれVS(=0)、VG、VDとする
と、ドレイン電流IDは非飽和領域(ID=ID1)と飽
和領域(ID=ID2)に分けて以下のように近似され
る。
The operating principle of this FET mixer will be explained below using Schottsley's gradient channel model. If the source, gate, and drain voltages of the source-grounded FET are V S (=0), V G , and V D , respectively, the drain current I D is divided into the non-saturation region (I D = I D1 ) and the saturated region (I D = I D2 ) and approximated as follows.

ID1=IS[3VD/UO−2{(VD−VG+VB/UO))2/3 −(−VG+VB/UO2/3}] …(1) ID2=IS〔1−3−VG+VB/UO+2(−VG+VB/UO2/3
〕 …(2) ただし、ISはVG=VBのときのドレイン飽和電
流、VBはゲートのビルトイン電圧、Vpはピンチ
オフ電圧、UO=VB+Vpである。また、ID=ID1
(VD<UO+VG−VB)、ID=ID2(VD>UO+VG−VB)。
I D1 = I S [3V D /U O −2 {(V D −V G +V B /U O )) 2/3 −(−V G +V B /U O ) 2/3 }] …(1) I D2 = I S [1-3-V G +V B /U O +2 (-V G +V B /U O ) 2/3
] ...(2) However, I S is the drain saturation current when V G = V B , V B is the gate built-in voltage, V p is the pinch-off voltage, and U O = V B + V p . Also, I D = I D1
(V D < U O + V G − V B ), I D = I D2 (V D > U O + V G − V B ).

第5図に、VB=1V、Vp=2.5V(UO=3.5V)、IS
=0.1Aとし、VG=0Vと−2.5Vの場合のVDに対す
るIDの変化を示した。なお、VD<0の場合はドレ
イン電流の向きが反転する。VD>VG−VBの範囲
内でVD−ID特性はVDに対して対称形とならず、
第5図に示すような非線形特性を示すことにな
る。さて、ドレインは直流バイアス電圧VD0と局
発信号VL=vlsinωltが印加されも、ゲートには
直流バイアス電圧VG0と信号VS=vSsinωStが印加
されるものとし、ミクサ動作に関係する(1)式の第
2項のみのドレイン電流をI′dとすると、 I′d=−2IS/UO 2/3(VB+VD0−VG0+vlsinωlt−VSSi
St)2/3…(3) となり、A=2IS/UO 2/3、VX=VB+VD0−VG0とす
ると、 I′d=−A(VX+vlsinωlt−vSsinωSt)2/3 …(4) このうちvSの線形項のみを含むI″dを抜き出すと、 I″d=3/2A(VX+vlsinωlt)2/3VSsinωSt…(5) となる。(VX+vlsinωlt)1/2は局発周波数の調波
成分(nωl)を含むが基本波成分は近似的に
1/2√VXvlsinωltとかけるので、ドレイン電流に 含まれる中間周波成分Idifと求まる。(6)式から明らかなようにVB+VD0
VG0>0を満足する範囲でVB+VD0−VG0が小なる
程Idifは大となり、変換損失は小となる。すなわ
ち、VD0は負、VG0は正で、各々の絶対値が大な
る程Idifは大なるが、実際上はVBは1V程度と小さ
く、また、VD0≧0、VG0≦0の実用的な動作範
囲内で考えれば、ドレインの直流バイアスVD0
よびゲートの直流バイアスVG0は共に0Vの場合が
最も変換損失が小さくなる。また、この場合が回
路構成上の利点が大きい。すなわち、このミクサ
回路は信号と局発信号の合成回路を必要とせず、
しかもFETのゲートとドレイン間容量は小さい
ため、局発信号の信号端子への漏れ電力は小さ
く、さらにFETの直流バイアス電圧を必要とし
ないため、全くの無電源で動作するという特長が
ある。
In Figure 5, V B = 1V, V p = 2.5V (U O = 3.5V), I S
= 0.1A, and the change in I D with respect to V D when V G = 0 V and -2.5 V is shown. Note that when V D <0, the direction of the drain current is reversed. Within the range of V D > V G −V B , the V D −I D characteristic is not symmetrical with respect to V D ;
This results in nonlinear characteristics as shown in FIG. Now, it is assumed that the DC bias voltage V D0 and the local oscillator signal V L = v l sinω l t are applied to the drain, but the DC bias voltage V G0 and the signal V S = v S sinω S t are applied to the gate. , if the drain current of only the second term in equation (1) related to mixer operation is I' d , then I' d = −2I S /U O 2/3 (V B +V D0 −V G0 +v l sinω l t-V S Si
S t ) 2/3 …(3), and assuming that A=2I S /U O 2/3 and V X = V B +V D0 −V G0 , I′ d = −A ( V t−v S sinω S t) 2/3 …(4) If I″ d , which includes only the linear term of v S , is extracted, I″ d = 3/2A (V X + v l sinω l t) 2/ 3 V S sinω S t…(5). ( V _ _ _ _ _ _ The intermediate frequency component I dif included in the current is That's what I find. As is clear from equation (6), V B +V D0
Within the range that satisfies V G0 > 0, the smaller V B +V D0 −V G0 becomes, the larger I dif becomes, and the smaller the conversion loss becomes. That is, V D0 is negative and V G0 is positive, and the larger the absolute value of each, the larger I dif , but in reality, V B is as small as about 1 V, and V D0 ≧0, V G0 ≦0 Within the practical operating range, the conversion loss is smallest when the drain DC bias V D0 and the gate DC bias V G0 are both 0V. Moreover, this case has great advantages in terms of circuit configuration. In other words, this mixer circuit does not require a signal and local signal synthesis circuit,
Moreover, since the capacitance between the gate and drain of the FET is small, the leakage power of the local signal to the signal terminal is small, and since the FET does not require a DC bias voltage, it has the advantage of operating without any power supply.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、信号と局発
信号の合成回路を必要としないため、従来のダイ
オードミクサで起つていた信号の損失、局発電力
を大きくする等の欠点を除くことができ、さらに
局発信号の信号端子への漏れ電力が小さく、全く
バイアス電源なしで動作させることのできるマイ
クロ波ミクサ回路を提供できる。
As described above, according to the present invention, there is no need for a combining circuit for a signal and a local oscillator signal, thereby eliminating the disadvantages such as signal loss and increased local power generated by conventional diode mixers. Furthermore, it is possible to provide a microwave mixer circuit which has low leakage power of the local oscillator signal to the signal terminal and can be operated without any bias power supply.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のダイオードミクサ回路の構成
図、第2図は従来のFETゲートミクサ回路の構
成図、第3図は従来のFETドレインミクサ回路
の構成図、第4図は本発明のFETドレインミク
サ回路の一実施例を示す構成図、第5図は本発明
に係るFETドレインミクサ回路の動作を説明す
るためのFETのドレイン電圧、電流特性の一例
を示す曲線図である。 1,41…信号入力端子、2,42…局発信号
入力端子、6,43…IF出力端子、11,44
…FET、5,29,48,49…フイルタ、3
0,31,50,51…整合回路、32,33,
34…キヤパシタ、35,36,53…RFチヨ
ーク。
Fig. 1 is a block diagram of a conventional diode mixer circuit, Fig. 2 is a block diagram of a conventional FET gate mixer circuit, Fig. 3 is a block diagram of a conventional FET drain mixer circuit, and Fig. 4 is a block diagram of the FET drain mixer circuit of the present invention. FIG. 5 is a block diagram showing one embodiment of the circuit, and is a curve diagram showing an example of the drain voltage and current characteristics of the FET to explain the operation of the FET drain mixer circuit according to the present invention. 1,41...Signal input terminal, 2,42...Local signal input terminal, 6,43...IF output terminal, 11,44
...FET, 5, 29, 48, 49...Filter, 3
0, 31, 50, 51... matching circuit, 32, 33,
34...Capacitor, 35, 36, 53...RF chiyoke.

Claims (1)

【特許請求の範囲】[Claims] 1 電界効果トランジスタをソース接地とし、こ
の電界効果トランジスタのゲートに高周波信号
を、ドレインに局発信号を印加してこのドレイン
から中間周波信号を出力する構成のマイクロ波ミ
クサ回路において、前記電界効果トランジスタの
ドレインおよびゲートをそれぞれバイアス電源に
は接地せずに整合回路の一部を介して接地するよ
うにしたことを特徴とするマイクロ波ミクサ回
路。
1. In a microwave mixer circuit having a configuration in which a field effect transistor is connected to the source, a high frequency signal is applied to the gate of the field effect transistor, a local oscillation signal is applied to the drain of the field effect transistor, and an intermediate frequency signal is output from the drain, the field effect transistor A microwave mixer circuit characterized in that its drain and gate are not grounded to a bias power supply but are grounded through a part of a matching circuit.
JP2250582A 1982-02-15 1982-02-15 Microwave mixer circuit Granted JPS58139505A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2250582A JPS58139505A (en) 1982-02-15 1982-02-15 Microwave mixer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2250582A JPS58139505A (en) 1982-02-15 1982-02-15 Microwave mixer circuit

Publications (2)

Publication Number Publication Date
JPS58139505A JPS58139505A (en) 1983-08-18
JPH0374043B2 true JPH0374043B2 (en) 1991-11-25

Family

ID=12084600

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2250582A Granted JPS58139505A (en) 1982-02-15 1982-02-15 Microwave mixer circuit

Country Status (1)

Country Link
JP (1) JPS58139505A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10097389B1 (en) * 2017-12-04 2018-10-09 National Chung Shan Institute Of Science And Technology Signal modulator

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57112108A (en) * 1980-12-29 1982-07-13 Fujitsu Ltd Frequency converter

Also Published As

Publication number Publication date
JPS58139505A (en) 1983-08-18

Similar Documents

Publication Publication Date Title
US4734591A (en) Frequency doubler
US4334324A (en) Complementary symmetry FET frequency converter circuits
KR880002322A (en) Gyrator circuit and resonant circuit
JP2003078355A (en) Mixer circuit
JPH04502539A (en) Single input/differential output amplifier
US4449245A (en) High gain balanced mixer
US4677691A (en) Microwave receiver
JP3339892B2 (en) Integrated circuit and method of using same
JPS63309007A (en) mixer circuit
US8476958B2 (en) Mixer circuit
US6861891B2 (en) Sub-harmonic mixer
US5963858A (en) Method and apparatus for mixing signals
US6388501B2 (en) MOSFET mixer for low supply voltage
US7084693B2 (en) Sub-harmonic mixer
JPH0374043B2 (en)
JPS59144910U (en) balanced mixer circuit
JPH0586684B2 (en)
JP2563286B2 (en) Frequency mixing circuit
JPS6272210A (en) field effect transistor circuit
JP2836358B2 (en) Differential amplifier circuit
JPS6294002A (en) Microwave receiver
JPS5924196Y2 (en) FET switch circuit
JPS60112302A (en) mixer device
JPH0837425A (en) Low distortion mixer
JPH0738456A (en) Microwave mixer circuit