JPH0375073B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a GPS receiver that uses satellites to determine the position of a user in a GPS system.

(Prior Art) In a conventional GPS receiver, a pseudo distance between a satellite and a receiving point is determined by measuring the time of the receiver based on the time of the satellite. For example, by measuring the time of the receiver's clock at the satellite's epoch time, the radio wave propagation delay time between the satellite and the receiving point is known, and the pseudo distance between the satellite and the receiving point is determined.

(Problem to be Solved by the Invention) In this conventional GPS receiver, the measurement resolution of the pseudorange between the satellite and the reception point does not depend on the minimum resolution of the receiver's clock; In order to improve this, it is necessary to improve the minimum resolution of the receiver's clock. That is, in order to improve the measurement resolution of pseudoranges, it is necessary to increase the frequency of the clock that constitutes the clock of the receiver, and ordinary elements have reached their limits.

Here, a supplementary explanation will be given as to why it is necessary to increase the frequency of the clock that constitutes the receiver's clock.

Conventional GPS receivers read the time on the receiver's clock based on the satellite's time. On the other hand, the minimum time resolution of the receiver's clock is determined by the oscillation frequency of the oscillator that constitutes the receiver's clock. That is, the minimum time resolution of the receiver clock depends on the period of the oscillation clock of the oscillator. Therefore, when determining the propagation time from the satellite by measuring the time on the receiver's clock based on the time on the satellite's clock, the measurement resolution depends on the minimum time resolution of the receiver's clock. . In order to improve the minimum time resolution of the receiver's clock, it is necessary to increase the oscillation frequency of the oscillator constituting the receiver's clock and shorten the period of the oscillation clock. However, as the oscillation frequency of the oscillator that makes up the clock becomes higher, the clock must be constructed using elements that can operate at higher speeds, and ordinary elements have reached their limits.

(Means for solving the problems) In order to solve the above-mentioned conventional drawbacks, the present invention has the following features:
A digital oscillator for pseudo distance measurement that generates a pulse synchronized with the PN code transmitted from the satellite by being controlled by a processor and outputs the phase of the pulse, and a digital oscillator for holding the phase output from the digital oscillator. a first holding circuit that sends the stored data to the processor; and a PN that counts up to 1023 pulses output from the digital oscillator and outputs pulses synchronized with the epoch of the PN code and intermediate count values. a code pulse counter; a second holding circuit that holds the count value of the PN code pulse counter in the middle; and a second holding circuit that sends the held count value to the processor; an epoch counter that counts up to 20 pulses synchronized with the epoch counter and outputs an intermediate count value, and holds the intermediate count value of the epoch counter;
and a third holding circuit that sends the held count value to the processor, and improves the pseudo distance measurement resolution by reading the phase of the pulse output from the digital oscillator for pseudo distance measurement, and The present invention provides a pseudo distance measuring circuit for a GPS receiver that eliminates the need to increase the frequency of the clock constituting the receiver's clock, unlike conventional receivers.

(Embodiment) FIG. 1 shows the hardware configuration of a GPS receiver as an embodiment of the present invention, and its operation will be explained.

101 is a received signal from an antenna, which is converted by a frequency conversion circuit 102 to a signal 103 of a lower frequency, and is sent to a correlator 104 and a correlator 109.
are entered in each of the fields. Pseudo noise code generator 1
06 (hereinafter referred to as PN code generator) has the same code arrangement and the same bit rate, but the phase is
E code 107, P code 1 shifted by 180°
A PN code of 05 and L code 108 is generated. The E code 107 leads the P code 105 in phase by 180 degrees, and the L code 108 leads the P code 105 in phase.
The phase is delayed by 180°. Processor 14
1 is a digital processor such as a microprocessor, which performs GPS positioning calculations and controls each part of the GPS receiver.
06 is the bus line 14 of the processor 141.
2, it has a function that can generate the same PN code as the PN code transmitted from the GPS satellite, and the received bit rate is shifted due to the Doppler effect.
PN to follow the PN code from GPS satellites.
The bit rate of the PN code generated by the functions described above in code generator 106 can be varied. Furthermore, the PN code generator 106 has the above-mentioned functions and can also obtain the measurement data necessary to determine the pseudo distance between the GPS satellite and the receiving point, and the obtained measurement data is transmitted to the bus line 142. The data is sent to the processor 141 via the processor 141. In the correlator 104, the signal 103 and P code 1
05 is taken, and a correlation result 144 is obtained. The correlation result 144 is amplified by an amplifier 112 via a filter 110, and is further amplified by a mixer 11.
4, the signal is mixed with the local oscillator signal 120, frequency converted, and an output signal 121 is obtained. The digital oscillator 143 generates an output signal 1 having the same frequency.
25 and an output signal 126, the output signal 126 having a phase lead of 90 degrees with respect to the output signal 125.
Digital oscillator 143 is controlled by processor 141 via bus line 142 so that the frequency and phase of output signal 126 match the frequency and phase of signal 121. The signal 121 and the signal 125 are mixed in the correlator 122, and the output value 123 is sent to the AD converter 13.
3, the analog value is converted into a digital value 137 and taken into the processor 141. Similarly, in mixer 124, signal 121 and signal 12
6 mixing is performed, and the output value 127 is
The analog value is converted into a digital value 138 by the AD converter 134 and taken into the processor 141. The processor 141 demodulates the transmitted data from the satellite by inputting the output 137 of the AD converter 133 and the output 138 of the AD converter 134 to the processor 141, and obtains the information necessary to obtain the pseudo distance between the satellite and the receiving point. It also controls the digital oscillator 143 so that the frequency and phase of the output signal 126 match the received signal 121.
The frequency and phase of the The correlator 109 outputs the difference between the correlation result between the signal 103 and the E code 107 and the correlation result between the signal 103 and the L code 108, resulting in a signal 145.
The signal 145 passes through the filter 115 and then to the amplifier 1.
17 and further mixed with a local oscillation signal 120 by a mixer 119 to obtain a frequency-converted signal 128. In mixer 129, signal 128 is mixed with signal 125, and its output value 130 is converted from an analog value to a digital value by AD converter 135, and the digital value 139 is taken into processor 141. On the other hand, in mixer 131, signal 128 and signal 1
Mixing with 26 is performed, and the output value is 13
2 is converted from an analog value to a digital value by the AD converter 136, and the digital value 140 is taken into the processor 141. Processor 141
By taking in the output 139 of the AD converter 135 and the output 140 of the AD converter 136, the correlation value between the signal 103 and the E code 107,
via the bus line 142 so that the difference between the correlation value of the signal 103 and the L code 108 is zero.
Controls the PN code generator 106. That is, the processor 141 performs control so that the frequency and phase of the PN code transmitted from the satellite and the PN code 105 generated within the receiver match.

FIG. 2 shows the components of an embodiment of the present invention.
The configuration of the PN code generator is shown in Figure 1.
Corresponding to the PN code generator 106, FIG. 3 shows the configuration of a digital oscillator for pseudo distance measurement, and the digital oscillator 2 for pseudo distance measurement in FIG.
Corresponds to 01. Before explaining the operation of the PN code generator shown in FIG. 2, the operation of the pseudo distance measuring digital oscillator 201, which is a component of the PN code generator, will be explained with reference to FIG.

The pseudorange measurement digital oscillator 201 includes an arbitrary number of N-bit flip-flops 302;
It consists of an N-bit adder 304 and an N-bit flip-flop 305, and in FIG. 3, 301 is a set arbitrary value K.
That value is held by flip-flop 302, and the Q output 303 of flip-flop 302 is the held value. In the N-bit adder 304, the held value K303 and the Q output 206 of the N-bit flip-flop 305 are added.
The addition result 308 is held in the N-bit flip-flop 305 at the edge of the clock pulse 306, and an overflow output 202 is obtained if the addition result exceeds 2 ^N -1. Value 206 held in N-bit flip-flop 305
is added to the set value K303 in the adder 304, and the addition result 308 is added to the N-bit flip-flop 3 at the edge of the clock pulse 306.
It is held at 05. Thereafter, similar operations are repeated in synchronization with the edges of clock pulse 306.
The set value 301 is K, the number of bits of flip-flop 302 and flip-flop 305 is N, the adder 304 is an N-bit adder, and the clock pulse is 30.
Letting the frequency of 6 be f ₀ , the frequency of the overflow output 202 obtained when the adder 304 overflows as a result of addition can be expressed as =K/2 ^N · ₀ .

In the following, the operation of the circuit for measuring the time of the satellite shown in FIG. 2 will be explained. Second
In the figure, 201 is the digital oscillator for pseudorange measurement described above, 202 is a pulse output synchronized with the PN code from the satellite, and 206
represents the phase of this pulse output. In addition, in the digital oscillator 201 for pseudo distance measurement, the processor 141 generates the set value 3 via the bus line 142.
By changing the value of 01, the frequency of the output 202 can be changed so that it can follow the PN code from the GPS satellite whose frequency is shifted due to the Doppler effect.

212 is a clock pulse of arbitrary fixed frequency, and the receiver's clock is formed by counting this clock 212. The first holding circuit 209 is a circuit that holds the phase 206 of the pulse 202 using the clock pulse 212. 2
03 is a PN code pulse counter that counts up to 1023 pulses 202, and when it counts 1023 pulses 202, it outputs a pulse 204 synchronized with the epoch of the PN code. As is well known, in the GPS system, the PN code is
It consists of a data string of 1023 chips, and the epoch is the start time of the data string of 1023 chips, and is repeated every 1/1000 seconds. Also, 2
07 indicates an intermediate count value of the PN code pulse counter 203, and the value 207 is stored in the second holding circuit 210 by the clock pulse 212.
is maintained. PN code generation circuit 216 outputs a PN code value corresponding to count value 207. 105 is a P code to be output, 107 is an E code, and 108 is an L code. 205 is an epoch counter that counts up to 20 pulses 204 synchronized with the epoch; 208 represents the count value of the epoch counter 205 in the middle; Retained. 213 is the first
214 is the second holding circuit 210, and 215 is the third holding circuit 2.
11, and are taken into the processor 141 via the bus line 142. The respective values of 206, 207, and 208 are the values of the first holding circuit 209 and the second holding circuit 2.
10 and the third holding circuit 211, the signals are held at the same time by the clock pulse 212. Incidentally, FIG. 4 is a time chart showing the above-mentioned operation. The values of 206, 207, and 208 at a certain time on the receiver's clock will be measured, and the values of 213, 214, and 215 will give
The time of the satellite can be known, and the pseudo distance can be calculated from the difference from the time of the receiver's clock.

If the number of upper bits used for pseudorange measurement of the phase 206 of the output 202 of the pseudorange measurement digital oscillator 201 in FIG. 2 is M, then the measured satellite time T _SV (seconds) is T _SV =Z ×6+N _DT ×20/1000+N _DTC ×1/1000 +N _CDC ×1/1023×1000+N _NCO /2 ^M ×1/1023×10
It can be expressed as 00.

The PN code transmitted from the satellite consists of a data string of 1023 chips, and is repeated every 1/1000 seconds starting from the epoch. That is, one bit of the PN code has a time width of 1/(1000×1023) seconds. Furthermore, the navigation data transmitted from the satellite is transmitted at a rate of 50 bits/second, that is, it has a time width of 20/1000 seconds, and its beginning coincides with the epoch. The subframe is
It consists of 300 bits of data, and its time width is 6 seconds. "6" in the first term of the above equation is the time width (seconds) of the subframe transmitted from the satellite.
, the second term 20/1000 is the time width of 1 bit of data (seconds), the third term 1/1000 is the epoch period (seconds), and the fourth and fifth terms 1/(1000× 1023)
represents the time width (seconds) of one chip of the PN code.

Hereinafter, the above equation will be explained in detail using FIG. 5.

In the above equation, "Z" in the first term is a value usually called "Z count" and represents the start time of the subframe transmitted from the satellite, and the processor 141 demodulates the data transmitted from the GPS satellite. Therefore, the first term "Z×6" represents the start time of the subframe including the measured satellite time _TSV .

"N _DT " in the second term is the measured satellite time
It represents the count from the first bit data in the subframe containing _TSV to the bit data containing the measured satellite time _TSV . Therefore, the second term "N _DT ×20/1000" represents the elapsed time from the start of the subframe including the satellite time T _SV to the start of the bit data including the satellite time T _SV . Also,
_NDT is counted by a counter configured by software in the processor 141.

“N _DTC ” in the third term refers to the third holding circuit 21
1 and thus the value 215 held by the third
The term "N _DTC x 1/1000" represents the elapsed time from the start time of the bit data including the satellite time _TSV to the epoch time.

"N _CDC " in the fourth term is the second holding circuit 21
The value held by 0 is 214 and therefore the fourth
The term "N _CDC × 1/(1023 × 1000)" is the satellite time
It represents the elapsed time from the start time of the PN code cycle including the _TSV to the start time of the PN code chip including the satellite time _TSV .

“N _NCO ” in the fifth term refers to the first holding circuit 20
9 and thus the value 213 held by the fifth
The term "(N _NCO /2 ^M ) x 1/(1023 x 1000)" represents the elapsed time from the start time of the PN code chip including the satellite time T _SV to the satellite time T _SV .

As described above, the pseudorange can be determined from the difference between the measured satellite time _TSV and the receiver time at the time when the satellite time _TSV was measured.

In addition, the processor 141 calculates four pseudo distances.
If it is determined for GPS satellites, the position of the receiving point can be calculated using the GPS positioning principles.

The present invention is characterized in that the measurement resolution of the time of the satellite to be measured is improved by using a digital oscillator for pseudorange measurement and reading its phase value.
The number of upper bits of phase 206 held at 9 is M
Then, pulse 202 is transmitted from the satellite
Since it is synchronized with the PN code, the pulse period is 1/1023 × 10 ³ seconds, and the measurement resolution of the satellite time is 1/1023 × 10 ³ × 1/2 ^M seconds, which is different from the conventional Compared to the method of measuring the receiver time using the satellite time as a reference, by increasing the number M of upper bits of the phase 206, the measurement resolution can be improved. Also, traditional GPS
Compared to the receiver, there is no need to increase the frequency of the clock that constitutes the receiver's clock in order to improve the pseudorange measurement resolution.

(Effects of the Invention) As explained above, in the conventional method of determining the pseudo distance between the satellite and the receiving point by measuring the time of the receiver based on the satellite time, the measurement accuracy is In order to improve the measurement accuracy, it is necessary to increase the resolution of the receiver's clock. In the invention, a digital oscillator for pseudorange measurement is used to generate pulses synchronized with the PN code transmitted from the satellite, and by reading the phase of the pulse, it is possible to measure the radio wave propagation delay time from the satellite to the receiving point with resolution. This has the effect of increasing the accuracy of pseudo distance measurement between the satellite and the receiving point, thereby increasing the accuracy of position measurement.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the measuring circuit of the present invention, FIG. 2 is a block diagram of a PN code generator as a component, FIG. 3 is a block diagram showing the configuration of a digital oscillator for pseudo distance measurement, and FIG. FIG. 4 is a time chart showing the operation of each part of the PN code generator shown in FIG. 2, and FIG. 5 is a diagram showing the structure of data transmitted from the satellite. 102...Frequency conversion circuit, 104, 109,
122, 124, 129, 131... correlator, 1
06...PN code generator, 110,115...
Filter, 112, 117...Amplifier, 114, 1
19...Mixer, 133, 134, 135, 13
6...AD converter, 141...processor,
142... Processor bus line, 143...
Digital oscillator, 201... Digital oscillator for pseudo distance measurement, 203... PN code pulse counter, 205... Epoch counter, 209... First holding circuit, 210... Second holding circuit, 21
1... Third holding circuit, 216... PN code generation circuit, 302... Flip-flop that holds the set value K, 304... Adder, 305... Flip-flop that holds the addition result.

Claims (1)

[Claims] 1 Pseudo-noise code (hereinafter referred to as PN code) that is at least the same as the GPS satellite that you are currently trying to receive
It has a PN code generator that generates a PN code, and a processor that performs positioning calculations and controls each part of the receiver.
In a GPS receiver that determines the position of a receiving point by measuring a pseudo distance between a GPS satellite and a receiving point, the PN
A pseudorange measuring circuit included in the code generator, which generates a pulse synchronized with the PN code transmitted from the satellite by being controlled by the processor, and outputs the phase of the pulse. , a first holding circuit that holds the phase output from the digital oscillator and sends the held data to the processor; and a first holding circuit that counts up to 1023 pulses output from the digital oscillator and outputs the PN code. Outputs pulses synchronized with epoch and intermediate count values
retains a PN code pulse counter and the intermediate count value of the PN code pulse counter;
A second holding circuit sends the held count value to the processor, and counts up to 20 pulses synchronized with the epoch of the PN code output from the PN code pulse counter, and outputs the intermediate count value. An epoch counter to
A pseudo-range measuring circuit for a GPS receiver, comprising a third holding circuit that holds a count value of the epoch counter in progress and sends the held count value to the processor.