JPH0375118B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an endoscope with a built-in solid-state imaging device in which a sample-and-hold circuit and a solid-state imaging device are formed on the same chip.

[Technical Background of the Invention and Problems Therewith] In recent years, various endoscopes using solid-state imaging devices such as charge-coupled devices as imaging means have been proposed.

An endoscope using the solid-state imaging device described above can prevent image quality from deteriorating due to fiber breakage in an endoscope using an image guide formed of an optical fiber bundle (fiber bundle).
It has the advantage of making it easier to record images, etc., and is expected to become more compact and have improved resolution as integration technology progresses, so it is expected to be widely used in the future.

As the solid-state image sensor, a charge coupled device (CCD) having two functions of photoelectric conversion and scanning is widely used.

By the way, since the CCD mentioned above must be housed at the distal end of the insertion tube, which has a diameter as small as possible, like an endoscope, a compact line transfer type CCD with a common light receiving section and a transfer section is suitable. There is. In this line transfer type CCD, when reading out the signal charge corresponding to the image that has been received and accumulated by the light receiving elements arranged so as to be separated into each pixel, if the light is received while the charge is being transferred, the signal charge will be different. The signal corresponding to the desired pixel will be superimposed. In order to reduce this superimposed effect and to prevent a reduction in image brightness (contrast) or resolution due to signal readout time (reduction in illumination time, etc. caused by), other methods such as frame transfer method are used. Signal readout is required at a much higher speed than in the conventional method.

Conventional endoscopes using CCD are
As disclosed in Publication No. 103432, a discrete sample and hold circuit is provided outside the CCD, and by applying a clock signal for signal readout, the sequentially read out video signals are sampled and held. Was.

The configuration of the conventional example described above is as shown in FIG. 1, for example.

That is, the solid-state image sensor 2 housed within the distal end 1 of the endoscope insertion section is connected to the light receiving section (image area) 3.
The light is received by each light receiving element as a signal for each pixel,
The signal charges are photoelectrically converted and accumulated as charges, and the accumulated signal charges are transferred by applying a read clock signal and outputted from the transfer shift register 4 via the buffer 5. The above-mentioned read signal is input to the sample/hold circuit 6 outside the endoscope body, and after being converted to low impedance by a buffer or buffer amplifier,
A sampling pulse applied to the gate of the MOS-FET 7 charges the input terminal of a buffer 8 having a high input impedance, and this charged signal is output from the sample-and-hold circuit 6.

By the way, in the above-mentioned conventional example, since the sample-and-hold circuit 6 is configured as a discrete circuit, the leads for wiring are long, and the stray capacitance 9 due to the leads is formed at the input end of the buffer 8, as shown by the broken line. It will be done. For this reason, the integral constant becomes large, and the sample/hold circuit 6 cannot follow the high-speed readout required for solid-state image sensors used in endoscopes.If a line transfer type CCD is used, Image quality will deteriorate. Furthermore, if it is configured with discrete components, the variation between products will increase due to variations in stray capacitance. Furthermore, the signal output from the solid-state image sensor 2 has a status time t PP in which the signal output from the solid-state image sensor 2 becomes a pulse-like waveform that is reset for each pixel and becomes O level, rather than in a step-like manner, with respect to the subject contrast waveform shown by the broken line _{in FIG.} Since the signal is very short, signal processing at the subsequent stage becomes difficult unless the signal is converted into a step waveform output using a sample-and-hold circuit as shown in FIG.

One possible solution to the above problem is to convert the external sample-and-hold circuit into an integrated circuit (IC), but this has the drawback of being very expensive. There are also integrated circuits, but these are not designed for high-speed operation and have low operating frequencies, so they cannot be used.

[Object of the Invention] The present invention has been made in view of the above-mentioned points, and is capable of responding to high-speed signal readout required for solid-state image sensors used in endoscopes, and capable of providing a step waveform output waveform. An object of the present invention is to provide an endoscope with a built-in solid-state image sensor having a sample-and-hold circuit.

[Summary of the Invention] The present invention provides an endoscope with a circuit that samples and holds output from a solid-state image sensor.

[Embodiments of the Invention] The present invention will be specifically described below with reference to the drawings.

4 and 5 relate to a first embodiment of the present invention, FIG. 4 shows the first embodiment, and FIG. 5 shows a solid-state image sensor chip used in the first embodiment.

As shown in FIG. 4, the endoscope 11 of the first embodiment has an objective lens 13 on the distal end side of the insertion section 12 having a small diameter.
is arranged so that the light is emitted from the end face of the light guide 14 and the illuminated image of the subject is focused on the light receiving section (light receiving surface) 16 of the solid-state image sensor 15 shown in FIG.

Light guide 1 inserted into the insertion section 12
The rear end of the light guide 14 is attached to a light source device 17, and the rear end surface of the light guide 14 is sequentially illuminated with the illumination light of the illumination lamp 18 by each of the three primary colors after passing through the filter device 19 and the condenser lens 20. It's summery.

The signal received by the light receiving section of the solid-state image sensor 15 and accumulated as an electric charge is transferred to the shift register 2 by applying a reading clock signal.
Output from 1. The output terminal of this shift register 21 is connected to the input terminal of a sample and hold circuit 22 formed on the same chip as the solid-state image sensor 15.

The signal sampled and held by this sample and hold circuit 22 is amplified by an amplifier 24 in an external video processing section 23 (on the distal end side of the insertion section 12 or the proximal side of the insertion section 12).
The data is converted into digital data by the AD converter 25, and sequentially written into the frame memories 26R, 26G, and 26B frame by frame.

Above frame memory 26R, 26G, 26B
By sequentially passing red, green, and blue transmission filters formed in, for example, a stripe shape in the filter device 19 using a liquid crystal or the like over time,
Digital data of images of objects illuminated with red, green, and blue illumination lights are written into corresponding frame memories frame by frame. However, these frame memories 26R, 2
Writing to 6G and 26B is performed at high speed during a short turn-off period when switching the color of illumination light. Also, each frame memory 26R, 26
The data written in G and 26B are simultaneously read out, DA converted, and applied to the RGB input terminal of the TV monitor 27.

By the way, the sample and hold circuit 22
is formed on the same chip as the solid-state image sensor 15, that is, a solid-state image sensor chip 31, as shown in FIG. This sample and hold circuit 22
For example, three MOS-FETs 32, 33, 34
It is formed of.

That is, the MOS-FET 32 whose input terminal gate is connected to the output terminal of the shift register 21 is a buffer, and its source is connected to the analog GND via a constant current circuit or a resistor. The signal converted to low impedance as a source follower from this source is sent to the switch MOS-FET3.
3, when the MOS-FET 33 is turned on, it is electrically connected to the gate of the output side buffer MOS-FET 34, and is charged to the equivalent input capacitance 35 between its gate and drain. However, when the sampling signal is no longer applied to the gate of the switch MOS-FET 33 and the source and drain are turned off, the signal is
It is held by the input capacitor 35 of the MOS-FET 34, and the amplifier 2 of the video processing section 23
4) It is designed to be output to the side.

Equivalent input capacitance 35 of the above MOS-FET 34
can be made much smaller than the stray capacitance of the leads of the external sample-and-hold circuit in the conventional example, so the integration time constant can be reduced, and therefore the sample and hold circuit can be sampled at a much higher speed than in the conventional example. It is designed to enable hold operation.

According to the first embodiment, since the sample-and-hold circuit 22 is formed as an IC on the same chip as the solid-state image sensor 15, the input capacitance 35 of the hold buffer 34 can be particularly small, and the path loss can be extremely short. Width strobe signal for switching
By applying the voltage to the gate of the MOS-FET 33, the read signal can be held with almost no reduction in its amplitude, converted into a step waveform as shown in FIG. 3, and held.

Therefore, signal readout can be performed at a very high speed, and since the waveform output from the sample/hold circuit 22 is a step waveform signal, the timing and AD conversion can be done easily.
Conditions regarding the time width required for conversion can be relaxed, and signal processing in subsequent stages can be facilitated.

FIG. 6 shows a second embodiment of the invention.

In the endoscope 41 of this embodiment, the object is illuminated with white illumination light without using the filter device 19 in the light source device 17, and the sample and hold circuit 22 is the same as shown in FIG. The solid-state image sensor 15 (light receiving section 1) formed on the chip
6) Three primary color filters 4 in a mosaic arrangement on the front
2 are arranged. The signal read out and amplified through the sample and hold circuit is then AD converted in synchronization with the falling edge of the sampling pulse of the sample and hold circuit.
The data is converted into digital data via an AD converter 25, and this data is written into a frame memory 26.

The data written in the frame memory 26 is read out sequentially by applying address signals synchronized with the horizontal and vertical synchronizing signals of the NTSC system, and after DA conversion, the data is read out by the sample and hold circuit in the video processing section 23'. 43R, 43G, 43
B is separated into three primary color signals R, G, and B, and horizontal and vertical synchronization signals are superimposed, or
Converted to NTSC video signal and sent to TV monitor 2
7, it is now displayed as a color image. The sample and hold circuits 43R, 43G, and 43B in the video processing unit 23' may operate at a lower speed than those formed on the same chip as the solid-state image sensor 15.

On the other hand, since the sample/hold circuit 22 on the side that reads the signal from the solid-state image sensor 15 is formed on the same chip as the solid-state image sensor 15, its input capacitance 35 is small, and the TV monitor 27
It is designed to operate at high speed so that it can be read out during the vertical retrace period in each frame when displayed. Therefore, as a display device, a normal NTSC type device is used to enable clear display.

In the second embodiment described above, the A/D converted signal data is separated into signals corresponding to each color and written into three frame memories as in the first embodiment, and the written data is read out and D/D-converted. A
Convert to three primary color signals R, G, B and send to TV
It can also be displayed on the monitor 27. Note that the above writing to the frame memory can generally be performed at high speed as appropriate.

In addition, in the first embodiment, the AD conversion is not limited to the field sequential illumination method in which each color is sequentially illuminated, but as in the second embodiment, the illumination is performed with white light and the light is received through a three primary color filter such as a mosaic arrangement. 3 things you did
It is also possible to separate and write each color into two frame memories. Further, instead of three frame memories, the data may be written into a single frame memory, and when read out, the data may be separated into each color and displayed as a color image on a TV monitor.

Note that the sample-and-hold circuit 22 formed on the same chip as the solid-state image sensor 15 is not limited to one having a single circuit configuration connected to the shift register 21; When reading out the signals received and accumulated through each color filter of the mosaic arrangement of filters, a sample-and-hold circuit may be operated to separate and extract each color signal.

Also, one or more sample/hold circuits 2
After 2 (etc.), an amplifier is provided on the same chip,
It is amplified before AD conversion, and the SN
Those in which the ratio is prevented from decreasing also belong to the present invention. Furthermore, this amplifier may be formed between the solid-state image sensor 15 and the sample-and-hold circuit. Furthermore, the solid-state image sensor 15 and the sample/hold circuit are formed on the same chip, and in this case, the output terminal of the shift register 21 and the sample/hold circuit are formed on the same chip.
The structure is such that it is not connected to the input terminal of the hold circuit 22 (etc.), and a device that has a low noise figure and operates at high speed, such as an IC preamplifier or a discrete preamplifier, can be inserted between the hold circuit 22 (etc.). You can also do that.

Note that the present invention is not necessarily limited to a line transfer type solid-state image sensing device, but can also be applied to a frame transfer type or vertical interline type.

The switch MOS-FET 33 in the sample-and-hold circuit 22 may be of an enhancement type that can be driven by a voltage of a single polarity, or may be of a depletion type. Also, each MOS-FET32,
33 and 34 may be P channels or N channels.

Note that combinations of the above also belong to the present invention.

[Effects of the Invention] As described above, according to the present invention, since the solid-state image sensor and the sample-and-hold circuit are formed on the same chip, the equivalent input capacitance for holding in the sample-and-hold circuit can be reduced. Even when signals are read out from a solid-state image sensor at high speed, the signals can be sampled with short width pulses and the values can be stored in a step waveform. Therefore, it is possible to sample and hold within a short period such as the vertical retrace period, so it can be used when high-speed operation is required, such as when using a compact line transfer type solid-state image sensor suitable for endoscopes. can also be dealt with adequately.

[Brief explanation of drawings]

Figures 1 to 3 relate to conventional examples; Figure 1 is a block diagram showing the circuit configuration for sampling and holding signals for a solid-state image sensor in the conventional example; and Figure 2 is an output from the solid-state image sensor. FIG. 3 is a waveform diagram showing the step waveform to be converted from the waveform in FIG. 2, and FIGS. 4 and 5 relate to the first embodiment of the present invention. The figure is an explanatory diagram showing the configuration of the first embodiment, and FIG.
A circuit diagram showing a sample and hold circuit used in the embodiment, and FIG. 6 is an explanatory diagram showing a second embodiment of the present invention. 11, 41... Endoscope, 12... Insertion section, 15
... Solid-state image sensor, 16 ... Light receiving section, 17 ... Light source device, 19 ... Filter device, 21 ... Shift register, 22 ... Sample and hold circuit, 2
6R, 26G, 26B, 26... Frame memory, 27... TV monitor, 31... Solid-state image sensor chip, 32, 33, 34... MOS-FET, 3
5...Input capacity, 42...3 primary color filter.

Claims (1)

[Claims] 1. An objective lens for imaging is disposed on the distal end side of the insertion section, and a solid-state image sensor is disposed at the image-forming position of the objective lens so that its light-receiving surface is positioned as desired. 1. An endoscope with a built-in solid-state image sensor, characterized in that the endoscope is provided with a circuit that samples and holds an output signal from the solid-state image sensor. 2. The endoscope with a built-in solid-state imaging device according to claim 1, wherein the sample-holding circuit is provided on the distal end side of the insertion section. 3. The endoscope with a built-in solid-state image sensor according to claim 1, wherein the solid-state image sensor and the sample hold circuit are formed on the same chip.