JPH0376416B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a multi-frequency eddy current flaw detection and analysis device, and is particularly applicable to flaw detection testing of heat exchanger tubes for thermal power plants, nuclear power plants, etc., such as heat exchanger tubes for cooling ascites and high pressure feed water heating tubes. This invention relates to a multi-frequency eddy current flaw detection and analysis device.

Over the past few years, multi-frequency eddy current testing has been applied to eddy current (electromagnetic induction) testing. In recent years, a calculation method that removes factors other than defects has been applied as a method for determining defects that are combined with dent signals from the supporting plate and deposits such as Fe ₃ O ₄ or the capillary itself. It has become like that. However, in the conventional calculation method, factors that interfere with the defect signal and defect identification, such as when the defect is combined with the thin tube support plate, or when the signal of the dent part or the internal diameter change signal are combined, are not included. If only one interference factor is included, it is possible to eliminate this one interfering factor, but for example, there are multiple factors that can interfere with defect identification, such as the tube support plate, dent, change in the tube inner diameter, and the outer surface of the tube. When a plurality of factors, such as a deposit signal, overlap with a defect signal at the same time, the defect detection ability decreases, making it difficult to identify the defect. This is because in the conventional calculation method, if multiple factors that interfere with defect identification overlap at the same time as the defect signal, the function as a calculation unit cannot be fully demonstrated.

The present invention was proposed in view of the above circumstances, and
The purpose of this is to simultaneously remove multiple composite signals from multiple factors that interfere with defect identification, such as the capillary support plate, deposits on the outer surface of the capillary, dents, and changes in the inner diameter of the capillary (dimensional changes). The purpose of the present invention is to provide a multi-frequency eddy current flaw detection and analysis device that can identify only

The multi-frequency eddy current flaw detection and analysis device according to the present invention is a multi-processing device that receives as input the output from the main body of the multi-frequency eddy current flaw detector, which can simultaneously obtain flaw detection outputs based on _{a plurality} of test frequencies. The flaw detection output consisting of the _f3 frequency component and the flaw detection output consisting of the horizontal component and the vertical component due to the f3 frequency are combined and input to the first calculation circuit, the influence of the first factor is removed, and the flaw detection output consisting of the horizontal component and the vertical component due to the _f3 frequency are combined. The flaw detection output consisting of the vertical component and the flaw detection output consisting of the horizontal component and the vertical component due to the _f2 frequency are combined and input to the second arithmetic circuit, the influence of the first factor is removed, and the flaw detection output of the first arithmetic circuit is The output consisting of a horizontal component and a vertical component and the output consisting of a horizontal component and a vertical component of the second arithmetic circuit are combined and inputted to a third arithmetic circuit to remove the influence of the second factor. It is characterized by having a function of removing the influence of the second factor and the influence of the second factor and outputting only the influence of the third factor, which is a factor that can interfere with defect identification in a multi-frequency eddy current flaw detection analysis device. For example, frequency f ₁
And the dent or inner diameter change (dimensional change) signal component included in the f ₂ signal is erased with the frequency f ₃ signal, and the interference signal components other than the defect signal included in the subsequent signal components are subtracted from the f ₁ and f ₂ signals. This makes it possible to detect and analyze substantially only defective signals.

An embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic diagram showing the overall configuration of a multi-frequency eddy current flaw detection and analysis device according to an embodiment of the present invention, FIG. 2 is a block diagram showing the circuit configuration of the multiplex calculation device in FIG. 1, and FIG. 4 are detailed circuit diagrams of each part of FIG. 2, and FIG. 5 is a schematic block diagram of FIG. 2.

In FIG. 1, 01 is the main body of the multi-frequency eddy current flaw detector, 02 is the multiplex calculation device, 03 is the oscillator that oscillates a plurality of different frequencies f ₁ to fn, 04 is the mixer,
05 is a flaw detection probe coil, 06 is a balance circuit, and 07 is a signal processing section for frequencies f ₁ to fn. In FIG. 1, when excitation currents of a plurality of different eddy current excitation frequencies f ₁ to fn oscillated from each oscillator 03 are simultaneously applied to a flaw detection probe coil 05 via a mixer 04, Eddy currents corresponding to these frequencies f ₁ to fn flow in the fleshy part (not shown). In this case, impedance changes of the flaw detection probe coil 05 caused by defects in the thin tube fleshy portion are determined by the above-mentioned frequencies, and if a defect exists in the thin tube fleshy portion, changes in the impedance of the flaw detection probe coil 05 corresponding to each frequency are balanced. Each signal processing unit 07 via the circuit 06
, and their output signals are input to the input terminal of the multiplex arithmetic unit 02.

The circuit configuration of the multiplex arithmetic unit 02 is shown in a block diagram in FIG. In Fig. 2, 1 is the input terminal for the horizontal component of the eddy current flaw detection excitation frequency _f3 signal;
2 is an input terminal for the vertical component of the f ₃ signal, 3 is a switch for adjusting the sensitivity of the f ₃ signal and not adjusting it, 4 is a circuit for adjusting the sensitivity of the f ₃ signal (-10 dB), and 5 is a switch for adjusting the phase of the f ₃ signal and not adjusting it. switch, 6 is an f ₃ signal phase adjustment circuit, 7 and 8 are each an f ₃ signal monitor terminal, 9 is an f ₃ signal sensitivity adjustment (+10dB) circuit, 10
is _f3 signal phase adjustment and non-adjustment switch, 1
1 is an f ₃ signal phase adjustment circuit, 12 and 13 are monitor terminals for the f ₃ signal, 14 and 15 are input terminals for the horizontal and vertical components of the f ₁ signal, and 16 is an input terminal for the dent signal component and inner diameter change (dimensional change) in the f ₁ signal. ) an arithmetic circuit for erasing signal components; 17 is a switch for adjusting and not adjusting the sensitivity of the f ₁ signal; 18 is a sensitivity adjustment circuit for the f ₁ signal; 19 and 20 are input terminals for the horizontal and vertical components of the f ₂ signal; 21 is an f 1 signal sensitivity adjustment switch; ₂ is an arithmetic circuit that eliminates the dent signal component and the inner diameter change (dimensional change) signal component in the signal, 22 is a phase adjustment/non-adjustment switch for the f ₁ signal, 23 is an f ₁ signal phase adjustment circuit, and 24 and 25 are f 1 signal phase adjustment circuits, respectively. ₁ signal monitor terminal, 26 is a thin tube outer surface deposit and support plate elimination calculation circuit, 27 is a phase adjustment/non-adjustment switch for the same signal, 28 is a phase adjustment circuit for the same signal, 29
and 30 are multiplex calculation output signal terminals, respectively.

3 and 4 are detailed circuit diagrams of the various parts shown in FIG. 2, respectively, and FIG. 5 is a schematic block diagram of FIG. 2.

Next, the operation of the above embodiment of the present invention will be explained.

In FIG. 2 to FIG. 5, a dent signal component and an inner diameter change signal are first generated from reference signals f ₁ and f ₂ by arithmetic circuits 16 (hereinafter referred to as the first arithmetic circuit) and 21 (hereinafter referred to as the second arithmetic circuit). (hereinafter referred to as the influence of the first factor), the sensitivity of the f ₃ signal, which has a relatively noticeable dent signal component, is adjusted by the sensitivity adjustment circuit 4 shown in FIG. 3 to the f ₁ dent signal voltage amplitude. Then, the phase adjustment circuit 6 performs waveform shaping (hereinafter referred to as the _first
) is performed. In addition, the sensitivity of the f ₃ signal is adjusted to match the f ₂ dent signal voltage amplitude by the sensitivity adjustment circuit 9, and the phase is adjusted to be the same by the phase adjustment circuit 11, which is a signal component equivalent to erasing only the dent signal component of the f ₂ signal. Then, waveform shaping (hereinafter referred to as second calculation) is performed. These signals are processed by the arithmetic circuit 16 (first arithmetic circuit) of the multiplex arithmetic circuit in _FIG . As a result, the dent signal component and inner diameter change signal component of the f ₂ signal are eliminated. In this way, the f ₁ and f ₃ signals, in which the signal components of the dent and inner diameter change (the influence of the first factor) have been eliminated, contain a defect signal (hereinafter referred to as the third factor).
In addition to the influence of the second factor (hereinafter referred to as the influence of the second factor), there remain residual interference signal components caused by, for example, the tube plate, support plate, or deposits on the outer surface of the capillary (hereinafter referred to as the influence of the second factor), but these interference signal components In order to eliminate the _f1 signal sensitivity adjustment circuit 18 shown in FIG.
The f ₂ signal is adjusted to the best sensitivity for subtracting the f ₁ signal, and the f ₁ signal phase adjustment circuit 23 matches the phase of the f ₂ signal, and the arithmetic circuit 26 (hereinafter referred to as the third arithmetic circuit) By processing the f ₁ and f ₂ signals, residual interference signal components caused by the support plate, external surface deposits, etc. are removed. This causes the defect signal (third
Only the influence of the second factor) is outputted from the multiple calculation output signal terminals 29 and 30 via the phase adjustment circuit 28, and this defect signal is detected and analyzed. In this case, since the output signal phase after multiple calculations becomes relatively high, it is corrected by the phase adjustment circuit 28 to estimate the amount of thinning.

As described above, according to the present invention, even if a plurality of factors that interfere with defect identification exist in the same place, these factors that interfere with defect identification can be surely eliminated and only the defect signal can be detected and analyzed. For example, when the signals of deposits, dents, and defects on the tube outer surface directly above and below the tube sheet and support plate are combined, the signal evaluation was unclear in the past, but with the present invention, it is possible to In this case, only defect signals can be clearly identified. Therefore, it is possible to achieve the same analysis and evaluation techniques as above, and to obtain an excellent effect that the analysis and evaluation are facilitated.

Note that the multifrequency eddy current flaw detection and analysis device according to the present invention may be used in conjunction with, for example, a large computer or a small computer, and in this case, the inspection system for, for example, pressurized water reactor (PWR) steam generator heat transfer tubes, This is a marked improvement.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram showing the overall configuration of an embodiment of the present invention, FIG. 2 is a block diagram showing the circuit configuration of the multiple arithmetic unit in FIG. 1, and FIGS. 3 and 4 are respectively shown in FIG. FIG. 5 is a schematic block diagram of FIG. 2. 01...Multi-frequency eddy current flaw detector body, 02...
...Multiple processing unit, 03...Oscillator, 04...Mixer, 05...Flaw detection probe coil, 06...Balance circuit, 07...Signal processing section, 1, 2... _F3 signal input terminal, 3... _f3 signal sensitivity adjustment and non-adjustment selector switch, 4... _f3 signal sensitivity adjustment circuit,
5... _f3 signal phase adjustment and non-adjustment changeover switch, 6... _f3 signal phase adjustment circuit, 7, 8... _f3 signal monitor terminal, 9... _f3 signal sensitivity adjustment circuit,
10... _F3 signal phase adjustment and non-adjustment changeover switch, 11... _F3 signal phase adjustment circuit, 12, 13
... _f3 signal monitor terminal, 14,15... _f1 signal input terminal, 16...arithmetic circuit, 17... _f1 signal sensitivity adjustment and non-adjustment changeover switch, 18...
... f ₁ signal sensitivity adjustment circuit, 19, 20 ... f ₂ signal input terminal, 21 ... arithmetic circuit, 22 ... f ₁ signal phase adjustment and non-adjustment changeover switch, 23 ... f ₁
Signal phase adjustment circuit, 24, 25...f ₁ signal monitor terminal, 26... Arithmetic circuit, 27... Phase adjustment and non-adjustment changeover switch, 28... Phase adjustment circuit, 29, 30... Multiple calculation output signal terminal.

Claims (1)

[Claims] 1. In a multi-processing device that receives as input the output from the main body of a multi-frequency eddy current flaw detector that can simultaneously obtain flaw detection outputs at multiple test frequencies, flaw detection outputs consisting of horizontal and vertical components at the _f1 frequency and horizontal flaw detection outputs at the _f3 frequency are used. The flaw detection output consisting of the horizontal component and the vertical component are combined and input into the first calculation circuit, and the influence of the _first factor is removed _. The flaw detection output consisting of the horizontal component and the vertical component is combined and input to the second calculation circuit, the influence of the first factor is removed, and the output consisting of the horizontal component and the vertical component of the first calculation circuit and the second calculation circuit are combined. The outputs consisting of the horizontal and vertical components of the arithmetic circuits are combined and input to the third arithmetic circuit to remove the influence of the second factor, thereby eliminating the influence of the first and second factors. A multi-frequency eddy current flaw detection and analysis device characterized by having a function of removing the influence of the third factor and outputting only the influence of the third factor.