JPH0376522B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention This invention relates to digital data detectors. As an example of application of the present invention, this detector may be used in a digital video recorder to reproduce recorded signals, and this application example will be described here.

BACKGROUND OF THE INVENTION When reproducing digital data from a magnetic tape, anomalies such as defects in the tape cause a decrease in the amplitude of the reproduced signal, causing errors in the data sensing process. One way to reduce the effects of this problem is to limit the reconstructed signal after integration to aid in the recovery of information from the signal whose amplitude is reduced during such anomalies. However, if a recorded code with DC content is used, this method does not work because the zero crossing point of the reproduced signal moves due to the integration process. This movement may cause errors in the data sensing process. Another detection method is to use a differentiator that does not impose any restrictions. Although this method is accurate at zero crossing points, there remains the problem of anomalies that cause detection errors. Codes with DC content are desirable because they contain more information than similar codes without it.

Therefore, a data detector that reproduces codes with high accuracy is desired.

DISCLOSURE OF THE INVENTION A digital data detector according to the present invention includes a differentiating means for differentiating reproduced data, an integrating means for integrating the reproduced data, and a digital data detector coupled to the differentiating means and the integrating means, and for integrating the integrated data. Therefore, the present invention is characterized by a gate means for gating the differentiated data.

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 2A shows the current in a recording head (not shown) for a hypothetical digital bit stream recorded in a non-return to zero interleaved format. In this format, a ``1'' exhibits a current transition at the center of its bit cell, while a ``0'' does not exhibit this transition.
Therefore, long stretches of "0" have relatively high DC content and low frequency content, making detection of each bit difficult.

FIG. 1 shows a block diagram of a detector according to the invention. A porcelain reproducing head 10 contacts a recorded tape (not shown) to reproduce the recorded signal,
After the reproduced signal is amplified by an amplifier 12, an equalizer 14 equalizes the frequency and phase of the recording and reproduction response characteristics. This equalized signal for the recording signal of FIG. 2A is shown in FIG. 2B. This equalized signal is transmitted to the integrator 1 having the output waveform shown in FIG.
6 and is applied to a differentiator 18 having an output waveform shown in FIG. 2D. It can be seen that the positive and negative peaks in FIG. 2B coincide with the zero crossing points of the signals in FIGS. 2C and D. The output signal of differentiator 18 is applied to limiter 20 having the power signal shown in FIG. 2E. This output signal matches the original signal in Figure 2A very precisely at its zero crossing point, but when the waveform in Figure 2B is close to the zero axis, it may be affected by anomalies such as tape, head, and amplifier noise. It also contains many other pseudo-zero intersections that occur (appear as shading). Therefore, unless this pseudo zero intersection is removed, it will be mistaken as "1". To remove the false zero crossing, the signal from limiter 20 is reduced by 1/
A two-bit delay 22 is applied so that the true zero crossing occurs at the center of the gate control signal (described below). The output signal of delay device 22 is applied to the input of gate 24.

To generate the gate control signal, the output of the integrator 16 is applied to a limiter 26, where the limited signal is then applied to a single-shot (monostable) multivibrator 28.
to be applied. This multivibrator 28 is triggered by the zero crossing of the signal from the limiter 26.
The output signal of this single-shot multivibrator 28 has a duration approximately one bit long, as shown in FIG. 2G, and is applied to the gate 24 as a gate control signal. When the gate 24 is "open" (the signal in FIG. 2 G is high level), the signal at the gate input point F passes to the gate output point H, but when the gate 24 is "closed" (the signal in FIG. 2 G is high level), the signal at the gate input point F passes through to the gate output point H. When the output signal is at a low level (low level), the output signal is kept at its previous value by a capacitor (not shown) in the gate. As a result, the output waveform becomes as shown in FIG. 2H, and it can be seen that it does not include the abnormality shown in FIG. 2F. Comparing the waveform shown in FIG. 2H with the original waveform A, it can be seen that they are exactly the same non-zero return interleaved waveform except that the polarity is reversed and the waveform is shifted by one bit length. The non-return-to-zero interleaved output signal of FIG. 2H can be converted to the non-return-to-zero signal of FIG. 2I if desired.

It is therefore easy to see that the present invention combines the precise nature of the zero crossings of the differentiated signal with the less anomalous (or no) nature of the integrated signal.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIGS. 2A to 2I are waveform diagrams used to explain the operation of FIG. 1. 16... Integrating means, 18... Differentiating means, 24...
…gate means.

Claims (1)

[Claims] 1 Differentiating means for differentiating the reproduced data, integrating means for integrating the reproduced data, coupled to the differentiating means and the integrating means, and gating the differentiated data according to the integrated data. and gating means for detecting digital data.