JPH0376586B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming electrodes of a compound semiconductor device, such as a gallium arsenide (GaAs) semiconductor device.

GaAs shot field effect transistor (GaAs MES FET) as a microwave semiconductor device
It has been known. An electrode is formed on the surface (back surface) of the GaAs MES FET opposite to the element formation surface for the purpose of grounding and heat sinking.

The carrier mobility and saturation drift velocity of GaAs compound semiconductors are significantly higher than those of silicon (Si), etc., and the short-circuit field effect transistor has a simple structure and manufacturing process, making it suitable for gate miniaturization. FETs provide excellent high frequency characteristics.

[Conventional technology]

Referring to the cross-sectional view in Figure 3, the thickness is 25 to 30 μm.
An element 12 is formed on one side of a GaAs substrate 11 . To form the electrode, GaAs substrate 1
After etching grooves are formed in a lattice pattern on the back surface of the substrate 1, a titanium-gold (Ti-Au) film 13 is formed, for example, by vacuum evaporation, and then a photoresist (hereinafter simply referred to as resist) is applied to the entire back surface. The resulting film is patterned to form a resist film 14, and then an Au electrode 15 with a thickness of 30 μm is formed by electrolytic plating.
The resist film 14 is removed, and finally, the portion of the GaAs substrate 11 shown by the dotted line in the figure is cut with a dicer to form a device of, for example, 0.3 mm square as shown in FIG.

The above process utilizes the fact that when the resist film 14 is formed on the substrate as shown in FIG. 5, the plating is formed at a ratio of 1:1 in the horizontal (side) direction and in the vertical direction. be.

Note that in FIG. 4 and subsequent figures, the same parts as those shown in FIG. 3 are designated by the same reference numerals. Handling of such a device is accomplished by pressing with tweezers at the portion indicated by the arrow in FIG.

[Problem that the invention seeks to solve]

To explain in more detail the patterning of the resist film described with reference to FIG. 3, as shown in FIG. 6, grooves 17 are formed on the back surface of the GaAs substrate 11. A resist film with a thickness of about 2 μm within this groove 17 is exposed using a glass mask 18, but due to the shape of the groove 17, there is a difference in exposure distance as shown by the arrow, and a difference in development time. If this occurs, the resist pattern may not be formed in alignment with the pattern 19 formed on the glass mask, or the glass mask may be misaligned. The resist used here is a positive type resist, and the reason for using it is that in the electrode formation process on the back of the substrate, a glass plate is attached with wax on top of the element 12 to protect it, but a negative type resist is used. Use it's stripping solution at 120℃
The wax must be heated to a certain temperature, and the wax described above will melt and the protective glass plate will come off (wax melts at 80°C), but on the other hand, positive resists can be removed with an acetone-based organic solvent at room temperature. This is because there is no risk that the wax will melt and the glass plate will come off.

If the resist pattern is misaligned as shown in FIG. 7, the electrode 15 will be formed misaligned as shown, and this state is shown by the dotted line in FIG.
If the electrodes are misaligned in this way, when the device shown in Figure 4 is held between tweezers, one side of the GaAs substrate will come into contact with the tweezers and be damaged, causing the problem that the GaAs MES FET that has already been made will be defective.

[Means for solving problems]

The present invention provides a method for manufacturing a semiconductor element that solves the above-mentioned problems. a process of forming grid-like grooves corresponding to the arrangement of the elements, a process of forming a metal film on the back surface, a process of forming a photoresist film on the backside and filling the grooves with photoresist, exposing the entire surface of the photoresist and developing it. and leaving a photoresist only at the bottom of the groove, and forming an electrode inside the grid defined by the groove by metal plating. .

[Effect]

In the method of the present invention, after etching grooves are formed in a lattice pattern on the back surface of a GaAs substrate, a resist is applied to the entire surface of the back surface and the entire surface is exposed to light without using a mask. Since the resist film remains only in the etching groove, GaAs MES
This allows the FET electrodes to be formed accurately.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 shows a cross-sectional view of the main parts of a semiconductor device in the process of carrying out the method of the present invention, and will be described with reference to a to i in the figure.

Figure 1a: FETs are mounted on the GaAs substrate 21 using conventional techniques.
An element 22 is formed. Scribe metal 23 is patterned in a grid pattern on substrate 21. Note that in the figure, 24 indicates the first resist film.

FIG. 1b: Scribe metal 23 is removed by etching.

Figure 1c: Prior to forming grooves on the back surface of the substrate 21, a glass plate 25 for surface protection is attached using wax 26, and then the thickness of the substrate 21 is reduced to 25 to 30 μm.
A second resist film is applied to the back surface of the substrate, exposed to light using a glass mask (not shown), and developed to form a resist film 27.

FIG. 1d: Using the resist film 27 as a mask, the back surface of the substrate 21 is photoetched to form a groove 28. The grooves 28 are formed in a lattice shape, and each of the lattices corresponds to an FET element 22.

FIG. 1e: The resist film 27 is removed and a conductive metal film 29 is formed on the entire back surface of the substrate 21. FIG. Metal film 29
First, Ti was deposited to a thickness of 1000 Å, and then Au was deposited to a thickness of 5000 Å.
It is formed by vapor deposition to a film thickness of 1.5 Å.

FIG. 1f: After the metal film 29 is deposited, a third positive resist is applied to the entire surface by spin coating to form a resist film 30. Resist film is 3~5μ on flat area
m, and the thickness within the groove 28 is approximately 30 μm.

FIG. 1g: The entire back surface of the substrate is exposed and then developed to form a resist 30a with a thickness of about 15 μm only in the grooves 28.
leave.

Figure 1 h: The electrode 31 is selectively plated with gold using a plating solution (for example, Temperec 401 manufactured by Tanaka Kikinzoku Co., Ltd.).
form. As mentioned above, Au
The layer grows horizontally and vertically in a ratio of 1:1, but does not grow on top of the resist, so the Au electrode 31 becomes as shown.

Figure 1i: Next, a Ni film 32 is formed on the electrode 31 by nickel (Ni) plating, and the resist is removed using an organic solvent at room temperature.
and Ti, the metal film 29 at the bottom of the groove 28 is removed, and then the Ni film 32 is removed using a nitric acid-based etching solution at room temperature, the wax 26 is melted, the glass plate 25 is removed, and the resist film is removed. 24 is peeled off.

The part indicated by the dotted line in Figure 1i was cut using a dicer to obtain a 0.3 mm square FET, whose enlarged plan view is shown in Figure 2, where 33 is the source electrode; 34 is a drain electrode, and 35 is a gate electrode. The above-mentioned dicing can be easily performed because the electrodes 31 are separated along the center line of the groove 28.

As shown, the electrodes 31 extend evenly along the four sides of the device, thereby preventing damage to the FET when handling the device with tweezers.

〔Effect of the invention〕

As explained above, according to the present invention, when forming a four-sided electrode in a lattice-like groove formed on the back surface of a GaAs substrate, the resist pattern necessary for electrode separation is formed by coating the entire back surface. Since it is formed by exposing and developing the entire resist film, the process is simplified, and since there is no misalignment of the resist, there is no misalignment of the electrodes.
The electrodes are formed to protrude uniformly along the four sides of the FET element, thereby preventing damage to the FET element during handling.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing the main parts of a semiconductor device in the process of carrying out the method of the present invention, FIG. 2 is a plan view of an FET element formed by the method shown in FIG. 1, and FIG. Fig. 4 is a cross-sectional view of a conventional FET element, Fig. 5 is a cross-sectional view showing Au plating in the conventional example, Fig. 6 is a cross-sectional view showing resist patterning in the conventional example, and Fig. 7 is the position of the electrode in the conventional example. FIG. 3 is a cross-sectional view showing the deviation. In the figure, 21 is a GaAs substrate, 22 is a FET element, 2
3 is a scribe metal, 24 is a resist film, 25
26 is a glass for surface protection, 26 is a wax, 27 is a resist film, 28 is a groove, 29 is a metal film, 30 is a resist film, 31 is an electrode, 32 is a nickel film, 33 is a source electrode, 34 is a drain electrode, 35 is a The gate electrodes are shown respectively.

Claims (1)

[Claims] 1 Step of attaching a protective glass plate to the surface on which the compound semiconductor element is formed, and then forming a lattice-shaped groove corresponding to the arrangement of the elements on the back side opposite to the element, and forming a metal film on the back side. , a step of forming a photoresist film on the back surface and filling the groove with photoresist; a step of exposing and developing the photoresist over the entire surface to leave the photoresist only at the bottom of the groove; 1. A method of manufacturing a semiconductor device, comprising the step of forming an electrode inside a lattice.