JPH0379733B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Technical Field> The present invention relates to an arbitrary pattern scrolling method in a computer. Here, the term "through roll" refers to moving a certain pattern vertically, horizontally, diagonally, etc. on the display screen.

<Prior Art> In the conventional scrolling method, the shape and size of the pattern are almost fixed. Therefore, in order to display a large pattern by scrolling, it is necessary to use a plurality of patterns and also to set a plurality of registers at the time of scrolling, which is inefficient.

<Disclosure of the Invention> The present invention enables the creation of patterns of any size by completely separating and making the relationship between the pattern position on the display screen and the address of the memory where the shape and size of the pattern are written independent of each other. It is characterized by being able to scroll and display the image using a simple structure, and to displace the pattern position dot by dot in any direction and at any speed.

In addition, the present invention allows a computer user to draw a pattern of any size and shape on a piece of blank drawing paper as far as there is free space on the drawing paper.・The feature is that the pattern information that you want to display can be written in the memory.

<Principle of the Invention> FIG. 1 is an explanatory diagram of the principle of the present invention. VRAM
Reference numeral 1 denotes a screen display memory having a dot matrix configuration with l columns and m rows, but what should be noted here is that there is no correspondence between the display position and the pixels on the display screen 4. Pattern information 2 to be displayed is written in this memory, and a large number of addresses of horizontal length, vertical length, and reference point P are written in the address calculation section for each piece of pattern information. on the other hand,
The display means 3 has a capacity of horizontal H dots and vertical V dots, and is scanned from the origin O in the horizontal direction. What should be noted here is that a blanking period (no display) is provided at the beginning of scanning, followed by a display period. The area of this display period is the display screen 4, and the flyback period is located at the upper left of the display screen 4. When an arbitrary point Q on the display screen 4 is specified, pattern information 5 with this point Q as a reference point is displayed. The position of this point Q is expressed by Hpos.Vpos.

The computer memory is equipped with registers that store the following data.

Start address of the VRAM where the display pattern is stored (Start ADR) Horizontal size of the display pattern (Hsize) Vertical size of the display pattern (Vsize) Horizontal position of the display screen (Hpos.) Vertical position of the display screen (Vpos.) This By setting the five data to the register, a desired display pattern is read from the VRAM and displayed on the display means. Therefore, in order to scroll the pattern, it is only necessary to change the contents of the register. Since the horizontal and vertical positions of the display screen are counted in units of dots, the display pattern can be smoothly scrolled in units of dots.

<Example> The entire device consists of a central processing unit of a computer, a keyboard, a display means, and an external memory.
Consists of VRAM.

FIG. 2 shows a block diagram of a VRAM address determination circuit, and FIG. 3 shows a specific example of the configuration of the VRAM address calculation circuit CC shown in FIG. 2. A horizontal counter HD (0≦HD≦h-1) 6 and a vertical counter VD (0≦VD≦n-1) 7 that count clock pulses in synchronization with the scanning of the display screen are provided. The display position data is
It is stored in Hpos. register 8 and Vpos. register 9. By comparing the values of counters HD6 and VD7 with the contents of registers 8 and 9, the display start position of the pattern is determined. VD=
Only when Vpos. and HD = Hpos. does the pattern become active and the VRAM address is output. The first address that becomes active is the value of the start ADR register 10. HD
6. The VRAM address changes every time VD7 is counted, and its value is calculated by the following formula.

VRAM address = (Start ADR) + (HD-Hpos.) + (VD-Vpos.) x l Figure 3 shows a circuit that realizes this operation using a subtraction circuit, a multiplication circuit, and an addition circuit. That is, the subtraction circuit 13 executes (HD-Hpos.), the subtraction circuit 14 executes (VD-Vpos.), and the multiplication circuit 2
0 multiplies it by l, and the adder circuit 21 adds the first term and the second term.
Addition of terms is executed, and addition of all terms in the adder circuit 22 is executed.

Also, the difference (HD−Hpos.) or the difference (VD−
Vpos.) and the contents of the Hsize register 11 or Vsize register 12 are compared by the comparison circuit 15 or 16, and the difference (HD - Hpos.) is positive and the difference is
If it is smaller than Hsize, AND gate 17 detects this, and if the difference (VD - Vpos.) is positive and the difference is smaller than Vsize, AND gate 18
detects this, and AND gate 19 indicates that both AND gates 17 and 18 have output a detection signal.
is detected and outputs an active signal at this time.

The display priority determination circuit 23 includes a VRAM address calculation circuit CC ₁ ... CC _o provided for each pattern.
It examines the active signals output from , and outputs VRAM addresses to VRAM1 in descending order of priority.

<Effects of the Invention> According to the present invention, a pattern of any size can be displayed, from the smallest unit of VRAM to a pattern larger than the display screen. Moreover, the display pattern data only needs to be stored in a single memory such as VRAM, and there is no need for memory corresponding to the display screen. Any pattern can be displayed at a desired position on the screen simply by converting the address representing the position. Furthermore, as described above, smooth scrolling is possible in dot units, and the number of register settings is small and easy to understand, making software programming easier. Furthermore, by making the start ADR of each pattern the same and changing Hpos. and Vpos., it is possible to display a plurality of one pattern at arbitrary positions on the screen. Further, there is no need to provide a memory with a dot matrix corresponding to the display screen as in the conventional case, and VRAM of any capacity can be used.

Furthermore, in a mode where HD and VD counts start from the retrace period, by setting the values of Hpos. and Vpos. within the retrace period, the pattern appears smoothly from the edge of the screen and moves smoothly to the edge of the screen. Can be erased.

Furthermore, according to the present invention, dot scrolling of lists and character strings can be easily performed by treating them as one pattern.

[Brief explanation of drawings]

Figure 1 is a diagram explaining the principle of the present invention, Figure 2 is a block diagram of the VRAM address output circuit of the present invention, and Figure 3 is a diagram explaining the principle of the present invention.
This figure is a block diagram showing a specific example of the configuration of the VRAM address calculation circuit CC shown in FIG. 2. 1... Memory, 2... Pattern information, 3... Display means, 4... Display screen, 5... Displayed pattern, 8... Hpos. register, 9... Vpos. register.

Claims (1)

[Scope of Claims] 1. A display device comprising: a memory in which information representing a display pattern and its size is written; and display position specifying means for specifying the coordinates of a reference point of the display pattern on a display screen;
A method of scrolling arbitrary patterns in a computer, which includes a counter that operates in synchronization with the scanning on the display screen, a register that specifies the above coordinates, and when the value of the above counter and the value of the above register match, the memory is An arbitrary pattern scrolling method in a computer, characterized by comprising an address calculation section for specifying an address, and the following. 2. A plurality of the address calculation sections are provided corresponding to the plurality of display patterns written in the memory, and the outputs from the plurality of address calculation sections are examined;
2. The arbitrary pattern scrolling method in a computer according to claim 1, further comprising a display priority determining circuit which outputs addresses to said memory in descending order of priority. 3. An arbitrary pattern scrolling method in a computer according to claim 1, wherein the blanking period for screen scanning is located at the upper left of the display screen.