JPH0381302B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device and a method for driving the same, and particularly relates to an improvement in a method for evaluating a plurality of semiconductor elements on a semiconductor board.

[Technical background of the invention and its problems]

2. Description of the Related Art In a semiconductor device such as an integrated circuit having a plurality of semiconductor elements on a semiconductor board, it is necessary to inspect and evaluate whether each element operates normally. This evaluation method includes an electronic method and an optical method.

The electronic method evaluates whether a predetermined output signal is obtained when an input signal is applied to a semiconductor device by comparing it with a case where the device is normal. In this case, it is necessary to create a test signal so that the output signal differs from the input signal when the element is normal and when there is a failure. Furthermore, as semiconductor devices become larger in size, it becomes more difficult to create test signals and the length of the test signals also increases, making the test itself more difficult and increasing the test time.

The optical method is to observe the operation of a logic element from the surface of a semiconductor device using a scanning electron microscope. According to this method, any part of the semiconductor device can be observed, but the field of view is narrow and the observation time is undesirable.

[Purpose of the invention]

The present invention has been made based on the above-mentioned circumstances, and provides a semiconductor device that can be easily inspected and evaluated even in the case of a large-scale integrated circuit, and a method for driving the semiconductor device during inspection and evaluation. The purpose is to

[Summary of the invention]

The semiconductor device of the present invention has a semiconductor device on the surface of a semiconductor substrate.
In a semiconductor device having a source and a drain forming a MOS type semiconductor element and having an insulating substrate at the bottom of the semiconductor substrate, at least one of the plurality of electrodes is provided in the insulating substrate and is externally driven by a multiphase signal. The device is characterized in that the charge coupled device is embedded in the semiconductor substrate so that the portion is located directly under the source or drain, and the charge coupled device is formed at the bottom of the semiconductor substrate.

Furthermore, the method for driving a semiconductor device of the present invention has a source and a drain forming a MOS type semiconductor element on the surface of a semiconductor substrate, and an insulating substrate at the bottom of the semiconductor substrate, and furthermore, in the insulating substrate, a plurality of electrodes are buried so that at least a portion thereof is located directly under the source or drain;
In a method for driving a semiconductor device in which a charge-coupled device is configured at the bottom of the semiconductor substrate,
Applying a predetermined voltage to the source or drain,
The plurality of electrodes are driven by an external multiphase signal, and the charges generated by the application of the voltage are sequentially captured and transferred by the plurality of electrodes and taken out as an electric signal to the outside. It is characterized by being able to evaluate the device.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 shows a cross section of one unit of a semiconductor device according to an embodiment of the present invention.

According to the figure, a MOS type semiconductor element 11, which is a field effect transistor functioning as a logic element, is shown on the surface of a semiconductor substrate 10, for example.
In fact, it is well known that in integrated circuits a large number of such elements are arranged in series. The element 11 includes a source 11a, a drain 11b, an insulating film 11c, and a gate electrode 11d. Such an element 11 and thus an integrated semiconductor device can be formed by various known methods.

Further, an insulating substrate 12 is provided at the bottom of the semiconductor substrate 10.
A plurality of electrodes 13a, 13b, . . . , 13f are buried at approximately constant intervals on the substrate 10 side of this insulating substrate 12. These electrodes 13a to 13f
is externally driven by a multiphase signal via wiring (not shown), and the charge on the surface of the substrate 12 can be transferred by moving the potential formed by the multiphase signal. That is, the buried electrodes 13a to 13f, together with the semiconductor regions 12a to 12f in contact with the substrate 10, form a charge coupled device at the bottom of the semiconductor substrate.
Here, the electrode 13b is located directly below the source 11a, and the electrode 13e is located directly below the drain 11b.

Next, a driving method for evaluating this semiconductor device will be explained with reference to FIGS. 2 and 3.
Here, it is assumed that, for example, the substrate 10 is of P type conductivity type, the source 11a and drain 11b are of N ⁺ type conductivity type, and each electrode 13a to 13f is driven by three-phase clock pulses.

First, the element 11 is connected to a power source (not shown) so that the source 11a is at a low potential and the drain 11b is at a high potential. Here, a voltage is applied to the electrodes 13b and 13e directly below the source 11a and drain 11b among the electrodes 13a to 13f on the charge-coupled device side, and as shown in FIG. Depletion layers 14b and 1 formed in the substrate 10 by the formed depletion layers 14a and 15a and the electrodes 13b and 13e, respectively.
5b are in contact with each other. Now, as shown in FIG. 2, if a negative potential is applied to the source 11a and a positive potential is applied to the drain 11b, a large amount of electrons will be generated in the depletion layer 14b repelling the potential of the source 11a. On the other hand, almost no electrons are generated in the depletion layer 15b (only a small amount exists stochastically).

Next, the voltage applied to the electrodes 13b and 13e is lowered than in the case explained in FIG. 2, and the depletion layer 14 in each region is
By separating a, 14b, 15a, and 15b, electrons in each depletion layer are captured on the charge coupled device side.

The captured electrons can be transferred, for example, to the left side of the drawing by applying three-phase clock pulses to each of the electrodes 13a to 13f, as shown in FIG.
By providing an output circuit (not shown) of a charge-coupled device at the left end of the substrate 10, the source 1
Electrons injected from 1a can be extracted as electrical signals. Therefore, by observing this electrical signal through the output circuit, for example, by comparing the output signal value with a reference value, it is possible to determine whether the source 11a of the element 11 is in the state or not, and whether the entire element 11 is normal. It is possible to evaluate whether or not.

Since a large number of such semiconductor devices are normally arranged on a substrate, it is possible to extract the charges of a large number of devices in series and evaluate each device using continuous electrical signals. Of course. For example, FIG. 4 shows buried electrode rows 41, 42, 43, . After that, the electrodes are transferred along the electrode columns 41, 42, 43, . . . in the row direction, and each electrode column 41, 42, 43, .
Signals are taken out to the outside via output circuits 41a, 42a, 43a, . . . . In this way, for example, the state of all logic elements on an LSI chip at a certain point in time can be evaluated.

Incidentally, it goes without saying that the conductivity type of each semiconductor region in the above embodiments may be the opposite conductivity type, and in this case, if necessary, the height relationship of the driving potentials may be reversed from that in the above embodiments. is easy to understand. Furthermore, it goes without saying that the arrangement of the buried electrodes may be arbitrary depending on the arrangement of elements on the semiconductor substrate. Further, the method for driving the charge coupled device is not limited to three-phase clock pulses, but any number of phases can be used.

〔Effect of the invention〕

According to the present invention, by forming a charge-coupled device at the bottom of a semiconductor substrate and driving it in a predetermined manner as described above, it is possible to easily inspect and evaluate a semiconductor device. In other words, by providing a charge-coupled device, there is no need to take out the test signal from the output terminal during actual operation, which makes it easier to form the test signal, and the length of the test signal itself becomes shorter.
Therefore, the test time is also shortened. Further, by using the buried electrode, it becomes easy to analyze failures after operation, such as identifying the cause of the failure or the location of the failure. Furthermore, since the charge-coupled device is formed at the bottom of the semiconductor substrate, it does not increase the chip area and meets the current requirements of LSIs, which is desirable.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing a part of a semiconductor device according to an embodiment of the invention, FIGS. 2 and 3 are explanatory diagrams of a driving method according to an embodiment of the invention, and FIG. FIG. 7 is a top view showing another aspect of the embodiment. 10...Semiconductor substrate, 11...Semiconductor element, 1
1a... Source, 11b... Drain, 12...
Insulating substrate, 12a to 12f...semiconductor region, 13
a to 13f... buried electrodes, 14a, 14b, 15
a, 15b... Depletion layer.

Claims (1)

[Scope of Claims] 1. A semiconductor device having a source and a drain forming a MOS type semiconductor element on the surface of a semiconductor substrate, and having an insulating substrate at the bottom of the semiconductor substrate, comprising: A semiconductor device in which a plurality of electrodes driven by a signal are buried so that at least a part of the electrodes is located directly under the source or drain, and a charge coupled device is formed at the bottom of the semiconductor substrate. 2. It has a source and a drain forming a MOS type semiconductor element on the surface of a semiconductor substrate, and has an insulating substrate at the bottom of the semiconductor substrate, and at least a part of the insulating substrate is located directly below the source or drain. A method for driving a semiconductor device in which a plurality of electrodes are buried so as to be located at the bottom of the semiconductor substrate to form a charge-coupled device, the method comprising: applying a predetermined voltage to the source or drain; The electrodes are driven by an external multiphase signal, and the charges generated by the application of the voltage are sequentially captured and transferred by the plurality of electrodes and taken out as an electrical signal to the outside, and the semiconductor device is evaluated using this electrical signal. A method for driving a semiconductor device, characterized in that the method is capable of performing the following steps.