JPH038518B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention provides an all-control rod scram event record that records control rod operations for all control rods that undergo emergency insertion when a reactor scram occurs in an operating nuclear reactor. Regarding equipment.

[Technical background of the invention and its problems]

For example, a control rod drive mechanism of a boiling water nuclear power plant is equipped with a plurality of reed switches corresponding to the positions of the control rods within the reactor. When a control rod reaches a certain position, the corresponding reed switch is turned on, allowing the control rod's position within the reactor to be determined. Control rod position is 1
Each control rod is divided into 48 parts, and the control rod position is detected by 48 reed switches. For example, when the control rod is in the fully withdrawn position, the 48th reed switch #
48 is turned on to indicate position 48, and when the reed switch #00 is at the fully inserted position, reed switch #00 is turned on to indicate position 00. When the control rod is at an intermediate position, the positions are 47, 46, ..., 02,
01. Among these positions, the even-numbered positions are the normal positions of the control rod, and the odd-numbered positions are the drift positions. Then, the logical sum of all odd-numbered positions becomes a signal indicating whether or not the control rod is moving, and this is called a drift signal.

When a reactor scram occurs, a scram start signal is generated as a set state signal and is applied to the control rod drive mechanism. As a result, emergency insertion of the control rod is started, and as the drive speed of the control rod increases at this time,
A drift signal is generated as an ON/OFF pulse signal for each control rod.

Conventionally, the drift signals and scram start signals for the number of control rods are input to two 100-point pen-writing type oscillograph event recorders, and the ON/OFF states of these signals are recorded and output as waveforms on an oscillograph. This was to record control rod scram events. Therefore, after the scram is completed, the operator checks the scram start time and the drift signal waveform time group for each control rod from the pen-written oscillograph record paper based on the time scale of the record paper, and calculates the predetermined operating time for each control rod. had to be calculated. This work placed a heavy burden on the operators, and it also took a long time to confirm the scram function.

On the other hand, a dedicated drift pulse time recorder is provided for each control rod, the data stored in the time recorder is read out by a dedicated scanner circuit, and these signals are turned on and off via a predetermined arithmetic processing device.
Some control rods record and output the time measured at the "OFF" point as numerical data in a predetermined format. However, in this case, each control rod must be equipped with a dedicated drift pulse time recorder or dedicated scanner circuit. , the number of circuits becomes large, and this causes a decrease in reliability and difficulty in diagnosis.

[Purpose of the invention]

The purpose of the present invention is to measure the scrum time appropriately and edit the measured data so that the operator can perform the scram An object of the present invention is to provide an all-control rod scram event recorder that allows event records to be easily recognized.

[Summary of the invention]

In order to achieve this purpose, in the present invention, the control rods are divided in advance into subgroups each having a predetermined number of rods, and a signal reception device and a measurement processing device are provided for each divided subgroup, and the drift signal within the subgroup is The falling and rising edges of the drift signal are detected and accepted as interrupt factors with equal priority, and these are processed cyclically and sequentially, and the built-in time counter stores the falling and rising times of each drift signal. After starting the scram, the measurement is completed after a predetermined period of time has elapsed, and the logged data is used to perform predetermined arithmetic and editing processing, and the results can be displayed and output.

[Embodiments of the invention]

The present invention will be described below with reference to an embodiment shown in the drawings. FIG. 1 is a block diagram of an event recorder 11 for all control rod scrams according to an embodiment of the present invention. When a reactor scram occurs, a scram start signal e is input to the scram signal pulse generator 12 of the event recorder 11 of the present invention. The scram pulse generator 12 detects the rising edge of the scram signal e and generates a pulse signal f. This pulse signal f is input to the signal receiving device 13 and the measurement processing device 14, thereby initializing the operations of the signal receiving device 13 and the measurement processing device 14.

The signal reception device 13 and the measurement processing device 14 are provided as a pair, and one pair is provided for each predetermined number of control rods 16 in the nuclear reactor 15.
For example, one signal reception device 13 and one measurement processing device 14 are provided for each of the eight control rods 16. In this case, if the total number of control rods 16 in the reactor 15 is 185, 24 signal reception devices 13 and measurement processing devices 14 will be provided.

The signal reception device 13 inputs the drift signal d of the control rod 16 from the control rod drive mechanism 17, detects the rise and fall of the signal, and issues an interrupt request signal i to the measurement processing device 14. The measurement processing device 14 stores the current time based on this interrupt signal i. This accumulates control rod drift time data. On the other hand, a cancellation signal k of the interrupt signal i is issued to the signal reception device 13. This is because the signal reception device 13 holds the interrupt signal i, and this holding is released. That is, since the interrupt signals i input to the measurement processing device 14 are for example eight control rods, if these interrupt signals are input at the same time, they are processed with a predetermined priority. It becomes necessary. Therefore, it is necessary to hold the unprocessed interrupt signal i of low priority until the processing of the interrupt signal i of high priority is completed. The measurement processing device 14 also includes a scram signal pulse generator 12.
The scram start time when the pulse signal f is input is also stored.

Next, the editing processing device 18 inputs the data j obtained by the measurement processing device 14 and edits it. The editing process ends when all of the control rod position signals r become #00, that is, when the rods are fully inserted. Furthermore, when the operator needs the edited result, the edited result can be examined by displaying it on the display output device 20 via the operation input device 19.

FIG. 2 is a block diagram of the signal reception device 13. As described above, the signal receiving device 13 includes a predetermined number of control rods 16 (hereinafter, eight control rods are used).
Drift signals d ₁ to _{d 8} of minutes are input. Therefore, pulse generating circuits 21 and 22 are provided for each of the drift signals d ₁ to d ₈ to detect the falling and rising edges of the drift signal d and output pulses. When the falling and rising edges of the drift signal d are detected, the pulse signals g and h are transferred to the interrupt factor holding flip-flop 2 for holding them.
3 and is held until a release signal k from the measurement processing device 14 is received. During this holding period, a falling interrupt request signal i is sent to the measurement processing device 14.
(g), a rising edge interrupt request signal i(h) is output.

Next, FIG. 3 is a block diagram of the measurement processing device 14. Since there are eight control rods, a plurality of interrupt request signals i(g) and i(h) from the signal receiving device 13 may be input at the same time. These interrupt request signals i are transmitted to the interrupt control circuit 2.
4, the interrupt requests are cyclically ordered as equal priority interrupt requests, and the arithmetic processing circuit 25 is activated. When the arithmetic processing circuit 25 is activated,
The measured data storage circuit 2 uses the value of the time counter 26 as the measured time _ty of the drift signal d of the control rod.
7 at a predetermined address.

Furthermore, immediately before the end of this measurement operation, the arithmetic processing circuit 25 outputs a cancellation signal k via the output port circuit 28 in order to cancel the interrupt request signal i. Then, processing of the next interrupt request signal i is started. That is, based on the measurement request (interrupt request signal) from the interrupt control circuit 24, a plurality of interrupt request signals i are cyclically ordered, and measurement operations are sequentially executed.
This process is then repeated until all eight control rods 16 reach their full insertion positions.

The data recorded in the measured data storage circuit 27 is transmitted to the editing processing device 18 as data j via the data transfer output circuit 29. Further, the control program storage circuit 30 stores in advance a control program to be executed by the arithmetic processing circuit 25.

FIG. 4 is a time chart showing the response of the event recorder 11 of the present invention when the scram start signal e is received. This is shown for the drift signal d _i of one control rod 16. The scram start signal e is input to the scram signal pulse generator 12 of the event recorder 11, where it is converted into a pulse signal f. The pulse signal f initializes the flip-flop 23 of the signal receiving device 13 and performs an initialization operation including stopping the self-diagnosis operation within the measurement processing device 14. Further, when the pulse signal f is input, the arithmetic processing circuit 25 refers to the time counter 26 and stores the current time in the measurement data storage circuit 27 as the scram start time _ts . When the scram starts, the control rod 16 starts moving, so the drift signal d _i repeats ON-OFF as shown in the figure.

The drift signal falling pulse generation circuit 21 and the drift signal rising pulse generation circuit 22 of the signal receiving device 13 detect the rising edge of the drift signal d _i and output the interrupt request signals i(g) and i(h). However, this interrupt request signal i is reset by a release signal k issued when the processing in the measurement processing device 14 is completed. That is, the measurement processing device 14 sequentially stores the falling and rising times of the drift signal d _i as t ₁ to _{t 7} .

The signal width T _c of the scram start pulse signal f is a constant value determined by the circuit design of the event recorder 11 . Furthermore, since the signal width T is reset by the measurement processing device 14, it does not become a constant value. this is,
This is because if there is a conflict with the interrupt request signal i from another control rod 16, the control rods 16 are prioritized cyclically, so they are forced to wait until their turn comes. Therefore, there is a slight difference in the signal width T for each pulse due to the difference in the order of acceptance processing of interrupts, and the number of control rods when dividing the control rod into a predetermined number is determined by the measurement processing device 14.
It will be evaluated and determined based on the processing speed capability of the system and the tolerance of the data to be measured.

FIG. 5 shows the address determination mechanism of the storage space of the measured data storage circuit 27 when storing the downlink and uplink times of the drift signal d for each control rod. The address assignment u consists of four sections. In other words, u ₁ is determined by the length of one data bit, and u ₂ is determined by the maximum number of data per control rod.
It consists of _u3 , which is determined by the number of interrupt factors that is twice the number of control rods handled by one measurement processing device 14, and _u4 , which is determined as the number of measurement processing devices 14 that covers all the number of control rods.

In this embodiment, the bit length of the time counter 26, which is determined by considering the time measurement accuracy and time width, is 16 bits (2 bytes), so u ₁ becomes u ₁ = ²⁰ , that is, 1. Next, u ₂ is used to identify a maximum of 48 pieces of data stored per control rod at the measurement target point of the drift signal d, so that u ₂ =2 ⁶ >48, that is, 6 bits. Further, since the number of control rods handled by one measurement processing device 14 is 8, u ₃ =2 ⁴ , that is, u ₃ is 4 bits to identify 16 interrupt factors. Furthermore, it is used to identify the 24 measurement processing devices 14 that cover all 185 control rods.
u ₄ =2 ⁵ >24, that is, u ₄ =5 bits. Figure 5 shows the address determination mechanism of the logging data storage space in such a case, and this is due to variations in the bit length of the time counter 26, the number of pulses to be measured per control rod, and the number of target control rods. shows that a similar mechanism exists.

FIG. 6 is an address map of the measurement data storage circuit 27 mentioned above. One byte consists of 8 bits, while the information in the time counter 26 at each falling and rising point consists of 16 bits.
This indicates that a 2-byte area is required for one interrupt request signal.

Next, FIG. 7 shows the priority ranking of the equal priority processing in the measurement processing device 14, taking as an example the case when two specific interrupt factors occur. In other words, for interrupt factors i _d-3 and i _d occurring simultaneously,
Before interrupt processing, each priority is ordered as 0 and 3, and the factors are assigned according to the priority.
i _d-3 becomes the target of the interrupt processing, and after the interrupt processing is completed, the interrupt cause i _d-3 is reset. Interrupt factor
If i _d-2 and i _d-1 have not occurred, interrupt factor d is ranked highest and interrupt processing is performed for it. The results of cyclically prioritized interrupt processing in this way are expected to improve speed and efficiency by reducing the processing overhead load and homogenize the error load distribution in the timekeeping record of factors that occur independently. be done.

FIG. 8 is a flow chart showing the operation of the event recorder 11 of the present invention. The event recording device 11 first checks whether there is a scram signal e (a), and if there is no scram signal e, repeats the self-diagnosis process.
(B). On the other hand, when the scram signal is present, the self-diagnosis process is stopped (c), and the signal reception device 13 and measurement processing device 14 are initialized (d). Furthermore, the measurement operation is started, and the scram start time _ts is read and the value is stored in the measurement data storage circuit 27 (e).

Next, the interrupt request signal i from the signal receiving device 13
(f), and if the interrupt request signal i is present,
Accepts the current highest-ranked interrupt factor determined by the equivalent priority ordering (G), and outputs its interrupt request signal i
At the same time as issuing a reset signal i for resetting (ch), the corresponding interrupt processing is executed (li). This interrupt processing is performed by reading the value of the time counter 26 and storing the value at a predetermined address.

Then, after starting the measurement, it is determined whether the predetermined elapsed time has exceeded (J), and if the predetermined time has not yet elapsed, the presence or absence of the interrupt request signal i is checked (F), and the same operation is repeated. . When the predetermined elapsed time has elapsed and the scram is completed, the measurement operation is stopped (l), and the editing processing device 18 executes editing processing (w). When this is completed, event recording during Scrum is complete.

〔Effect of the invention〕

As described above, according to the present invention, it is extremely easy to quickly confirm the normality of the scram function by displaying the timing records and editing processing results of scram events of all control rods after a reactor scram occurs. can.

Furthermore, since the present invention utilizes interrupt processing to record the timing of scram events, position changes associated with control rod operations can be timed with a minimum time delay, and only at the time of pulse change. You can store data with minimal storage space. Moreover, this effect can be made even more effective by installing a plurality of measurement processing devices, so it becomes possible to perform timekeeping records with extremely high precision. With conventional equipment, the measurement accuracy is higher than that of drift pulses, so measurement of the control rod buffer pulse width time, which occurs independently for each control rod, which was impossible to measure, is also an interrupting factor. It can be easily made into a measurement item by adding as . As described above, according to the present invention, it is possible to dramatically improve the accuracy of timing and recording of scram events without increasing the amount of hardware. Note that the present invention can be realized using commercially available microprocessor parts, and by applying integrated circuit parts it can be easily manufactured as a highly reliable or highly maintainable device. This provides a very effective timekeeping and recording device.

In the above description, the data is mainly presented digitally, but based on the data, it is also possible to display the timing results as a drift signal waveform similar to the conventional device.

[Brief explanation of the drawing]

FIG. 1 is an overall configuration diagram showing one embodiment of the invention, FIG. 2 is a block diagram of a signal receiving device, FIG. 3 is a block diagram of a measurement processing device, and FIG. 4 is a block diagram of an event recording device of the present invention. A time chart showing the operation, Figure 5 is an explanatory diagram of the storage space of time measurement result data,
Fig. 6 is an explanatory diagram of the address map of the measurement data storage circuit, Fig. 7 is an explanatory diagram of the equal priority processing in which reception is performed cyclically, and Fig. 8 is a time chart showing the operation of the event recording device of the present invention. be. 11...Event recording device, 13...Signal reception device, 14...Measurement processing device, 18...Editing processing device.

Claims (1)

[Claims] 1. In a device that measures and records a signal pulse train indicating the transient state of the insertion operation of all control rods that are inserted in an emergency due to the occurrence of a reactor scram in a nuclear power plant, a signal reception device that detects the falling and rising edges of the signal pulse train and holds it as an interrupt factor, and a built-in timer that selectively accepts the interrupt factor by cyclically prioritizing equivalent priority rankings. An all-control rod scram event recording device comprising: a measurement processing device that allocates and stores counter values in a predetermined storage space; and an editing processing device that collects and calculates and displays the measurement data.