JPH039710B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for controlling the conduction period of a pair of semiconductor switching elements constituting an inverter section of a power converter. This is applied to a pair of semiconductor switching elements.

In a general power conversion device, a pair of transistors is push-pull connected to the primary side of a DC power supply and a transformer, and output is obtained by two-phase half-wave rectification from the secondary side via a pair of diodes. When a direct current is generated in one cycle of the voltage applied to the transformer windings due to the switching time of semiconductor switching elements and diodes, unbalance during voltage drop, and unbalance in the control circuit, the transformer The excitation is biased toward the side where the DC component is applied in each cycle. As a result, the excitation current in the biased direction increases,
Due to the voltage drop due to the DC resistance of the transformer winding, the voltage drop of the semiconductor element, and changes in switching time, the excitation state continues to be biased until the DC component of the excitation voltage with respect to the transformer magnetic core becomes 0, and this bias Excitation is extremely inconvenient because it causes a greatly unbalanced current to flow through the transformer windings, causes magnetic saturation in one direction of the transformer, increases loss, destroys semiconductor switching elements, and causes unstable control. be. In order to prevent such biased magnetic phenomena, conventionally, the primary side of the transformer installed in the main circuit was connected in a half-bridge or bridge connection, and a capacitor was inserted in series with the primary winding. Measures were taken to prevent direct current excitation. However, with this method of suppressing biased magnetism, the required number of semiconductor switching elements increases, and a capacitor is required to be inserted in series on the primary side of the transformer, so efficiency decreases when the input voltage is low or the current is large. There were drawbacks such as a decrease in performance and an increase in the size of the device. In addition, the transformer may become transiently saturated due to the capacitance of the series capacitor, the excitation inductance of the transformer, the margin up to saturation magnetic flux, and the response speed of the pulse width control circuit. It has been difficult to increase the response speed because the faster the response, the more likely it is to occur.

In addition, as a method for preventing biased magnetization using the control function of a control circuit, rather than using a structure that inserts a capacitor, there is a method that detects the output of a semiconductor switching element that is alternately conductive and controls its pulse width. A method of detecting the current flowing through each semiconductor switching element and adding the obtained correction signal to the pulse width control, or detecting the instantaneous value of the current flowing through the semiconductor switching element, and detecting the instantaneous value of the current flowing through the other semiconductor switching element that was electrically connected half a cycle before each other. There is a method in which a current limiting circuit is provided to prevent the current from exceeding a value obtained by adding a certain set value to the current. Since the former method adds a correction signal, it is very difficult to balance the control amount due to current unbalance with the control amount due to output detection, and it has been difficult to achieve a good balance between output control and current balance. In the latter case, the output control and current control circuits can be separated, so good controllability can be expected except in terms of response speed, but it is necessary to achieve both good current balance and good output control response, especially the speed of increase in output. That was difficult. The reason for this is that the current flowing through the semiconductor switching element can only exceed the current in the semiconductor switching element that was conducting half a cycle ago by a set value, and on the other hand, the smaller the set value, the better the current balance. Therefore, in the end, it is necessary to reduce the temperature rise of the output to some extent by taking these considerations into account.

The present invention provides pulse control for one of a pair of semiconductor switching elements in a power conversion device according to a detected output value, and pulse control so that a current equal to the current flowing through the other semiconductor switching element flows. and controlling the one semiconductor switching element such that when the other semiconductor switching element is controlled at the maximum pulse width, a current larger than the current flowing through the semiconductor switching element by a set value flows. By controlling in alternating half-cycles, it is possible to obtain good current balance over the entire control range and at the same time to achieve good output control characteristics.

First, an embodiment of the DC-DC converter according to the present invention will be explained with reference to FIG. 1. The main circuit includes a DC concentrated input current, switching transistors Q ₁ and Q ₂ used as semiconductor switching elements, a main transformer T ₁ , and a rectifier. diodes D ₁ and D ₂ , a smoothing circuit L ₁ , a smoothing capacitor C ₁ , and a DC output voltage V ₀ is obtained across the capacitor. on the other hand,
The control circuit includes a reference oscillator 1, a current signal processing circuit 2,
3, drive signal generation circuits 4, 5, current detection circuit 6,
7, an output detection comparison circuit 8, etc.

In a device made up of such various members, a reference oscillator 1 generates a trigger signal 1 as shown in FIGS. 2A and 2B.
a and 1b are alternately applied to the respective drive signal generation circuits 4 and 5, and the circuits 4 and 5 are triggered by the trigger signals 1a and 1b to generate the respective switching transistors.
For Q ₁ and Q ₂ , conductive signals 4a as shown in E and F of the same figure,
Give 5a. Therefore switching transistor
The turn-on conditions for Q ₁ and Q ₂ are equal, but the turn-off conditions are different, as will be described later. In a normal output control state, the output detection comparison circuit 8 outputs an output error signal 8a by comparing the detected value of the output voltage _V0 with a reference value.
The drive signal generating circuit 4 is controlled by this output error signal 8a and provides a conducting signal to the base of the switching transistor _Q1 , which lasts for a time dependent on the magnitude of the output difference signal 8a. On the other hand, the drive signal generation circuit 5 is controlled by the signal 3a from the current signal processing circuit 3, and the current signal processing circuit 3 receives the current signal 2b related to the switching transistor Q1 sent from the current signal processing circuit ₂ and the current detection circuit. Switching transistor from 7
The current flowing through the switching transistor _Q2 is compared with the detection signal 7a, and follow-up control is performed so that the current flowing through the switching transistor _Q2 becomes equal to the current flowing through the switching transistor _Q1 . Note that the above explanation is an outline of the steady operating state, and the transient operating state will be explained in detail later.

Various current follow-up controls are possible depending on the electrical signal processing method, and first, an example of peak current follow-up will be described.

This peak current tracking method requires that the current flowing through the switching transistors _{Q 1} and _{Q 2 increases} monotonically. Although not commonly switching transistors Q ₁ and Q ₂ ,
It is monotonous except for the period (t ₁ to t ₂ ) immediately after the switching transistors Q ₁ and Q ₂ are turned on, in which a surge current due to the current flowing in the surge absorber connected in parallel to the rectifying diodes D ₁ and D ₂ flows. It is an increase. First, at time _t1 , the switching transistor _Q1 receives the second signal from the drive signal generation circuit 4.
When turned on by the signal 4a as shown in Figure E, the current is detected by the current detection circuit 6,
A detection circuit 6a as shown in G in the figure is sent to the current signal processing circuit 2. Since a surge current flows when the switching transistor is turned on, in order to prevent the adverse effects of this surge current, the period immediately after the switching transistor _Q1 is turned on ( _t1 to
t ₂ ), the reference oscillator 1 is generating the inhibition signal Ic,
After this period has elapsed, the current signal processing circuit 2 starts the peak detection operation of the switching transistor _Q1 from approximately time _t2 . This operation continues until the peak detection stop signal 4b generated by the drive signal generation circuit 4 is applied simultaneously when the conduction signal 4a generated by the drive signal generation circuit 4 changes to an open signal at time _t3 . Since the current flowing through the switching transistor _Q1 increases monotonically until the fall time except immediately after turn-on, it reaches its peak until the time _t3 when the conductive signal 4a changes to an open signal, and this peak value is at the time t3.
The peak is held until it is reset by the signal 1C from the reference oscillator 1 at _t10 . This signal becomes as shown in Figure 2, and the switching transistor Q ₁
It is applied to the current signal processing circuit 3 as a peak detection holding signal 2b of the current flowing through the current. After the conduction signal 4a is removed at time _t3 , the switching transistor _Q1 is turned on at time _t4 after an accumulation time, and then the drive signal generation circuit 5 is turned on by the trigger signal 1b from the reference oscillator 1. When activated, a driving signal 5a as shown in FIG. 2F is applied to the switching transistor _Q2 to turn it on at time _t6 .
The current flowing through the switching transistor _Q2 is detected by the current detection circuit 7, and its detection signal 7a (H in FIG. 2) is applied to the current signal processing circuit 3. Current signal processing circuit 3 is a switching transistor
Peak detection value P ₁ corresponding to the peak value of the current in each cycle flowing through Q ₁ and detection signal 7a
During the period immediately after turning on the switching transistor _Q2 (excluding _t6 to _t7) , the detection signal 7a changes the peak detected value _P1 of the transistor _Q1 to the time _t8.
When it exceeds the trigger signal 3a, the drive signal generation circuit 5
The drive signal generation circuit 5 receives this trigger signal 3.
a to change the conduction signal to an open signal (Fig. 2F). Therefore, the switching transistor Q ₂ is the second
As shown in Figure H, after the accumulation time has elapsed, it is turned off at time t9. And the current signal processing circuit 3 is the circuit 2
Reset signal 1 from reference oscillator 1 in the same manner as
d (FIG. 2D) at time _t11 .

In order for the above operation to occur normally, the current flowing through the transistor Q ₂ must reach the current flowing through the switching transistor Q ₁ at time _{t 3 before} time t 10. It means a state in which the output can be controlled and there is margin for the maximum output. Next, this state will be explained using mathematical formulas using FIG.

In FIGS. 2 and 3, the exciting currents of the transformer T ₁ at times t ₁ , t ₃ , and t ₄ are expressed as m ₀ , m ₁ , and m ₂ , and the currents flowing through the smoothing choke L ₀ are expressed as l ₀ and l _{1 .} , l ₂ , the currents flowing through the switching transistors Q ₁ , Q ₂ are i ₀ , i1 ,
_Similarly , for t ₆ , t ₈ , t ₉ , m ₃ , m ₄ , m ₅ , l ₃ ,
Let l ₄ , l ₅ , i ₃ , i ₄ , i ₅ . Also, the driving time of the switching transistor _Q1 (pulse width of the conductive signal)
Let τ ₁ be τ 1 , the accumulation time be Ts ₁ , and similarly, those of the switching transistor Q ₂ be τ ₂ and Ts2, the half cycle be Tc ₁ and Tc ₂ , and one cycle be Tc. Furthermore, ignoring the turn-on time of the switching transistor, the current unbalance factor is considered as switching transistor Q ₁ , Q ₂
As the accumulation time and saturation voltage of the primary of the transformer T ₁ ,
The secondary turns ratio is 1:1, and the excitation inductance is
L ₁ , the inductance of the smoothing yoke L ₀ is L ₀ ′ ₀ ,
When the winding voltage of the transformer T ₁ is υ _n and the voltage of the smoothing choke L ₀ is υ _e , the exciting electric grain m of the transformer T ₁ and the current l of the choke L ₀ are as follows: m=m ₀ +1/L ₁ ∫ ^t _t1 υ ^mdt (1) l=l ₀ +1/L' ₀ ∫ ^t _t1 υ ^edt (2) The currents iQ1 and iQ2 flowing through the switching transistors Q ₁ and Q ₂ , respectively, are iQ ₁ = l + m (3 ) iQ ₂ =l−m (4).

Also, from the control conditions mentioned above, i ₁ = i ₄ (5), the saturation voltages of switching transistors Q ₁ and Q ₂ are V _CES1 and V _CES2 , the voltage of DC input power supply E is E', and E ₁ = E′−V _CES1 (6) E ₂ = E′=V _CES2 (7) If E ₁ and E ₂ are set and the driving time τ ₂ of the switching transistor Q ₂ is calculated using these formulas, τ ₂ = 2m ₀ + (2E ₁ /L ₁ −V ₀ /L′ ₁ )τ ₁ + (E ₁ /L ₁ −
E ₁ /L′ ₁ )Ts ₁ +V ₀ .Tc ₁ /L′ ₀ )/E ₂ −V ₀ /L′ ₀ +E ₂ /L
₁ (8).

It is necessary for control purposes that the drive period τ ₂ changes with respect to changes in τ ₁ , and for this purpose, the following condition must be satisfied: 2E ₁ /τ ₁ >V ₀ /L′ ₀ (9).

Further, under the periodic condition m ₀ =m ₆ (10), if m ₀ is deleted from equation (8), τ2 = E ₁ /E ₂ (τ ₁ +Ts ₁ )−Ts ₂ (11).

The direct current component m _DC of the excitation current corresponding to the amount of biased magnetization of the transformer T1 is m _DC = 1/2 (m ₀ + m ₂ ) = 1/2L' ₀ {V0 (τ1 - τ2
)+V0(T _C2 −T _C1 )/2 +E ₁ Ts ₁ −E ₂ Ts ₂ }+1/2L ₁ (E ₁ Ts ₁ −E ₂ Ts ₂ )(
12) The magnetic flux change width of transformer T1 and the corresponding excitation current change width △m are: △m=m ₂ −m ₀ =E ₁ (τ ₁ +Ts ₁ )/L1=V0T _C /2L
₁ = E ₂ (τ ₂ + Ts ₂ )/L ₁ (13). And the polarized magnetism ratio m _DC /△m is m _DC /△m=E ₁ Ts ₁ −E ₂ Ts ₂ /T _C +L ₁ /L′ ₀ {V ₀ (E ₂
−E ₁ ) / ₂ E ₁・E ₂ + (F ₁ −V ₀ )Ts ₁ −(E ₂ −V ₀ )Ts ₂ /V ₀ T
_C ＋T _C2 −T _C1 ／2T _C }
(14) This equation (14) indicates the degree of biased current due to the difference between the saturation voltage, storage time, and positive and negative half cycles of the switching transistors Q ₁ and Q ₂ .
In this equation (14), the first term is determined by the excitation inductance L ₁ of the transformer T ₁ , and the second term is determined by the smoothing choke L ₀ and the excitation inductance L ₁ of the transformer T ₁ .
This shows that the larger the smoothing yoke L ₀ is, the smaller this influence becomes. Also (14)
indicates that the ratio of the bias current (DC component of the excitation current) to the excitation current of the transformer _T1 is determined by the ratio of each unbalance factor. Therefore, it can be seen that if the unbalance factors are approximately equal to each other, the biased current can be almost ignored by appropriately selecting the values of the inductance L ₁ of the transformer T ₁ and the smoothing choke L ₀ . This is _one of the features of the method of the present invention,
The present invention focuses on the fact that biased magnetization in a transformer is an integral effect over many cycles, and that the result of the integration appears as the excitation current of the transformer. It is controlled so that it is equal to . Therefore, in the present invention, it is not necessary that the voltage integral values of the positive and negative half cycles of the transformer drive waveform match with high precision as in the conventional case, and it is stable against variations in parts and changes over time. Moreover, since it is necessary to compensate for the bias voltage caused by the voltage drop of the primary DC resistance of the transformer T ₁ and the DC side inductance, these values can be designed to be small, improving the open loop voltage fluctuation rate and improving the open loop voltage fluctuation rate. Improvements in efficiency can be achieved.

Next, a case will be described in which the switching transistor _Q2 operates at the maximum pulse width, that is, turns off at time _t10 , which is a transient operation. In this case, the peak value of the current flowing through the switching transistor at time _t10 may not reach the peak held value _P1 of the switching transistor _Q1 ,
DC imbalance may occur. In this current unbalanced state, the switching transistor _Q1 suddenly and transiently carries most of the current, which also causes the disadvantage that almost no current flows through the switching transistor _Q2 . Therefore, in the present invention, in order to eliminate such a drawback, when the switching transistor _Q2 reaches the maximum pulse width, the current signal processing circuit 3 supplies the signal 3b to the current signal processing circuit 2, and the switching transistor
The current flowing through Q ₁ is connected to the switching transistor Q ₂
so that the current flowing at time t ₁₀ can only exceed a predetermined set value.
Conversely, _Q2 is controlled to follow the switching transistor _Q2 . Therefore, in the present invention, even in a transient case where the switching transistor _Q2 operates at the maximum pulse width, the switching transistor
Since the current imbalance between Q ₁ and Q ₂ can be limited within a set value, switching transistor Q ₁ will not be destroyed. To further explain the transient characteristics, the first
The current signal 3b of the current signal processing circuit 3 shown in the figure is
This signal 3b is generated by almost the same processing as that of the current signal processing circuit 2 in a steady state.
It is necessary to prevent the output from being affected, and there are several methods for this purpose.

First, a case will be described in which the current comparison functions of the current signal processing circuits 2 and 3 are equal to each other. In this case the current signal 3 based on the operation of the switching transistor _Q2
b is designed to have a larger value than the current signal 2b based on the operation of the switching transistor _Q1 . In addition to this, there is a method in which the peak value holding function of the current signal processing circuit 3 holds a value obtained by adding a set value to the peak value of the switching transistor _Q2 . Another simple method is to use the accumulation time of the switching transistor _Q2 so as not to stop the peak value detection operation of the current signal processing circuit ₃ at the time when the turn-off signal of the switching transistor _Q2 is generated. There is a method of stopping peak detection at the time of a release signal and adding a set value thereafter, such as charging a peak storage capacitor by a set amount of charge.

Next, a case will be described in which the current signals 2b and 3b of the current signal processing circuits 2 and 3 are formed equally. In this case, the current comparison operation of the current signal processing circuit 2 is performed with respect to the same reference value.
The operating point is changed until the current of switching transistor Q ₁ becomes larger than the current of Q ₂ by a set value compared to the current comparison operation of . This can be done by varying the voltage dividing resistors in the portion that performs the comparison operation. It is also effective to add the current signal 3b and the set value and use the result as a reference value to be introduced into the comparison function section. Using the method described above, the current signal processing circuit 2 generates the turn-off command signal 2a as a drive signal when the current of the switching transistor _Q1 becomes larger than the current flowing half a cycle before the switching transistor _Q2 by the set value. Output to circuit 4. The operation related to this is the same as the operation in which the switching transistor _Q2 is controlled to follow _Q1 , so the explanation will be omitted. Here, the set value is determined in consideration of the transient response and the magnetic flux margin when the switching transistor _Q1 of the transformer _T1 is conductive. During a transient response, when a command to increase the pulse width is issued as the output of the output detection/comparison circuit 8, the pulse width of the switching transistor _Q1 widens, and the current flowing through it increases compared to the previous cycle. A turn-off command is issued if the current in switching transistor _Q2 reaches a value that is a set value greater than the current in switching transistor Q2 half a cycle ago. and the switching transistor half a cycle ago.
Since the current of Q ₂ is approximately equal to the current of switching transistor Q ₁ one cycle before, the upper limit of the increase in the current of switching transistors Q ₁ and Q ₂ in one cycle is the set value. At this time, _the magnetic flux of the transformer T1 increases toward the conducting side of the switching transistor _Q1 by an amount greater than the pulse width of the switching transistor Q1 _one cycle before. It is necessary to design the transformer _T1 so that it does not become saturated due to this increase in magnetic flux. However, since the bias in the excitation of the transformer only occurs during a short transient period, the response speed of output control can be increased by setting the above set value to a relatively large value, and in this case also, the response speed of output control can be increased. The current balance of is maintained in good condition. In addition, such an operation is performed when the switching transistor is turned off by a signal from the reference oscillator 1 without depending on a turn-off command from the current signal processing circuit 3 when the input voltage drops or during a transient response.
It is also effective when turning off _Q2 . still,
In the above description, a transistor was used as the semiconductor switching element, but of course a thyristor may also be used. In addition, in the above explanation, the current signal processing circuits 2 and 3 include switching transistors Q ₁ ,
Although the instantaneous value of the current flowing through the switching transistors Q ₂ is processed, the integrated value of the detected current of the current flowing through the switching transistors Q ₁ and _{Q 2 may} be processed in the same way. The condition that the current flowing through Q ₂ must be monotonically increasing is no longer required. Alternatively, a time-dependent signal that changes in accordance with the pulse width of the drive signal waveform every half cycle may be added to the instantaneous value, averaged, and processed as described above. Furthermore, the switching transistor Q ₁ ,
The current flowing through Q ₂ may be divided into a small current region and a large current region, and in the small current region, the integral value may be processed as described above, and in the large current region, the instantaneous value may be processed. According to this control method, stable control is possible even when the currents of the switching transistors Q ₁ and Q ₂ do not increase monotonically in the small current region, and the peak values of the switching transistors Q ₁ and Q ₂ can be controlled to a certain level in the large current region. This has the advantage that it can be limited to a set value or less.

Note that the set value may be a variable value, and its absolute value may be dependent on, for example, the input voltage, current, or pulse width of the drive signal. In this case, the unbalanced current during transient times can be limited to a small value, etc. It has the effect of

As described above, in one half cycle, the first conductive switching element is controlled based on the output magnitude, and in the other half cycle, the second semiconductor switching element is controlled as the first semiconductor switching element. When the second semiconductor switching element operates at the maximum pulse width, the current flowing through the first semiconductor switching element becomes higher than the current flowing through the second semiconductor switching element half a cycle before. Since it is controlled so that only the specified value can be exceeded, it is possible to sufficiently respond within one cycle even to relatively large voltage fluctuations, and it is possible to obtain a good current balance, thereby preventing component variations and It also has a large tolerance for aging. Furthermore, even during a transient state, the unbalance of the current can be limited to within a set value, so that no loss occurs in the semiconductor switching element.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a block diagram of a power conversion device used to implement the method according to the present invention, and FIG.
The figure shows a waveform diagram of each part of the circuit shown in FIG. 1, and FIG. 3 shows a waveform diagram for explaining prevention of biased magnetism. 1... Reference oscillator, 2, 3... Current signal processing circuit, 4, 5... Drive signal generation circuit, 6, 7... Current detection circuit, 8... Output detection comparison circuit, Q ₁ , Q ₂
...Semiconductor switching device.

Claims (1)

[Claims] 1. A primary winding connected to a DC power source via at least first and second semiconductor switching elements;
a transformer having a secondary winding magnetically coupled to the primary winding; and a smoothing circuit connected to the secondary winding via at least one pair of diodes; In a power conversion device that obtains a DC output from the output side of the smoothing circuit by alternately conducting second semiconductor switching elements, the pulse width of the first semiconductor switching element is controlled in accordance with the value of the DC output during normal operation. together with the second
controlling the turn-off of the second semiconductor switching element so that the current flowing through the second semiconductor switching element becomes equal to the current flowing through the first semiconductor switching element half a cycle before; is controlled at the maximum pulse width, when the current flowing through the first semiconductor switching element reaches a value larger than the current flowing through the second semiconductor switching element by a set value. At that point, the first
A method for controlling a power conversion device, comprising turning off a semiconductor switching element. 2. According to the average value of the current integral value of the current flowing through one of the semiconductor switching elements during the period from when it is turned on until the turn-off signal is applied, and the instantaneous value at the time when the turn-off signal is applied. 2. The method of controlling a power conversion device according to claim 1, wherein the other semiconductor switching element is controlled by using the second semiconductor switching element. 3. Control is performed in accordance with a value obtained by adding a time-dependent value from the time of application of the turn-on signal to the instantaneous value of the current flowing through the semiconductor switching element when the turn-off signal is applied. A method for controlling a power converter. 4. In claim 1, when a turn-off signal is generated for the one semiconductor switching element, the other semiconductor switching element is controlled to turn off in response to the instantaneous value of the current flowing through the one semiconductor switching element. A control method for a power conversion device characterized by: 5. In claim 1, the other semiconductor switching element is controlled in response to an integral value of the current flowing through the one semiconductor switching element during a period from when it is turned on to when a turn-off signal is applied. A method for controlling a power conversion device, characterized by performing turn-off control. 6 a primary winding connected to a DC power supply via at least first and second semiconductor switching elements;
a transformer having a secondary winding magnetically coupled to the primary winding; and a smoothing circuit connected to the secondary winding via at least one pair of diodes; In a power conversion device that obtains a DC output from the output side of the smoothing circuit by alternately conducting second semiconductor switching elements, the pulse width of the first semiconductor switching element is controlled according to the value of the DC output, and A control method for follow-up control of turn-off of the second semiconductor switching element so that the current flowing through the second semiconductor switching element becomes equal to the current flowing through the first semiconductor switching element half a cycle before, the method comprising: When the current flowing through the semiconductor switching element is less than or equal to the set value, the value corresponds to the current integral value of the current flowing through the one semiconductor switching element during the period from when it is turned on until when a turn-off signal is applied. and controlling the turn-off of the other semiconductor switching element, and if the current flowing through the semiconductor switching element exceeds a set value, the current is conducted at the time when a turn-off signal is generated for the one semiconductor switching element. A method for controlling a power conversion device, characterized in that the other semiconductor switching element is controlled to turn off in response to an instantaneous value of current.