JPH0415418B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a rotational speed detection device for an electric motor using a resolver.

Conventionally, as a rotational speed detection device using a resolver, the resolver output signal is synchronously rectified with an excitation signal to obtain the rotational angle θ, and this rotational angle θ is differentiated to obtain the rotational speed. This method requires a filter to remove harmonic components in the process of determining the rotation angle, and also uses a differentiation circuit, which has the disadvantage of causing a detection delay.

This invention takes, for example, one cycle based on the resolver excitation signal, samples and holds the change in phase of the resolver output signal during that one cycle, and extracts it as the rotation speed, eliminating the need for filters and differentiating circuits and eliminating detection delays. The purpose is to provide a rotation speed detection device.

FIG. 1 shows a block diagram of the embodiment, and FIG. 2 shows a time chart explaining the operation. In Fig. 1, 1 is a reference oscillator that outputs a constant frequency reference signal, 2 is a frequency divider that divides the reference signal into an appropriate frequency and supplies an input signal to a two-phase oscillator for exciting the resolver, and 3 is a 2-phase oscillator. A phase oscillator is used to output a two-phase sine wave that excites the two-phase excitation windings of the resolver, 4 is a resolver with two-phase excitation windings 4a,
4b, and a detection winding 4c that generates an output signal corresponding to the rotation angle of the rotor. 5 is an electric motor,
6 is a waveform conversion circuit that converts the resolver output signal into a rectangular wave, 7 is a counter circuit that is set at the rising edge of this rectangular wave signal and counts the previous reference signal, and 8 is a counter circuit whose count value is a predetermined constant value. An integrator 9 starts integration every time a value is reached and generates a ramp-shaped output waveform. A first sample-and-hold circuit samples and holds the sample at a zero-crossing point at the beginning of the sampling period, and a second ramp-shaped output outputted after one period of the resolver excitation signal from the integrator is held at a later point in the sampling period. A second sample-hold circuit samples and holds the second resolver output signal at the zero-crossing point, and a third sample-hold circuit 11 takes the difference between the outputs of the first and second sample-hold circuits, samples and holds the sample, and outputs it as the rotation speed. circuit, 12 is a gate circuit for deciding whether to sample the ramp-shaped output of the integrator in the first or second sample-and-hold circuit, and 13 is the integrator 8 and gate circuit based on the counting result of the counter circuit. 12, a sequence circuit for outputting an appropriate command signal to the third sample and hold circuit 11 to control the entire circuit.

The signals of each part in this block diagram are shown in the time chart of FIG. In Fig. 2, from the top, the resolver excitation signal A (approximated by a triangular waveform), the reference frequency signal B from the reference oscillator, the resolver output signal C (approximated by a triangular wave), and the waveform conversion circuit to clearly indicate the zerox point. rectangular waveform D, a ramp-shaped output waveform E of an integrator that counts the reference frequency signal B and operates every time the counting result reaches a predetermined value, and this ramp-shaped output waveform E is used as the resolver output signal C zero-crossing point When holding the sample with
a sample-hold selection signal output based on the counting result of the reference frequency signal B for selecting whether to sample the ramp-shaped output waveform of 1 or the second ramp-shaped output waveform one cycle after the excitation signal A; F ₁ , F ₂ , based on the sample-and-hold selection signals F ₁ , F ₂ , one of the first and second ramp-shaped output waveforms is sampled at the zero-crossing point of the corresponding resolver output signal C, and output G ₁ , G ₂ , hold signal H for sampling and holding the difference between the first and second sample and hold values and outputting it as a rotational speed based on the count value of the reference frequency signal B, and a counter circuit that determines the sampling period. A clear signal I is shown.

That is, the excitation signal A of the resolver is obtained by frequency-dividing the reference frequency signal B from the reference oscillator by an appropriate value, and in this example, the frequency is B/20. Further, the sampling period for speed detection is divided by the reference frequency signal B so as to be three times the period of the resolver output signal C, and in the embodiment, the counter clear signal I is outputted every B/48 frequency. The resolver output signal C is a signal obtained by phase modulating the excitation signal A according to the detection winding rotation angle θ of the rotor, and if the rotor speed is zero, the detection winding output signal after one period of the excitation signal A. The phase angle of C does not change, and the values of the output signal C before and after one cycle are equal. That is, if the rotor is rotating, the resolver output signal C has different values before and after one cycle of the excitation signal A, and if the difference is taken, this becomes a signal corresponding to the rotation speed.

In this invention, when detecting a change in phase (rotation speed) due to rotation of the resolver output signal C,
One period of the resolver excitation signal A is determined based on the counter value of the reference frequency signal B, and an integrator is operated before and after this one period to generate first and second ramp-shaped outputs, which are sent to the corresponding resolver. The output signal C is sampled and held at the zero cross point to obtain the phase change for one cycle of the excitation signal A.

The reference wave collection signal B is a timing signal that controls the operation of the entire system, and is counted by a counter every sampling period, and its start is set by the first rising edge of the output signal C, and is started by the signal immediately after that. When the count value of the counter reaches a predetermined value (11 in the embodiment), a start command is output to the integrator, and the integrator generates a ramp-shaped output signal (first). At the same time, a first sample and hold selection signal _F1 is output. This first ramp-like output signal is sampled and held at the zero-crossing point of the corresponding resolver output signal C, and taken into the first sample and hold circuit 9. That is, the rectangular wave D after the waveform conversion of the first sample-and-hold selection signal _F1 and the resolver output signal C by the sequence circuit 13 is input to the gate circuit 12, the first hold signal is output, and the first sample-and-hold selection signal F1 is input to the gate circuit 12. The circuit is activated and the first ramp-shaped output signal is sampled and held at the resolver output signal C zero-crossing point.

Next, a change in the phase of the resolver output signal C after one cycle of the resolver excitation signal A is detected, and the counter count value reaches a value equivalent to one cycle of the excitation signal A (31 in the example). At that time, a start command is issued to the integrator again, and the integrator 8 starts the second integrator.
generates a ramp-like output signal. In addition, the integrator 8
The reset is performed at an appropriate timing (4 count values in the embodiment) after the first ramp-like output signal is sampled and held at the zero-crossing point of the resolver output signal C, and returns to zero at the subsequent second ramp-like output signal.
wait to form a ramp-like output signal. As in the previous case, the second ramp-shaped output signal is sampled and held at the zero-crossing point of the resolver output signal C and taken into the second sample-and-hold circuit 10, but this process is performed in synchronization with the reset signal of the integrator 8. The second sample-and-hold selection signal F ₂ is output, and by the action of this and the rectangular wave D of the waveform conversion circuit 6, a hold signal is output to the second sample-and-hold circuit 10 for processing.

These first and second sample and hold circuits 9, 1
The difference between the phases of the resolver output signal C held at 0 before and after one cycle of the excitation signal A is calculated via a comparator, and the third hold signal H is sequenced at the timing of the counter count value 46 immediately before the sampling period. The signal is output from the circuit 13, and the third sample hold circuit 11 is activated to take in the previous calculation result and output it as the rotation speed.

In this way, the present invention calculates the phase change due to the rotation of the resolver output signal by calculating the first and second ramp-shaped output signals, which are obtained by integrating one period of the resolver excitation signal, at the zero-crossing point of the resolver output signal. It is obtained by sample-holding, and the difference between the first and second sample-holding values is the phase change during one cycle of the excitation signal, that is, the rotation speed,
Further, the positive and negative values uniquely correspond to the rotation direction; for example, if the rotation is in the direction in which the phase advances, the difference in sample and hold values is positive, and if the rotation is in the opposite direction, the difference in sample and hold values is negative. That is, the direction of rotation can also be detected without performing logical judgment as in the conventional case.

In addition, in order to amplify the difference between the first and second sample and hold values corresponding to the phase change, the integrator is activated just before the zero-crossing point of the resolver output signal, and the constant is increased to obtain a steep ramp-like output signal. Therefore, even slight phase changes can be detected accurately, improving detection accuracy at low speeds.

As described above, the present invention detects the phase change of the resolver output signal by sampling and holding the ramp-shaped output waveform from the integrator before and after the period of the resolver excitation signal, and calculating the difference between these hold values. It has a simple configuration that eliminates the need for conventional filters and differentiating circuits, eliminates detection delays, and is ideal for control systems that require quick response, such as servo control systems.

[Brief explanation of drawings]

Figure 1 is a block diagram, and Figure 2 is a time chart. 1... Reference oscillator, 2... Frequency divider, 3... Two-phase oscillator, 4... Resolver, 6... Waveform conversion circuit,
7... Counter circuit, 8... Integrator, 9... First
sample hold circuit, 10... second sample hold circuit, 11... third sample hold circuit.

Claims (1)

[Claims] 1 In a resolver equipped with a 1- and 2-phase excitation winding and a detection winding that generates an output corresponding to the rotation angle of the rotor, a reference oscillator, a frequency divider that divides the reference oscillator output, and a frequency divider are used. a two-phase oscillator that outputs a two-phase resolver excitation signal after receiving the divided output from the resolver, and a waveform conversion circuit that converts the phase modulation signal from the resolver detection winding into a rectangular wave. a counter circuit that counts the reference oscillator output during the detection sampling period; and when the count value of this counter circuit reaches a predetermined constant value, a first integration is started and a first ramp-shaped waveform is output. and an integrator that starts a second integration after one cycle of the excitation signal and outputs a second ramp-shaped waveform, and a first ramp-shaped output from this integrator that starts the second integration after one period of the excitation signal, and a first sample-and-hold circuit that samples and holds the second ramp-shaped output at the rising edge of the second rectangular wave during the sampling period; A rotational speed detection device using a resolver, comprising a third sample-and-hold circuit that samples and holds the difference between the output values of the two sample-and-hold circuits and outputs it as the rotational speed of a rotor.