JPH0420284B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a channel selection circuit that can be used in common in a plurality of countries with different station frequencies and different numbers of channels.

Background technology and its problems Station frequencies and number of channels vary from country to country.

For example, as shown in Figure 1, in Japan, the local oscillation frequencies are 150MHz, 156MHz, and 162MHz.
Hz, 1 channel, 2 channels, respectively.
The stations of channel 3... are selected. In addition, in the United States, the local oscillation frequency is 101MHz, 107M
Channels 2, 3, 4, etc. are selected at Hz, 113MHz, etc., respectively. Furthermore, in Europe, the local oscillation frequencies are 87.15MHz, 94.15MHz, 101.15MHz,...
Then, channels 2, 3, 4, etc. are selected, respectively.

Therefore, in the past, tuning circuits designed exclusively for each country have been provided. However, once television broadcasting begins in various countries, the conventional three to four systems will no longer be sufficient, and the number of dedicated channel selection circuits that must be designed for each will increase. Therefore, there is a need for a channel selection circuit that can be used in common in a plurality of countries with different station frequencies and different numbers of channels.

OBJECTS OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to propose a channel selection circuit that can be used in common in a plurality of countries with different station frequencies and different numbers of channels.

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a tuning circuit that can tune at least a plurality of stations, and selects a tune by sequentially searching at intervals of approximately the greatest common divisor of the frequencies of a plurality of stations or its divisors. a memory 10 for writing the selected channel selection data and reading the channel selection data for channel selection; a plurality of decoders 22J, 22A, 22E for decoding the channel selection data read from the memory 10 into channel data;
It is characterized by comprising a switching means 23 for selecting one of the plurality of decoders 22J, 22A, 22E, and a display means 25 for displaying channel data selected and tuned by the switching means 23. This is a channel selection circuit.

The present invention is configured in this way and can be used in common in a plurality of countries with different station frequencies and different numbers of channels.

Embodiment Hereinafter, an embodiment of the present invention will be described with reference to FIG.

In the figure, 1 is an antenna, 2 is a tuner, and an intermediate frequency signal from the tuner 2 is supplied to an intermediate frequency amplifier 3 and amplified.

In addition, the local oscillation circuit of tuner 2 (not shown)
The local oscillation signal S _psc is supplied to a variable frequency divider 4 and frequency-divided, and the frequency-divided signal is supplied to a phase comparator 5. Further, 6 is a reference oscillator, and from this reference oscillator 6, for example, a 100KHz oscillation signal S _ref
is output and supplied to the phase comparator 5.
The comparison error signal from the phase comparator 5 is then supplied to the local oscillation circuit of the tuner 2 as a control voltage Vc via a low-pass filter 7.

The frequency division ratio of the variable frequency divider 4 is controlled by a step control circuit 8 consisting of a counter. That is, the count value of the control circuit 8 is, for example,
This count output S _COUN can be changed from 870 to 2360.
is supplied to the variable frequency divider 4 and used as the frequency division ratio of the variable frequency divider 4. Therefore, the frequency division ratio of the variable frequency divider 4 is
Since it can be changed from 870 to 2360, by this,
Local oscillation signal from tuner 2 local oscillation circuit
S _OSC frequency f _OSC can be changed from 87MHz to 236MHz.

This control circuit 8 is reset when the power is turned on. Further, 9 is a connection switch for presetting, and when power Eo is supplied to the control circuit 8 through this connection switch 9, the count value of the control circuit 8 is set to "10" from 870 to 2360.
The local oscillation frequency f _OSC of tuner 2 increases from 87MHz to 236MHz.
The search operation is performed by sequentially changing the frequency by 1 MHz.

Further, 10 is a memory in which channel selection data is written. Power supply Eo is supplied to this memory 10 as a write control signal through connection switch 9, and is also supplied to this memory 10 through connection switch 9 and inverter 11 as a read control signal. Therefore, this memory 10 is in a write state only during the preset time when the connection switch 9 is turned on, and is in a read state during other periods. Furthermore, the memory 10 is supplied with the count value supplied from the control circuit 8 having a digit of "10" or more as write data.

Further, 12 is an AFT signal forming circuit for obtaining a signal for AFT (automatic fine adjustment), and this forming circuit 12 is supplied with an intermediate frequency signal from the intermediate frequency amplifier 3 to form an AFT signal. Also, 1
3 is a synchronization signal detection circuit, and this detection circuit 13
An intermediate frequency signal from an intermediate frequency amplifier 3 is supplied to detect a synchronizing signal. The AFT signal from the formation circuit 12 and the detection signal from the detection circuit 13 are supplied to the station detection circuit 14. Then, the station detection signal Sd from the station detection circuit 14 is transmitted to the gate circuit 1.
5 to the memory 10 as a write signal. Furthermore, the station detection signal Sd passed through the gate circuit 15 is sent to a delay circuit 16 having a predetermined delay amount.
is supplied to the address counter 17 as an increment signal. This address counter 1
7 is reset to, for example, "0" when the power is turned on,
It is incremented by "1" each time the station detection signal Sd is supplied. The count output of this address counter 17 is then supplied to the memory 10 as an address signal. The reason for providing the delay circuit 16 is to ensure that the count value of the address counter 17 is changed after the data is written into the memory 10.

A power source Eo is supplied to the gate circuit 15 as a gate control signal through the connection switch 9, and the gate circuit 15 is opened only during preset when the connection switch 9 is turned on. Therefore, at the time of presetting, the count value of the control circuit 8 is
870 to 2360 are sequentially changed in increments of 10, and each time the tuner 2 selects a station, the count value of the control circuit 8 is stored in the memory 1.
The data are sequentially written to predetermined addresses of 0 as channel selection data.

Further, 18 is an operation switch for channel selection, and the count value of the address counter 17 is changed by operating this operation switch 18. Each time the operation switch 18 is operated to change the count value of the address counter 17, a signal S _R is output, and this signal is supplied to the memory 10 as a read signal via a delay circuit 19 having a predetermined delay amount. Therefore, since the memory 10 is in a read state during periods other than the preset time when the connection switch 9 is turned off, the channel selection data is read from the address specified by the counter value of the address counter 17 of the memory 10. DATA _S is read and supplied to the control circuit 8. Then, the digits of "10" and above of the count value of the control circuit 8 are set to the same value as the channel selection data DATA _S. Then, the local oscillation frequency f _OSC of the tuner 2 is changed and a tune is selected.

The AFT signal from the formation circuit 12 is sent to the gate circuit 2.
0 to the up/down signal generation circuit 21. The gate circuit 20 includes a connection switch 9
Power source Eo is supplied as a gate control signal through the gate. Then, the gate circuit 20 is connected to the connection switch 9
It is designed to open during periods other than the preset time when it is turned off. When the AFT signal is supplied to the generation circuit 21, the generation circuit 21 generates an up signal S _UP or a down signal according to the AFT signal.
S _DOWN is generated and supplied to the control circuit 8. The count value of the "1" digit of the control circuit 8 is the up signal S _UP or the down signal.
Changed by S _DOWN . Then, in accordance with this, the local oscillation frequency f _OSC of the tuner 2 is finely changed to perform fine adjustment.

In addition, the tuning data read out from the memory 10
DATA _S includes decoders 22J, 22A, 22E,
...is supplied to...

The decoders 22J, 22A, 22E, ... are
Each channel selection data DATA _S is channel display data.
It is for converting to DATA _C. The decoder 22J is for Japan, for example, and as shown in _FIG .
When 156, 162, ... are supplied, 1, 2,
Channel display data DATA _C for displaying channels 3, . . . is output and supplied to the terminal 23a of the changeover switch 23. The decoder 22A is for the United States, for example, and as shown in _FIG .
When 113,... are supplied, 2, 3, 4, respectively
Channel display data DATA _C for displaying the channel of ... is output, and this is sent to the selector switch 23.
is supplied to the terminal 23b. Furthermore, decoder 2
2E is for Europe, and as shown in Figure 3C, the channel selection data DATA _S is 87, 97, 101.
Channel display data DATA _C that displays channels 2, 3, 4, ..., respectively, when is supplied.
is output, and this is the terminal 23 of the changeover switch 23.
c.

The changeover switch 23 is switched depending on the country of use. For example, when used in Japan, the United States, and Europe, the movable terminal 23d is switched to the terminal 23.
a, 23b and 23c. Channel display data DATA _C obtained at the movable terminal 23d of the changeover switch 23 is supplied to the display 25 via the display drive circuit 24. Then, a channel is displayed on the display 25 according to the channel display data DATA _C.

This example is configured as described above, and the connection switch 9
You can preset by turning on. That is, by turning on the connection switch 9, the count value of the control circuit 8 becomes 870.
It can be changed in steps of 10 up to 2360. and,
Tuner 2 local oscillation frequency f _OSC is 87MHz to 236M
The search is performed by sequentially changing the frequency up to Hz in 1 MHz increments. Then, each time a channel is selected, the count value of the control circuit 8 of 10 or more digits is written to a predetermined address of the memory 10 as the channel selection data DATA _S. In this case, as shown in FIG. 4, in Japan, when the count value of the control circuit 8 is 1500, 1560, 1620, ..., 1, 2,
3. The station of the channel is selected. Therefore,
As shown in FIG. 5A, the memory 10 has addresses 0, 1, 2, . . . 150, 156, 162, . . . , respectively.
is written as channel selection data. Similarly, in the United States and Europe, channel selection data is written into the memory 10 as shown in FIGS. 5B and 5C.

Further, in this example, channel selection can be carried out by operating the operation switch 18 and changing the count value of the address counter 17 while the connection switch 9 is in the OFF state. That is, memory 1
Tuning data DATA _S is read from the address specified by the count value of the address counter 17 of 0, and is supplied to the control circuit 8. Then, the digits of "10" and above of the count value of the control circuit 8 are set to the same value as the channel selection data DATA _S. Then, the local oscillation frequency f _OSC of the tuner 2 is changed and the station corresponding to the tuning data DATA _S is selected. In this case, the "1" digit of the count value of the control circuit 8 is changed according to the AFT signal, and the local oscillation frequency f _OSC of the tuner 2 is changed.
is changed and fine-tuned.

Also, during this tuning, the tuning data DATA _S read out from the memory 10 is sent to the decoder 22.
J, 22A and 22E. Then, the channel display data DATA _C obtained at the movable terminal 23d of the changeover switch 23 is transferred to the display drive circuit 2.
4, the channel of the selected station is displayed on the display 25. In this case, for example in Japan, the movable terminal 23d of the changeover switch 23 is connected to the terminal 23a and the decoder 22J is selected, so that the channel selection data DATA _S is 150, 156, 162, . . .
2, 3,...When a channel is selected,
A channel display signal DATA _C for displaying channels 1, 2, 3, . Similarly, in the United States and Europe, decoders 22A and 22E
is selected, so the channel of the selected station is displayed correctly.

In this way, according to this example, simply the decoder 22
By simply switching between J, 22A, and 22E, it can be used in common in Japan, the United States, and Europe.

In the above embodiment, a decoder 22J for Japan, a decoder 22A for the United States, and a decoder 22E for Europe are provided, but if decoders for other countries are further provided, it is possible to serve more countries. It becomes possible to use it in common.

Effects of the Invention As described above, according to the present invention, it can be commonly used in a plurality of countries with different station frequencies and different numbers of channels.

[Brief explanation of drawings]

Figure 1 is a diagram showing the relationship between the local oscillation frequency and the number of channels, Figure 2 is a configuration diagram showing an embodiment of the present invention, and Figures 3 to 5 are used to explain the example in Figure 2. It is a line diagram. 2 is a tuner, 4 is a variable frequency divider, 5 is a phase comparator, 6 is a reference oscillator, 8 is a step control circuit, 9 is a connection switch for preset, 10 is a memory, 14 is a station detection circuit, and 17 is an address counter. , 18 is an operation switch for channel selection, 22J, 22A and 22E are decoders, respectively.
25 is a display.

Claims (1)

[Claims] 1. In a channel selection circuit capable of selecting at least a plurality of stations, the channel selection data obtained by sequentially searching at intervals of approximately the greatest common divisor of the frequencies of the plurality of stations or its divisors is obtained. A memory for writing and reading the tuning data for tuning, a plurality of decoders for decoding the tuning data read from the memory into channel data, and a switching device for selecting one of the plurality of decoders. and display means for displaying channel data selected and tuned by the switching means.