JPH0426554B2 - - Google Patents

Description

Detailed Description of the Invention (Industrial Field of Application) The present invention provides a high melting point metal gate that prevents a reaction between an upper layer of high melting point metal and a lower layer of polysilicon due to heat treatment in an element manufacturing process.
The present invention relates to a method for manufacturing a MOS semiconductor device.

(Prior Art) Recent advances in integrated circuit technology are moving toward faster speeds and larger capacities. Currently, semiconductor memory, etc.
Polycrystalline silicon (hereinafter referred to as polysilicon) is generally used for MOSLSI gate electrodes and wiring.
is used.

In this case, the sheet resistance is on the order of tens of Ω/□, so it is especially important for dynamic RAM (Random
Word line signal delay is a major problem in access memory (Access Memory), and is a major factor hindering the speeding up of devices.

Therefore, in recent years, attempts have been made to use various low-resistance materials for gate electrodes and wiring means. For example, Proceedings of the 45th Japan Society of Applied Physics Academic Conference, lecture number 13a-D-
2 and 13a-D-3, page 475, etc.

Here, an example of an attempt to use a conventional low-resistance material for the gate electrode and wiring means is an attempt to use a high-melting point metal that can realize a sheet resistance of 1 Ω/□ or less.

However, if you simply replace the conventionally used polysilicon with a high-melting point metal, it will still be a problem compared to polysilicon gates, which is a well-known technology.
There are many instability factors including MOS interface characteristics.

For example, when Mo, which is one of the high-melting point metals, is used for the gate electrode, high-temperature heat treatment of approximately 900°C or higher increases the interface state density and reduces mobility.

Therefore, as a measure to improve the instability of these MOS interface characteristics, a gate electrode with a two-layer structure of high melting point metal and polysilicon is being considered.

(Problem to be solved by the invention) However, even in such a structure, due to high-temperature heat treatment at approximately 900°C or higher, a silicidation reaction occurs between the high-melting point metal in the upper layer and the polysilicon layer in the lower layer, and the gate oxide film (SiO ₂ ) Problems still remained, such as a decrease in dielectric strength and peeling between the reaction layer and the remaining polysilicon layer due to volumetric shrinkage caused by the reaction.

Therefore, in some cases, attempts have been made to suppress the reaction between the high melting point metal and polysilicon by creating a three layer structure in which a high melting point metal silicide (for example, MoSi ₂ ) is sandwiched between the two layer structure electrodes. However, even with this structure, sufficient suppression has not yet been achieved.

This invention solves the problem of peeling between the reaction layer and the remaining polysilicon layer due to the instability of the interface characteristics of the high melting point metal gate MOSLSI, among the problems of the prior art. A method of manufacturing a metal gate MOS semiconductor device is provided.

(Means for Solving the Problems) This invention introduces a step of forming a barrier layer between a high melting point metal and polysilicon by ion implantation in a method of manufacturing a high melting point metal gate MOS semiconductor device. .

(Function) According to the present invention, since the above steps are introduced into the method for manufacturing a high melting point metal gate MOS semiconductor device, the reaction between the upper layer high melting point metal and the lower layer polysilicon layer due to heat treatment in the element manufacturing process is prevented. The barrier layer acts to prevent the above-mentioned problems, thus eliminating the above problems.

(Example) Hereinafter, an example of the method for manufacturing a high melting point metal gate MOS semiconductor device of the present invention will be described based on the drawings. Figures 1a to 1d are process explanatory diagrams of one embodiment, and Figure 2 is a diagram showing the process according to the present invention.
1 is a plan view after forming a gate electrode of a MOS transistor, and FIGS. 1a to 1c are X in FIG.
A cross-sectional view in the -X' direction, Figure 1 d is the Y-
It is a sectional view taken along the Y′ line.

First, in FIG. 1a, an oxide film 2 for element isolation is formed on a Si substrate 1 as a semiconductor substrate by a conventional method, and then a gate oxide film 3 is formed by thermal oxidation and reduced pressure.
A gate polysilicon film 4 is sequentially formed using a CVD (Chemical Vapor Deposition) method. The gate polysilicon film 4 is made conductive by P diffusion or the like. Thereafter, this polysilicon film 4 is oxidized to form an oxide film 5 on its surface.

This is, for example, 900℃30 in a dry oxygen atmosphere.
Do minutes. That is, for reasons to be described later, the appropriate thickness of this oxide film 5 is about 20 to 100 nm.

Thereafter, as shown in FIG. 1B, a portion of the oxide film 5 on the polysilicon film 4, which will serve as a wiring, is removed in areas other than the gate portion of the MOS transistor to form a partially removed portion 6. This is done by normal photolithography using a photoresist (not shown) as a mask.

Next, ion implantation is performed. This is done to knock off oxygen atoms in the oxide film 5 on the polysilicon film 4. Therefore, A _S ions or P ions, BF ₂ commonly used in the semiconductor industry,
Ions can be used, but heavy (high mass number) ions are more suitable.

In addition, the energy of ion implantation is such that the peak position of the implanted impurity is near the interface between the oxide film 5 of the polysilicon film 4 and the polysilicon film 4 (the oxide film side is better).
so that it becomes In this way, oxygen atoms are quantified most efficiently.

For example, when the oxide film 5 is about 250 Å thick, the ion implantation energy is 40 KeV, and when it is about 700 Å, the ion implantation energy is 40 KeV.
150KeV is appropriate. Additionally, the maximum implantation energy of practical ion implanters is currently approximately
Most of them are 200KeV (equivalent to about 400KeV when the implanted ions are double-charged), so
From a practical standpoint, the appropriate thickness of the oxide film 5 on the polysilicon film 4 is about 20 to 100 nm, as described above.

Next, it is preferable to increase the amount of ion implantation because more atoms are ionized. As a result of the experiment, about 5
×10 ¹⁵ ions/cm ² or more is preferable. However, if the amount of implantation is large, it will take a long time to implant the ions, so from a practical standpoint, approximately 1×10 ¹⁶ ions/cm ² is appropriate.

Thereafter, the oxide film 5 on the polysilicon film 4 is removed using an HF solution, and a high melting point metal 7 such as Mo is deposited. This is done by sputtering, vapor deposition, CVD, etc.

Thereafter, a nitride film (Si ₃ N ₄ ) 8 is deposited as a mask for ion implantation to form source and drain (FIG. 1c). This is done with spatuta, CVD, etc.

However, this does not necessarily have to be a nitride film, as long as it has a masking effect on the ion implantation for source/drain formation.
Glass) membrane etc. can be used.

Although the details will not be explained after this, general gate electrode patterning, source/drain 9 formation, CVD
Deposition of the insulating film 10, opening of the contact hole,
The device is completed through processes such as forming an Al-based wiring layer 11 (FIG. 1d). Note that 13 is a gate electrode pattern, and 12 is an active region.

As explained above, according to the manufacturing method of the present invention, the mixed layer 5' with oxygen atoms is formed on the very surface of the polysilicon layer by ion implantation, so even if heat treatment is added in the device manufacturing process, This mixed layer 5' becomes a barrier layer and suppresses the reaction between the high melting point metal and the underlying polysilicon film, and is therefore expected to have effects such as improving the manufacturing yield and reliability of the device.

Furthermore, according to the present invention, oxygen atoms can be localized at a higher concentration near the surface of the polysilicon film than by direct ion implantation of oxygen, so that properties such as resistance of the polysilicon film are hardly affected. You can make sure it doesn't reach you.

Furthermore, since ions commonly used in the semiconductor industry, such as _AS ions, can be used, there is no need for a separate oxygen ion implanter, which is useful from a practical standpoint.

In addition, thermal oxidation film and CVD of polysilicon film 4
In a structure in which an oxide film is sandwiched, a thickness of at least 50 nm is required to obtain a film without local defects.
When the overall thickness of the gate electrode becomes thicker and the step becomes steeper, or when the gate oxide film 3 is etched with an HF solution during gate electrode patterning,
The oxide film 5 on the polysilicon film 4 also has the disadvantage that it is etched from the periphery of the pattern at the same time, but in this invention, there is no increase in film thickness, and the mixed layer of active oxygen is hardly etched in the HF solution. Since it does not melt, it does not have the disadvantages mentioned above.

In the method described above, oxygen atoms are quantified, but the same effect can be expected even if nitrogen atoms are quantified.

In this case, instead of the oxide film 5 on the polysilicon film 4 shown in FIG. 1, a nitride film (Si ₃ N ₄ ) may be deposited by CVD or the like.

In addition, in the partially removed portion 6 (the portion where no oxygen or nitrogen atomic mixed layer is formed) to ensure electrical connection between the upper layer high melting point metal and the lower layer polysilicon, a tunnel current flows through this mixed layer. So it's not necessarily necessary.

(Effects of the Invention) As described above in detail, according to the present invention, a polysilicon film that will become a gate electrode and wiring is formed on a semiconductor substrate, and after forming an oxide film or a nitride film on this polysilicon film, Since the atoms in this oxide film or nitride film are introduced into the polysilicon film by ion implantation, the reaction between the high melting point metal and the underlying polysilicon film can be suppressed.

Along with this, there will be no peeling of the polysilicon film, and improvements in device manufacturing yield and reliability can be expected. Characteristics such as resistance will hardly be affected, and there is no need for an oxygen ion implanter.

The mixed layer created by ion implantation has the advantage of being almost insoluble in HF solutions.

[Brief explanation of drawings]

1a to 1d are process explanatory diagrams of an embodiment of the method for manufacturing a high melting point metal gate MOS semiconductor device of the present invention, and FIG.
Obtained by the method of manufacturing MOS semiconductor devices
FIG. 3 is a plan view after forming a gate electrode of a MOS transistor. 1...Si substrate, 2...Oxide film for element isolation, 3
...Gate oxide film, 4...Polysilicon film, 5...
... Oxide film, 6 ... Partially removed portion, 7 ... High melting point metal, 8 ... Nitride film, 9 ... Source/drain region, 10 ... Insulating film, 11 ... Wiring layer, 12 ...
Active region, 13...gate electrode pattern.

Claims (1)

[Claims] 1. (a) A step of forming a polysilicon film to serve as a gate electrode and wiring on a semiconductor substrate; (b) Forming an oxide film or a nitride film on at least the gate portion of the polysilicon film. (c) introducing atoms in the oxide film or nitride film into the polysilicon surface by on-on ion implantation; (d) removing the oxide film or nitride film to form a high melting point metal. A high-melting point metal gate characterized by providing a process and
A method for manufacturing MOS semiconductor devices.