JPH0426762B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION BACKGROUND OF THE INVENTION Field of the Invention The present invention generally relates to baristas;
More specifically, the present invention relates to a varistor having a symmetrical structure for surface mounting.

Description of Related Art Varistors, particularly metal oxide varistors, have gained wide acceptance as devices with non-linear resistance functions. The electrical characteristics of such a voltage-dependent resistance element can be expressed by the following equation.

I=(V/C) ⁿ where V is the voltage across the varistor, I is the current flowing through the varistor, C is a constant corresponding to the voltage at a given current, and the index n is a number greater than 1.

The value of n is calculated using the following formula.

n=log ₁₀ (I ₂ /I ₁ )/log ₁₀ (V ₂ /V ₁ ) where V ₁ and V ₂ are the voltages at currents I ₁ and I ₂ , respectively. The desired value of C depends on the type of application in which the varistor will be used. Generally, it is desirable that the value of n be as large as possible. This is because this index determines the degree to which the varistor deviates from its ohmic characteristics.

Although significant efforts by numerous researchers have improved our understanding of the operating characteristics and methods of metal oxide varistors, this device is still not completely understood. For this reason, many significant improvements in varistor operation have been made more or less heuristically. The reasons for improvement, the mechanism of improvement, or the degree of achievement have not necessarily changed completely.

However, it is known that the electrical characteristics of a varistor depend primarily on the physical dimensions of the varistor body. The energy rating of a varistor depends on the volume of the varistor body. The voltage rating of a varistor depends on its thickness or the length of the current path through the varistor body. The current capacity of a varistor is determined by the area of the varistor body measured perpendicular to the direction of current flow.

The term "surface-mounted varistor" is generally used to describe a varistor in which both the input and output terminals are located on the same major surface of the varistor body. Surface-mounted varistors are particularly suitable for applications where the varistor must be placed, for example, on a printed circuit board. In such applications, the conductive surfaces of the input and output terminals are typically
Placed directly on the electrical conductor of the printed circuit board. Solder paste is disposed between the conductive surfaces of the input and output terminals and the respective conductors of the printed circuit board. Electrical connections are then made between the varistor terminals and the printed circuit board by heating the entire assembly to melt the solder.

In such applications, it is essential to correctly orient the varistor relative to the printed circuit board prior to soldering. If a surface-mounted varistor is not oriented correctly, that is, if the main surface of the varistor where the input and output terminals are located is offset from the printed circuit board, the contact between the conductors of the printed circuit board and the terminals of the varistor may There is no electrical connection between the two. As a result, the printed circuit board circuitry, after assembly, does not perform its intended function. Therefore, it is necessary to check whether the surface-mounted varistor is correctly positioned before assembly, which considerably increases the time and cost of the assembly process.

Accordingly, one object of the present invention is to provide a varistor having both an input terminal and an output terminal on each of a plurality of main surfaces.

Another object of the present invention is to provide a surface-mounted varistor in which input terminals and output terminals are symmetrically arranged on opposing main surfaces.

Yet another object of the invention is to provide a fully passivated surface mount varistor.

SUMMARY OF THE INVENTION According to the present invention, in order to achieve the above object and other objects, a varistor body is provided having a first main surface and a second main surface opposing the first main surface.
electrodes are arranged on at least a portion of the first main surface and at least a portion of the second main surface, and similarly, the second electrodes are arranged on at least a portion of the first main surface and at least a portion of the second main surface. Place it in a part. The first and second electrodes are arranged on the varistor body symmetrically about an axis that is located between the first and second main surfaces and parallel to both main surfaces. In one embodiment of the invention, the dielectric layers are arranged symmetrically to completely passivate the varistor.

DESCRIPTION OF EMBODIMENTS The present invention will be described in detail below with reference to the drawings.

The detailed description that follows sets forth aspects of the invention that are believed to be most preferred. This description is not meant to be limiting, but is merely intended to illustrate the general principles of the invention. The scope of the invention is defined by the claims.

FIG. 1 shows a varistor 10 of known construction. The varistor 10 has a varistor body 12 having a first main surface 14 and a second main surface 16 opposite thereto. The varistor body 12 is preferably constructed of a sintered body whose basic constituents are a metal oxide such as zinc oxide and a plurality of pre-selected additives. The method of manufacturing the varistor body 12 is well known to those skilled in the art and will not be described further here.
Generally, the varistor body 12 is manufactured by, for example, mixing the main components, spray drying, and compression molding to form green pellets. The pellets are then sintered at high temperatures to obtain a varistor body having the desired varistor properties.

Varistor 10 further includes first and second electrodes 18
and 20. First and second electrodes 18
and 20 is the first main surface 14 of the varistor body 12
and second main surface 16, respectively.
The electrodes 18 and 20 are formed on the first main surface 14 and the second main surface 1 of the varistor body 12 by silk screening or the like with silver paint as electrodes, for example.
It can be formed by coating the varistor body 12 on the varistor body 12 and firing it at a relatively high temperature, for example, 800°, to bring it into electrical contact with the varistor body 12. Conductive leads (not shown) can be attached to electrodes 18 and 20, typically by soldering.

Figure 2 can be used for surface mounting. A known varistor 110 is shown. The varistor 110 has a first main surface 114 and a second main surface 1 of the varistor body 112.
first and second electrodes 118 attached to 16;
and 120. Formation of varistor body 112 and attachment of electrodes 118 and 120 to varistor body 112 may be performed as previously described with respect to FIG.

In the varistor 110, a portion of the first electrode 118 provided on the first main surface 114 extends along the first end surface 111 of the varistor body 112, and further extends along a portion of the second main surface 116. Extends along the line. Therefore, at least a portion of the first electrode 118 and the second electrode 120 are both arranged on one main surface 116 of the varistor body 112. Barista body 1
The proximity distance S between the second electrode 120 and a part of the first electrode 118 disposed on the second main surface 116 of the first and second main surfaces 114 and 11
The thickness t of the varistor body 112 is preferably larger than the thickness t of the varistor body 112 between 6 and 6. (The term "proximity" is used here to refer to the distance between the two closest points between the electrodes). By determining the proximity distance in this way, arcing and surface leakage current between electrodes 118 and 120 are reduced, and the current flows through the varistor to the main surface 1.
16, rather than flowing through the thickness t of the varistor body 112 between electrodes 118 and 120.

Varistor 110 is particularly targeted for applications where the varistor must be placed on, for example, a printed circuit board. In such applications, a portion of the electrode 118 and the second major surface 116 on which the electrode 120 is disposed
The varistor is oriented such that the varistor faces the printed circuit board. The conductive surfaces of electrodes 118 and 120 are typically disposed on electrical conductors of a printed circuit board. The conductivity of electrodes 118 and 120 and the printed circuit board is established by placing solder paste between the conductive surface of each electrode and the respective conductor of the printed circuit board, and then heating the entire assembly to melt the solder. An electrical connection is made with the body.

When using varistor 110 in applications such as those described above, proper orientation of the varistor with respect to the printed circuit board is essential. That is, a second electrode in which a part of the first electrode 118 and the second electrode 120 are arranged
The varistor must be positioned so that its major surface 116 faces the printed circuit board. If the varistor 110 is oriented such that the first major surface 114 faces the printed circuit board, no electrical connection between the printed circuit board conductors and the electrodes 120 is obtained. This orientation does not provide electrical connection with the second electrode 120, so the final assembled circuit will not perform as intended. Therefore, the need to properly orient the second major surface 116 relative to the printed circuit board and verify the correct orientation of the varistor 110 prior to soldering adds considerable time and expense to the assembly process.

FIG. 3 shows a varistor 21 according to an embodiment of the present invention.
Indicates 0. The varistor body 212 is the first and second
electrodes 218 and 220, the first
and second electrodes 218 and 220 are attached to first major surface 214 and second major surface 216, respectively, of varistor body 212. Barista body 2
The formation of 12 and the attachment of electrodes 218 and 220 to varistor body 212 may be performed as previously described with respect to FIG.

In the varistor 210, a portion of the first electrode 218 provided on the first main surface 214 extends along the first end surface 211 of the varistor body 212, and further extends along a portion of the second main surface 216. Extends along the line. Therefore, a portion of the first electrode 218 and the second electrode 22
0 is the second main surface 21 of the varistor main body 212
6.

Similarly, a second
The electrode 220 extends along the second opposing end surface 213 of the varistor body 212 and further extends along a portion of the first major surface 214 . Therefore, a portion of the second electrode 220 and the first electrode 218 are both located on the first main surface 214 of the varistor body 212.

The first electrode 2 arranged on the second principal surface 216
The portion 18 is substantially the same in shape and size as the portion of the second electrode 220 disposed on the first main surface 214. The proximity distance S between the electrode 218 and the electrode 220 on the first main surface 214 is the same as that on the second main surface 216.
Proximity distance S between upper electrode 218 and electrode 220
approximately equal to. In this case as well, the varistor 11 in FIG.
It is preferable that the distance S be larger than the thickness t of the varistor body 212 for the same reason as explained for 0. Therefore, the first electrode 218 and the second electrode 220 are connected to the varistor body 2 as shown in FIG.
12 first and second major surfaces 214 and 216
are arranged almost antisymmetrically. (As used herein, the term "antisymmetric" refers to a mirror image of the second electrode in which the first electrode is rotated 180 degrees about an axis extending parallel to the plane defined by the first and second major surfaces.) ).

The antisymmetric configuration of electrodes 218 and 220 is particularly advantageous in surface mount applications. As mentioned above, surface-mounted varistors are preferably designed to be placed in a predetermined location on, for example, a printed circuit board. In the case of an asymmetric surface mount varistor, such as varistor 110 of FIG. 2, it is necessary to properly orient the first and second major surfaces of the varistor before placing it on the printed circuit board.

The need to verify the orientation of the major surfaces of the varistor prior to soldering is eliminated by the antisymmetric configuration of electrodes 218 and 220 of varistor 210 shown in FIG. That is, regardless of whether the first or second major surface 214 or 216 of the varistor body 212 faces a conductor on the printed circuit board, both the first and second electrodes 218 and 220 are always in contact with the substrate surface. make electrical contact. The first and second major surfaces 214 before placing the varistor on the printed circuit board.
Since there is no need to check the orientation of and 216,
Assembly time can be significantly reduced.

Similar to the varistor 210 in FIG. 3, FIG.
Varistor 310 is shown in which electrodes 318 and 320 are arranged in substantially antisymmetric fashion with respect to major surfaces 314 and 316 of varistor body 312 . But the fourth
In the illustrated varistor 310, the electrode 318 on the main surfaces 314 and 316 of the varistor body 312 and the electrode 3
20 is filled with dielectric material 330 for insulation or passivation. This insulating material can be in the form of glass or polymer, for example. US Patent No.
Passivating coatings such as those described in US Pat. No. 3,857,174 may be used for this purpose. The insulating or passivating material 300 prevents stray currents from affecting the operation of the varistor 310 and allows the varistor 310 to be used in relatively "dirty" atmospheres. That is, due to the presence of the insulating or passivating material 330, mobile ions can be absorbed into the varistor body 3 between the electrodes 318 and 320.
Varistor 310 can be soldered without interfering with active surfaces 314 and 316 of Twelve. The passivating or insulating material 330 thus serves to improve the stability of the device and reduce leakage current, thus significantly improving the performance of the device.

FIG. 5 shows a varistor 410, similar to varistor 210 of FIG. 3, in which electrodes 418 and 420 are arranged in substantially antisymmetrical relation to major surfaces 414 and 416 of varistor body 412. Electrodes 418 on major surfaces 414 and 416 of varistor body 412
and 420 is filled with an insulating or passivating dielectric couple material 430 similar to varistor 310 in FIG. However, in the varistor 410 of FIG. 5, the dielectric material 4 filled in the space between the electrodes 418 and 420 on the first major surface 414
30 is an electrode 41 disposed on the first main surface 414
Extends over part of the surface of 8. A relatively small surface area of electrode 418 is not covered by dielectric material 430 . This is to facilitate electrical connection between electrode 418 and the dielectric of, for example, a printed circuit board.

Electrodes 418 and 420 on second major surface 416
Similarly, the dielectric material 430 filling the space between the electrodes 42 disposed on the second major surface 416
0 extends over a portion of the surface. A relatively small surface area of electrode 420 is not covered by dielectric material 430. This is also to facilitate electrical connection between the electrode 420 and a conductor on a printed circuit board, for example. Dielectric material 43
0 covers a portion of the surfaces of the first and second electrodes 418 and 420, thereby preventing the solder from spreading along the electrodes 418 and 420 during the soldering process.

FIG. 6 shows a varistor 510 according to another embodiment of the invention. Varistor 510 has first and second electrodes 518 and 520 attached to first and second major surfaces 514 and 516, respectively, of varistor body 512.

The first layer 540 of dielectric material forms the varistor body 5
It is provided on the first end surface 511 of No. 12. A portion of dielectric layer 540 covers a region of first major surface 514 adjacent to first end surface 511 of varistor body 512 . Another portion of dielectric layer 540 covers a region of second major surface 516 adjacent first end surface 511 of varistor body 512 .

A second layer 542 of dielectric material forms the varistor body 51
2 on the second opposed end surface 513 of the second side. A portion of the dielectric layer 542 is connected to the second layer of the varistor body 512.
covers a region of the first main surface 514 adjacent to the end surface 513 of the first main surface 514 . Another portion of dielectric layer 542 covers a region of second major surface 516 adjacent second end surface 513 . In a preferred embodiment, a first
and portions of second dielectric layer 540 and 542 are substantially similar in size and shape. As discussed in more detail below, dielectric layers 540 and 542 are preferably formed of a material, such as glass, that can withstand the high temperatures required to deposit metallization layers 550 and 552.

A first electrode 518 disposed on the first main surface 514 of the varistor body 512 is connected to the first dielectric layer 5
from the area directly adjacent to the edge of 40 to the first major surface 51
4 to an area immediately adjacent the edge of second dielectric layer 542 . As shown in Figure 6, the first
Preferably, a portion of the electrode 518 overlaps the edge of the first dielectric layer 540 and another portion of the first electrode 518 overlaps the edge of the second dielectric layer 542.

A second electrode 520 disposed on the second main surface 516 of the varistor body 512 is connected to the first dielectric layer 5
from the area directly adjacent to the edge of 40 to the second major surface 51
6 to an area immediately adjacent the edge of the second dielectric layer 542. A portion of the second electrode 520 overlaps the edge of the first dielectric layer 540, and another portion of the second electrode 520 overlaps the edge of the second dielectric layer 540.
It is preferable to overlap the edge of 2. Therefore, the sixth
When viewed from the side as shown in the side cross-sectional view, the surface of the varistor body 512 is covered with first and second electrodes 518 and 520 and first and second dielectric layers 540 and 542. There is.

A third dielectric layer 530 is disposed over most of the surface of the first electrode 518. However, a small region of the surface of the first electrode 518 adjacent to the second end surface 513 of the varistor body 512 is covered with the third dielectric layer 530.
not covered by The exposed surface area of first electrode 518 facilitates electrical connection with metallized layer 552, as will be discussed in more detail below. First end surface 51 of varistor body 512
The region of the third dielectric layer 530 adjacent to the first
dielectric layer 540. Therefore, the entire edge of the first electrode 518 adjacent the first end surface 511 of the varistor body 512 is completely insulated by the first and third dielectric layers 540 and 530.

A fourth dielectric layer 532 is disposed over most of the surface of second electrode 520. However, a small region of the surface of the second electrode 320 adjacent to the first end surface 511 of the varistor body 512 is covered with the fourth dielectric layer 53.
Not covered by 2. This second electrode 5
20 exposed surface areas are provided to allow electrical connection between the second electrode 520 and the metallization layer 550. Barista body 51
A region of the fourth dielectric layer 532 adjacent to the second end surface 513 of the fourth dielectric layer 532 contacts the second dielectric layer 542 . Therefore, the entire edge of second electrode 520 adjacent second end surface 513 of varistor body 512 is completely insulated by second and fourth dielectric layers 542 and 532.

The first metallized layer 550 is the first dielectric layer 5
40. The first metallized layer 550 extends to contact the edge of the fourth dielectric layer 532 and to be electrically connected to the second electrode 520 . The first metallization layer 550 thereby provides an electrical contact surface adjacent the second major surface 516 through which an electrical connection is made between the second electrode 520 and a conductor of a printed circuit board, for example. can be done.

The first metallization layer 550 further extends against the edge of the third dielectric layer 530, and in a preferred embodiment, the first metallization layer 550 overlaps the edge of the third dielectric layer 530. The first metallization layer 550 thereby provides an electrical contact surface adjacent the first major surface 514 through which an electrical connection is made between the second electrode 520 and a conductor of a printed circuit board, for example. can be done.

The second metallized layer 552 is the second dielectric layer 5
42. The second metallized layer 552 extends to contact the edge of the third dielectric layer 530 and to be electrically connected to the first electrode 518 . The second metallization layer 552 thereby provides an electrical contact surface adjacent the first major surface 514 through which an electrical connection is made between the first electrode 518 and the printed circuit board conductor. can be done.

The second metallization layer 552 further extends to contact the edge of the fourth dielectric layer 532. In a preferred embodiment, a portion of the second metallization layer 552 overlaps the edges of the fourth dielectric layer 532. The second metallization layer 552 thereby provides an electrical contact surface adjacent to the second major surface 516 through which the first
An electrical connection can be made between the electrode 518 of the electrode 518 and the electrical conductor of the printed circuit board.

Varistor 510 thus has a completely antisymmetric configuration with respect to first and second major surfaces 514 and 516. That is, terminals are formed adjacent to both major surfaces for electrical connection to both electrodes 518 and 520, respectively. Therefore, using varistor 510 for surface mounting provides the same advantages as described for varistor 210 in an antisymmetric configuration, for example.

Further, various dielectric layers 530, 532, 540
and 542 completely passivates the varistor 510. This protects the varistor 510 from the environment and requires no further encapsulation.

FIG. 7 is a cross-sectional view of the varistor 510 shown in FIG. 6, viewed from the end surface. A dielectric layer 54 is formed on the first and second end surfaces 511 and 513 of the varistor body 512.
0 and 542, the first and second varistor bodies 512 are arranged as shown in FIG.
The first and second sides 511a and 513a of the
dielectric layers 540a and 542a are disposed. Dielectric layers 540a and 542a may be formed of a material such as glass of approximately the same composition as that used for dielectric layers 540 and 542.
However, since it is not intended that the metallization layer be provided over dielectric layers 540a and 542a, the material need not be able to withstand the high temperatures required to deposit the metallization layer.
Therefore, materials such as plastic polymers may be used for dielectric layers 540a and 542a.

FIG. 7 also shows first and second electrodes 518 and 52 disposed on first and second major surfaces 514 and 516, respectively, of varistor body 512.
It shows 0. The first and second electrodes 518 and 520 are separated by dielectric layers 540a and 542.
Touches the edge of a. As shown in FIG. 7, small portions of first and second electrodes 518 and 520 may overlap dielectric layers 540a and 542a.

Third and fourth dielectric layers 530 and 532
is disposed over electrodes 518 and 520. Third and fourth dielectric layers 530 and 53
2 extend over the entire surface of electrodes 518 and 520, respectively, so that the edges of third and fourth dielectric layers 530 and 532 contact dielectric layers 540a and 542a. Therefore, when viewed from the end face as shown in the cross-sectional view of FIG.
Electrodes 518 and 520 are completely isolated from the surrounding environment and require no further encapsulation.

From the foregoing, it will be appreciated that the invention may be embodied in various specific forms. The above examples are therefore in all respects illustrative and not limiting. The scope of the invention is defined by the claims. All modifications that come within the meaning and scope of the claims are intended to be embraced within the scope of the invention.

[Brief explanation of drawings]

FIG. 1 is a side sectional view of a known varistor structure. FIG. 2 is a side sectional view of a known varistor structure in which two electrodes are arranged on the same major surface of the varistor body. FIG. 3 is a side cross-sectional view of a varistor according to an embodiment of the present invention in which two electrodes are symmetrically attached to the varistor body. FIG. 4 is a side cross-sectional view of a varistor according to another embodiment of the invention in which a dielectric material is disposed between the electrodes. FIG. 5 is a side cross-sectional view of a varistor according to another embodiment of the invention in which a dielectric material is disposed over a portion of the electrode surface. FIG. 6 is a side cross-sectional view of a varistor according to an alternative embodiment of the invention with a symmetrical passivation coating. 7th
The figure is an end sectional view of the element of FIG. 6. [Explanation of main symbols], 210, 310, 410,
510...Barista, 212, 312, 412,
512...Barista body, 214, 314, 41
4,514...first main surface, 216,316,4
16,516... second main surface, 218,318,
418, 518...first electrode, 220, 32
0,420,520...second electrode, 330,4
30,540,542...dielectric layer, 550...
First metallized layer, 552...second metallized layer.

Claims (1)

[Claims] 1. A first main surface 514, a second main surface 516, a first
a varistor body 512 having an end surface 511 and a second end surface 513; a first dielectric layer 540 covering the first end surface and partially extending to the first and second main surfaces; a second dielectric layer 542 that covers an end surface of and partially extends to the first and second major surfaces;
and a first electrode 51 disposed on the first main surface.
8 and a second electrode 520 disposed on the second main surface, one end of the first electrode is connected to the first
overlaps with the edge of the first dielectric layer on the main surface thereof, and the other end is adjacent to the edge of the second dielectric layer on the second main surface along the second dielectric layer. one end of the second electrode overlaps the edge of the second dielectric layer on the second main surface, and the other end overlaps the edge of the second dielectric layer along the first dielectric layer. Extending to a region adjacent to the edge of the first dielectric layer on the main surface, and further excluding a small region on the first main surface of the first electrode for electrical connection with the outside. A third dielectric layer 530 that covers most of the second electrode, and a fourth dielectric layer 532 that covers most of the second electrode except for a small area for electrical connection with the outside on the second main surface. one end of the third dielectric layer is in contact with the first dielectric layer, and one end of the fourth dielectric layer is in contact with the second dielectric layer.
in contact with the dielectric layer of the first and second
A varistor, wherein the electrodes are arranged antisymmetrically with respect to a center line between the first and second principal surfaces.