JPH0430783B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention provides photoelectric conversion signals (hereinafter referred to as video signals) of scanners such as ITV cameras and drum scanners.
This invention relates to a binarization circuit.

Conventionally, this type of binarization circuit has generally used a fixed slice method that applies a constant voltage as a slice level for binarization, or a floating slice method that superimposes low frequency components in a video signal on a fixed slice level. Ta.

These methods are effective when the distribution of white and black in the subject is approximately constant, but if this black and white ratio is not stable, the black ratio may change due to effects such as reflection of illumination light from the subject itself. There was a problem because areas with a large white ratio were developed to be dark and areas with a large white ratio to be bright. This development will be explained by reading a handwritten drawing using FIG. 2 as an example.

FIG. 2 shows a handwritten print pattern diagram. A drawing drawn in black pencil on white paper,
Naturally, there are areas where the number of wiring (hereinafter referred to as lines) indicating electrical connections is dense as shown in A in the figure.
There are sparse parts like B.

With binarization using fixed slices, lines are detected thicker in dense areas and thinner in sparse areas, which poses a problem when accurately detecting line widths, and cannot be resolved by simply improving the lighting. It was difficult.

The purpose of the present invention is to solve the following two problems.
This provides a value conversion circuit.

That is, according to the present invention, in binarizing a video signal, in order to correct fluctuations in the video signal level due to uneven illumination of a subject, a differentiating circuit for detecting the peak of the white level of the video signal, and the differentiating circuit are provided. a sample-and-hold circuit for sampling and holding the white level peak of the video signal from the output of the video signal; a timing generation circuit for generating a timing signal to be supplied to the sample-and-hold circuit; a reference circuit that provides a reference voltage; a subtraction circuit that subtracts the output of the sample and hold circuit from the reference voltage generated from the reference circuit;
A binarization circuit is obtained, comprising a comparator that binarizes a video signal by using the output of the subtraction circuit as a slice level.

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is an explanatory diagram of a handwritten print pattern diagram, and FIG. 3 shows output waveforms of various parts in the embodiment.

The handwritten print pattern diagram in Figure 2 is a drawing of the print pattern wiring on white paper with a black pencil. 1
It is input to input terminal 1 in the figure.

However, as shown by a in FIG. 3, the white level output of the video signal differs depending on the locations A and B in FIG. 2. As explained earlier,
For the sake of understanding the present invention, it will be mentioned that since black lines are written on white paper, it is easy to perform binarization just to distinguish between black and white.

The input signal 1 is matched in phase with a corrected slice signal when binarized by a comparator 3, which will be described later, in a delay circuit 2. At the same time input signal 1
After unnecessary noise is removed by a low-pass filter 4, the signal is differentiated by a differentiating circuit 5 in order to detect the peak of the white level of the input signal.

The differentiated signal is input to a sample and hold circuit 7 that samples and holds the peak of the white level of the video signal, and to a timing generation circuit 6 that detects the peak of the white level and provides a sample and hold timing signal. The peak of the white level is detected by detecting 0V in the middle of the voltage level b in FIG. 3, which is the output waveform of the differentiating circuit 5, changing from + to -.

The output sampled and held in this manner is subtracted by a subtraction circuit 8 from the output voltage from the reference circuit 9 which provides a reference voltage for binarization at a constant ratio, resulting in a waveform such as c shown in Fig. 3. Become.

This output is used as a slice level and synchronized with the original video signal by the delay circuit 2 described above, and then binarized by the comparator 3, and the binarized output is output to the output terminal 10.

Therefore, even if lines are written densely or sparsely, the slice level at the time of binarization is automatically corrected, and accurate binarization is possible.

As explained above, according to the present invention, a highly effective binarization circuit can be obtained with a simple circuit configuration.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram of a handwritten print pattern diagram.
FIGS. 3a, 3b, and 3c are diagrams showing signal waveforms at various parts in the embodiment. In the figure, 1 is an input terminal, 2 is a delay circuit, and 3
4 is a comparator, 4 is a low-pass filter, 5 is a differentiation circuit, 6 is a timing generation circuit, 7 is a sample hold circuit, 8 is a subtraction circuit, 9 is a reference circuit, and 10 is an output terminal. A is the dense part of the line, B is the sparse part of the line, C and D are the scanning lines of the scanner, Figure 3 a is the signal waveform of input signal 1, b
indicates the output waveform of the differentiating circuit 5, and c indicates the output waveform of the subtraction circuit 8.

Claims (1)

[Claims] 1. In order to correct fluctuations in the video signal level due to uneven illumination of the subject, a differentiation circuit is provided to detect the peak of the white level of the video signal, and the peak of the white level of the video signal is sampled and held from the output of the differentiation circuit. 2. A sample and hold circuit for generating a sample and hold circuit, and a timing generation circuit for generating a timing signal to be supplied to the sample and hold circuit.
a reference circuit that provides a reference voltage during value conversion;
2. It is characterized by comprising a subtraction circuit that subtracts the output of the sample and hold circuit from the reference voltage generated from the reference circuit, and a comparator that binarizes the video signal by using the output of the subtraction circuit as a slice level. Value circuit.