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JPH0431186B2 - - Google Patents
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JPH0431186B2 - - Google Patents

Info

Publication number
JPH0431186B2
JPH0431186B2 JP60295704A JP29570485A JPH0431186B2 JP H0431186 B2 JPH0431186 B2 JP H0431186B2 JP 60295704 A JP60295704 A JP 60295704A JP 29570485 A JP29570485 A JP 29570485A JP H0431186 B2 JPH0431186 B2 JP H0431186B2
Authority
JP
Japan
Prior art keywords
input
output terminals
conductor pads
mounting
flat package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60295704A
Other languages
Japanese (ja)
Other versions
JPS62155544A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP60295704A priority Critical patent/JPS62155544A/en
Publication of JPS62155544A publication Critical patent/JPS62155544A/en
Publication of JPH0431186B2 publication Critical patent/JPH0431186B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3415Surface mounted components on both sides of the substrate or combined with lead-in-hole components

Landscapes

  • Multi-Conductor Connections (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To mount two kinds or more of input/output terminals having different shapes and fitting types easily in response to application and a time without repeating the design and the like of a pattern of a wiring substrate by forming two kinds or more of conductor pads capable of connecting two kinds or more of the input/output terminals having different fitting types to the back of the wiring substrate. CONSTITUTION:Stepped sections 9 in which oppositely faced side edge sections along long sides are each lowered and a central section is heightened are shaped to the back of a wiring substrate 7. Flat package type conductor pads 10 for mounting input/output terminals are each formed at intervals of 1.27mm on lower surface in the stepped sections for the back, and pin grid array type conductor pads 11 for mounting input/output terminals are shaped at intervals of 2.54mm on the higher central section. These flat package type conductor pads 10 for mounting the input/output terminals and pin grid array type conductor pads 11 for mounting the input/output terminals are mutually connected electrically.

Description

【発明の詳細な説明】 [発明の技術分野] 本発明は必要に応じて装着形態の異なつたタイ
プの入出力端子を取付けることが可能な混成集積
回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a hybrid integrated circuit to which input/output terminals of different types can be attached as required.

[発明の技術的背景とその問題点] 近年電子機器の小型軽量化、高性能化、高信頼
性化等の要求に応じ、いろいろなタイプの混成集
積回路が使用されている。
[Technical background of the invention and its problems] In recent years, various types of hybrid integrated circuits have been used in response to demands for smaller and lighter electronic devices, higher performance, higher reliability, etc.

例えばこれらの混成集積回路は、入出力端子の
形状および取付形態の違いにより、フラツトパツ
ケージタイプとピングリツドアレイタイプの2つ
のタイプの種類に区分され、それぞれ別個の用途
に使用されている。
For example, these hybrid integrated circuits are classified into two types, a flat package type and a pin grid array type, depending on the shape and mounting form of the input/output terminals, and each type is used for different purposes.

すなわちフラツトパツケージタイプの混成集積
回路は、第4図に示すように、配線基板1の裏面
に入出力信号の配線された複数個のフラツトパツ
ケージタイプの入出力端子取付用導体パツド3が
所定の間隔で対をなし配設されており、この配線
基板1上に複数の能動的および受動的回路素子を
搭載しこれら全体を金属製キヤツプで気密に封止
するとともに、これらの取付用導体パツド3に複
数のフラツトパツケージタイプの入出力端子4
を、それぞれ配線基板1の裏面に沿つて並ぶよう
に銀ろう等により固着して構成されている。
In other words, in a flat package type hybrid integrated circuit, as shown in FIG. 4, a plurality of flat package type input/output terminal mounting conductor pads 3 to which input/output signals are wired are arranged on the back surface of a wiring board 1. A plurality of active and passive circuit elements are mounted on this wiring board 1, and the whole is hermetically sealed with a metal cap, and conductive pads for mounting these are mounted on the wiring board 1. 3 has multiple flat package type input/output terminals 4
are fixed to each other with silver solder or the like so as to be lined up along the back surface of the wiring board 1.

一方、ピングリツドアレイタイプの混成集積回
路は、第5図に示すように、配線基板1の裏面に
複数個のピングリツドアレイタイプの入出力端子
取付用導体パツド5を前述のフラツトパツケージ
タイプの入出力端子取付用導体パツド3とは異な
る配列方法で設け、これらの取付用導体パツド5
に複数のピングリツドアレイタイプの入出力端子
6をそれぞれ配線基板1の裏面に垂直に銀ろう等
により固着して構成されている。
On the other hand, in a pin grid array type hybrid integrated circuit, as shown in FIG. These mounting conductor pads 5 are arranged in a different arrangement method from the type input/output terminal mounting conductor pads 3.
A plurality of pin grid array type input/output terminals 6 are fixed perpendicularly to the back surface of the wiring board 1 using silver solder or the like.

しかしながらこれらのフラツトパツケージタイ
プおよびピングリツドアレイタイプの混成集積回
路においては、入出力端子取付用導体パツドが形
成された時点でそれに取付けられる入出力端子の
種類が決定されてしまうため、特性試験・評価時
と実装時のそれぞれの場合に最も望ましい入出力
端子の形状および装着形態を選ぶことができなか
つた。
However, in these flat package type and pin grid array type hybrid integrated circuits, the type of input/output terminal to be attached to the conductor pad for attaching the input/output terminal is determined at the time the conductor pad for attaching the input/output terminal is formed, so characteristic tests are not required. - It was not possible to select the most desirable shape and mounting form of the input/output terminals at the time of evaluation and at the time of implementation.

また、一旦一つのタイプの混成集積回路を製作
した後に、その入出力端子の形状および取付形態
を変更する場合には、変更しようとする入出力端
子の形態に応じた位置に、変更しようとするタイ
プに応じた間隔で入出力端子取付用導体パツドを
設け、入出力信号をこれらの新しい入出力端子取
付用導体パツドに配線するマスクパターン変更費
用が生じ、このため費用や工数が非常にかさむと
いう問題があつた。
In addition, once one type of hybrid integrated circuit has been manufactured, if the shape and mounting form of the input/output terminals are changed, the positions should be changed according to the form of the input/output terminals to be changed. Conductor pads for attaching input/output terminals are provided at intervals according to the type, and the cost of changing the mask pattern is incurred to route input/output signals to these new conductor pads for attaching input/output terminals, which increases the cost and man-hours significantly. There was a problem.

[発明の目的] 本発明はこれらの問題を解決するためになされ
たもので、配線基板の製作後に入出力端子の形状
および装着形態を選択することができ、しかも一
旦取着した入出力端子の形状および取付形態を容
易に変更することができる混成集積回路を提供す
ることを目的とする。
[Purpose of the Invention] The present invention was made to solve these problems, and it is possible to select the shape and mounting form of the input/output terminals after manufacturing the wiring board, and furthermore, it is possible to select the shape and mounting form of the input/output terminals once installed. It is an object of the present invention to provide a hybrid integrated circuit whose shape and mounting form can be easily changed.

[発明の概要] すなわち本発明の混成集積回路は、配線基板の
表面に複数の回路素子を搭載するとともに、その
裏面に装着形態の異なる2種以上の入出力端子を
接続可能な2種以上の導体パツドを設け、これら
異なる導体パツドの対応するものどうしを電気的
に接続させることにより、配線基板のパターン設
計等をやり直すことなく、用途および場合に応じ
て形状および装着形態の異なる2種以上の入出力
端子を容易に取付けることができるようにしたも
のである。
[Summary of the Invention] In other words, the hybrid integrated circuit of the present invention has a plurality of circuit elements mounted on the front surface of a wiring board, and two or more types of input/output terminals that can be connected to two or more types of input/output terminals with different mounting configurations on the back surface. By providing conductor pads and electrically connecting the corresponding ones of these different conductor pads, it is possible to create two or more types of conductor pads with different shapes and mounting forms depending on the application and situation without having to redo the pattern design of the wiring board. This allows input/output terminals to be easily attached.

なお本発明の混成集積回路において、フラツト
パツケージタイプおよびピングリツドアレイタイ
プの2つのタイプの入出力端子を取着することが
できる構造にした場合には、配線基板の裏面にフ
ラツトパツケージタイプの入出力端子の厚さ以上
の高さを有する段差を設け、その低い方の面上に
フラツトパツケージタイプの入出力端子取付用導
体パツドを配設するとともに高い方の面上にはピ
ングリツドアレイタイプの入出力端子取付用導体
パツドを配設することが望ましい。
In addition, when the hybrid integrated circuit of the present invention has a structure in which two types of input/output terminals, a flat package type and a pin grid array type, can be attached, the flat package type is attached to the back side of the wiring board. A step with a height equal to or greater than the thickness of the input/output terminals is provided, and conductor pads for attaching flat package type input/output terminals are placed on the lower side, and pingrids are placed on the higher side. It is desirable to provide conductor pads for attaching door array type input/output terminals.

このような構造の混成集積回路においては、特
にフラツトパツケージタイプの入出力端子取付用
導体パツドにフラツトパツケージタイプ入出力端
子が取着されたものを他の回路に搭載した場合、
その回路の被搭載面と裏面の大部分で接すること
になり、放熱効果が高くなつて動作時の熱による
特性の低下がほとんどなくなるという利点があ
る。
In a hybrid integrated circuit with such a structure, especially when a flat package type input/output terminal is attached to a conductor pad for attaching a flat package type input/output terminal, it is mounted on another circuit.
Most of the back surface is in contact with the surface on which the circuit is mounted, which has the advantage of increasing the heat dissipation effect and virtually eliminating any deterioration in characteristics due to heat during operation.

[発明の実施例] 以下本発明を図面に示す実施例について説明す
る。
[Embodiments of the Invention] Examples of the present invention shown in the drawings will be described below.

第1図は本発明の混成集積回路の一実施例の裏
面側を示す斜視図である。
FIG. 1 is a perspective view showing the back side of an embodiment of the hybrid integrated circuit of the present invention.

この図において、符号7は表面に導体回路が形
成された配線基板を示しており、その回路素子搭
載面側の所定の位置には、複数のメモリ、抵抗、
コンデンサのような能動的および受動的回路素子
(図示を省略。)が搭載され、これらの回路素子は
その全体が金属製のキヤツプ8で気密に覆われて
いる。
In this figure, reference numeral 7 indicates a wiring board on which a conductive circuit is formed, and a plurality of memories, resistors,
Active and passive circuit elements (not shown) such as capacitors are mounted, and these circuit elements are hermetically covered in their entirety by a metal cap 8.

また配線基板7の裏面には、長辺に沿つた対向
する辺縁部がそれぞれ低く中央部が高くなつた段
差9が設けられている。
Further, on the back surface of the wiring board 7, there is provided a step 9 in which opposing edges along the long sides are low and the center is high.

さらにこの裏面の段差の低い方の面上にはそれ
ぞれフラツトパツケージタイプの入出力端子取付
用導体パツド10が1.27mmの間隔で設けられてお
り、高い方の中央部上にはピングリツドアレイタ
イプの入出力端子取付用導体パツド11が2.54mm
の間隔で設けられている。
Furthermore, conductor pads 10 for attaching flat package type input/output terminals are provided at intervals of 1.27 mm on the lower side of the back surface, and a pin grid array is provided on the higher central part. The conductor pad 11 for mounting the input/output terminal of the type is 2.54 mm.
are provided at intervals of

またこれらのフラツトパツケージタイプの入出
力端子取付用導体パツド10とピングリツドアレ
イタイプの入出力端子取付用導体パツド11は互
いに電気的に接続されている。
Further, the flat package type input/output terminal mounting conductor pad 10 and the pin grid array type input/output terminal mounting conductor pad 11 are electrically connected to each other.

このように構成された混成集積回路において
は、これを搭載すべき回路の形態等に応じて、第
2図に示すように、フラツトパツケージタイプの
入出力端子取付用導体パツド10にフラツトパツ
ケージタイプの入出力端子12を固着してフラツ
トパツケージタイプの混成集積回路として使用し
たり、また第3図に示すように、ピングリツドア
レイタイプの入出力端子取付用導体パツド11に
ピングリツドアレイタイプの入出力端子13を固
着してピングリツドアレイタイプの混成集積回路
として使用することもできる。
In the hybrid integrated circuit configured in this manner, depending on the form of the circuit in which it is to be mounted, as shown in FIG. It can be used as a flat package type hybrid integrated circuit by fixing the input/output terminals 12 of the pin grid array type, or as shown in FIG. It can also be used as a pin grid array type hybrid integrated circuit by fixing the array type input/output terminals 13.

また、第2図に示すようにフラツトパツケージ
タイプの混成集積回路を製作してこれを搭載する
場合でも、1.27mmピツチのフラツトパツケージタ
イプの入出力端子12用のソケツトは入手が困難
であり、しかもこのソケツトへの差し込みおよび
抜きはずしも難しいので、特性試験・評価時に入
出力端子を付けかえて、第3図に示すようなピン
グリツドアレイタイプの混成集積回路を構成し、
これを特性試験・評価試験に供することができ
る。
Furthermore, even if a flat package type hybrid integrated circuit is manufactured and mounted on it as shown in Figure 2, it is difficult to obtain sockets for the flat package type input/output terminals 12 with a pitch of 1.27 mm. Moreover, since it is difficult to insert and remove from this socket, we replaced the input and output terminals during characteristic testing and evaluation to construct a pin grid array type hybrid integrated circuit as shown in Figure 3.
This can be subjected to characteristic tests and evaluation tests.

[発明の効果] 以上説明したように、本発明の混成集積回路に
おいては配線基板の裏面に形状および取付形態の
異なる入出力端子の取付用導体パツドがそれぞれ
設けられているので、どのような形状および装着
形態をとるかを配線基板の製作後に選択すること
ができる。
[Effects of the Invention] As explained above, in the hybrid integrated circuit of the present invention, conductor pads for attaching input/output terminals with different shapes and mounting forms are provided on the back surface of the wiring board, so that it is possible to The mounting form can be selected after manufacturing the wiring board.

また搭載時と特性試験・評価時とで取着する入
出力端子の形状および取付形態を簡単に変更する
ことができるので、この変更に伴なう開発費等を
大幅に低減することができる。
Furthermore, since the shape and mounting form of the input/output terminals to be attached can be easily changed between installation and characteristic testing/evaluation, development costs associated with these changes can be significantly reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の混成集積回路の一実施例の裏
面側斜視図、第2図および第3図はそれぞれ本発
明の実施例により構成されたフラツトパツケージ
タイプおよびピングリツドアレイタイプの混成集
積回路を示す斜視図、第4図は従来のフラツトパ
ツケージタイプの混成集積回路を示す斜視図、第
5図は従来のピングリツドアレイタイプの混成集
積回路を示す斜視図である。 1,7…配線基板、2,8…金属製キヤツプ、
3,10…フラツトパツケージタイプの入出力端
子取付用導体パツド、4,12…フラツトパツケ
ージタイプの入出力端子、5,11…ピングリツ
ドアレイタイプの入出力端子取付用導体パツド、
6,13…ピングリツドアレイタイプの入出力端
子、9…段差。
FIG. 1 is a rear perspective view of an embodiment of a hybrid integrated circuit according to the present invention, and FIGS. 2 and 3 are a flat package type and pin grid array type hybrid integrated circuit constructed according to an embodiment of the present invention, respectively. FIG. 4 is a perspective view showing a conventional flat package type hybrid integrated circuit, and FIG. 5 is a perspective view showing a conventional pin grid array type hybrid integrated circuit. 1, 7... Wiring board, 2, 8... Metal cap,
3, 10...Conductor pads for attaching flat package type input/output terminals, 4,12...Flat package type input/output terminals, 5,11...Conductor pads for attaching pin grid array type input/output terminals,
6, 13... Pin grid array type input/output terminal, 9... Step.

Claims (1)

【特許請求の範囲】 1 配線基板の表面に複数の回路素子を搭載する
とともに、その裏面に装着形態の異なる2種以上
の入出力端子を接続可能な2種以上の導体パツド
を設け、これら異なる導体パツドの対応するもの
どうしを電気的に接続させて成ることを特徴とす
る混成集積回路。 2 配線基板の裏面には適当な高さの段差が設け
られて、その高い方の面および低い方の面上に装
着形態の異なる入出力端子取付用導体パツドがそ
れぞれ区分されて設けられていることを特徴とす
る特許請求の範囲第1項記載の混成集積回路。
[Claims] 1. A plurality of circuit elements are mounted on the front surface of a wiring board, and two or more types of conductor pads are provided on the back surface to which two or more types of input/output terminals with different mounting configurations can be connected, and these different types of conductor pads are provided. A hybrid integrated circuit characterized by electrically connecting corresponding conductor pads. 2. A step of an appropriate height is provided on the back surface of the wiring board, and conductor pads for attaching input/output terminals with different mounting configurations are provided separately on the higher and lower surfaces of the step. A hybrid integrated circuit according to claim 1, characterized in that:
JP60295704A 1985-12-27 1985-12-27 Hybrid integrated circuit Granted JPS62155544A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60295704A JPS62155544A (en) 1985-12-27 1985-12-27 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60295704A JPS62155544A (en) 1985-12-27 1985-12-27 Hybrid integrated circuit

Publications (2)

Publication Number Publication Date
JPS62155544A JPS62155544A (en) 1987-07-10
JPH0431186B2 true JPH0431186B2 (en) 1992-05-25

Family

ID=17824080

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60295704A Granted JPS62155544A (en) 1985-12-27 1985-12-27 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS62155544A (en)

Also Published As

Publication number Publication date
JPS62155544A (en) 1987-07-10

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