JPH0437504B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a digital data recording/reproducing apparatus, and more particularly to a digital data recording/reproducing apparatus using a cassette tape or the like.

(Prior art) Conventionally, as an external storage device for personal computers, etc., the unit price per bit is low, and
Cassette tape recorders are widely used. Recording methods for such an external storage device include a tone burst method and a frequency shift keying (FSK) method. Since all of these methods convert digital data into analog signals and record them, they have the problem that the time required to record and reproduce one data pulse becomes long.

On the other hand, a method of recording the data pulse train as it is can be considered, but with this method, due to the characteristics of the cassette tape recorder, the DC component is not reproduced. This causes a problem in that the DC level of the reproduced signal fluctuates, and the threshold values of "0" and "1" for data restoration are no longer constant, making it impossible to perform stable reproduction. This problem will be explained in more detail with reference to FIG. Figure a shows a data pulse train to be recorded, and figure b shows a voltage applied to a storage device such as a cassette tape recorder (however, it is not filtered). When reproducing such recorded data, the DC level of the reproduced signal is
As shown in c of the same figure, “0” of the data pulse train,
It changes according to the ratio of "1". As a result, as shown in Figure d, the level of the reproduced signal decreases as the ratio of "0" increases, and conversely, as the ratio of "1" increases, the level increases. the result,
In portions A and B shown in the same figure, the reproduced signal becomes below the threshold value, and the data pulse is no longer correctly restored.

(Object of the Invention) The present invention has been made in view of the above circumstances, and is capable of quickly recording digital data using a cassette tape or the like, and
It is an object of the present invention to provide a digital data recording/reproducing device that can accurately reproduce recorded data.

(Structure of the invention) In order to achieve such an object, the present invention has the following features:
It has the following structure.

FIG. 1 is a block diagram showing the configuration of a digital data recording/reproducing apparatus according to the first invention.

Figure a shows a digital data recording section, and Figure b shows a digital data reproducing section.

The digital data recording section is configured as follows.

The data pulse train to be recorded is given to the data ratio detection means 2. The data ratio detection means 2 is
Detects the ratio of "0" and "1" in the data pulse train.

The output of the data ratio detection means 2 is given to the "0" recording voltage generation means 4 and the "1" recording voltage generation means 6. Both recording voltage generating means 4 and 6 respectively vary the recording voltage according to the ratio of "0" and "1" of the data pulse train.

The outputs of each of the recording voltage generating means 4 and 6 are given to a recording voltage selecting means 8. The recording voltage selection means 8 selects one of the "0" recording voltage generation means 4 and the "1" recording voltage generation means 6 depending on whether the data to be recorded is "0" or "1". Select and output recording voltage.

On the other hand, the digital data reproducing unit detects transitions of the reproduced signal from "0" to "1" and from "1" to "0" using a predetermined threshold, and restores the recorded data pulse train. A data transition detection means 10 is provided. Specifically, the data transition detection means 10 detects the transitions of the reproduced signal from "0" to "1" and from "1" to "0" using individually set threshold values. Detect and restore the recorded data pulse train.

In addition, in the figure, reference numeral 12 indicates a magnetic head;
Reference numeral 14 indicates a magnetic tape.

Furthermore, in addition to the above configuration, a second invention further provides a method for resetting the recording voltage of the recording voltage generating means when the data pulse train continues to have "0" or "1" for a predetermined period. A recording voltage reset means (not shown) is provided.

Next, the operation of the invention having the above-described configuration will be explained.

When the data ratio detection means 2 detects that the ratio of "1" in the data pulse train has become high, the recording voltage of the "0" recording voltage generating means 4 increases, and the "1" recording voltage is generated. The recording voltage value of means 6 decreases. Conversely, when it is detected that the ratio of "0" in the data pulse train has increased,
The recording voltage of the "0" recording voltage generating means 4 decreases, and the recording voltage of the "1" recording voltage generating means 6 increases. Then, when the data to be recorded is "1", the recording voltage selection means 8 is set to "1".
The recording voltage of the recording voltage generating means 6 is selected and output. On the other hand, when the data to be recorded is "0", the recording voltage selection means 8 selects and outputs the recording voltage of the "0" recording voltage generation means 4. In this way, when a data pulse train is recorded by changing the DC level of the recording voltage so as to be opposite to the DC level change of the reproduced signal, the level of the reproduced signal becomes a nearly constant value, so it is possible to extract the data pulse train from the reproduced signal. can be accurately restored.

In addition, in the second invention, if the data pulse train continues to be "0" or "1" for a long period of time, the recording voltage is reset, so the DC voltage during reproduction is
The level becomes more stable, and the data pulse train can be restored more accurately.

(Example) Hereinafter, the present invention will be described in detail based on an example shown in the drawings.

FIG. 2 is a circuit diagram of an embodiment of the present invention,
In particular, the configuration of the data recording section is shown.

F1 to F8 are D flip-flops, which constitute a shift register. A data pulse train to be recorded is applied to the D flip-flop F1. Said D flip-flop F1~
The output of F8 is applied to flip-flops F9 to F16 provided correspondingly, and latched. Clock pulses are applied to flip-flops F1-F8, respectively. These flip-flops F1 to F8 and F9 to F10 correspond to the data ratio detection means 2 described above.

Each output of the flip-flops F9 to F16 is connected to resistors R1 to R8 and diodes D1 to D connected in parallel in the forward direction toward the operational amplifier A1.
8 and is applied as the negative side input of the operational amplifier A1. The positive input of the operational amplifier A1 is given Vcc/2, which is divided by voltage dividing resistors R9 and R10 having equal resistance values. Here, Vcc
indicates the power supply voltage. Note that the resistor R11 is a feedback resistor of the operational amplifier A1. The diodes D1 to D8, operational amplifier A1, etc. correspond to the above-mentioned "0" recording voltage generating means 4.

Further, each output of the flip-flops F9 to F16 is applied as a negative side input of the operational amplifier A2 via resistors R1 to R8 and diodes D9 to D16 connected in parallel in opposite directions toward the operational amplifier A2. The positive input of the operational amplifier A2 is supplied with Vcc/2 divided by the voltage dividing resistors R9 and R10. Note that the resistor R12 is a feedback resistor of the operational amplifier A2. The diodes D9 to D16, operational amplifier A2, etc. correspond to the above-mentioned "1" recording voltage generating means 6.

The output of operational amplifier A1 is connected to diode D17,
It is applied to buffer amplifier A3 via an analog switch constituted by D18 and resistor R13. On the other hand, the output of operational amplifier A2 is applied to buffer amplifier A3 via an analog switch constituted by diodes D19, D20 and resistor R14. The output of the flip-flop F1 is applied as a control signal to the two analog switches via the NOT gate G1. The two analog switches and the like correspond to the recording voltage selection means 8 described above.

The output of the buffer amplifier A3 is applied to a magnetic head of a cassette tape recorder (not shown) via a filter 18 having appropriate characteristics.

The above configuration is a component common to the embodiments of the first invention and the second invention. The embodiment according to the second invention also has the following characteristic configuration.

NOT gate G2 and NAND gate G4 are
Based on the outputs of flip-flops F1 and F2,
This detects the transition from "0" to "1" in the data pulse train. Similarly, NOT gate G3 and NAND gate G5 are connected to flip-flop F1,
Based on the output of F2, "1" of the data pulse train
→Detect transition to “0”. NAND gate G
The outputs of G4 and G5 are given to the retriggerable monomulti circuit 16 via the NOR gate G8. ``0'' or ``1'' of continuous data to be recorded is latched to NOR gates G6 and G7, which are supplied with part of the outputs of NAND gates G4 and G5. Then, the output of the retriggerable monomulti circuit 16 and the NOR gate G6, G
OR gate G9, G10 which is given the output of 7
identifies "0" or "1" of the continuous data. The output of OR gate G9 is applied to clear terminals CL of D flip-flops F5 to F8.
On the other hand, the output of OR gate G10 is applied to preset terminals PR of the D flip-flops F5 to F8. Further, the output of the AND gate G11, which is supplied with the clock pulse and the output of the retriggerable monomulti circuit 16, is supplied to the clock input terminals CK of the flip-flops F9 to F16. The gates G2 to G11 and the retriggerable monomulti circuit 16 correspond to recording voltage resetting means and are also related to the data ratio detecting means 2 described above.

Next, the operation of the embodiment with the above-mentioned configuration will be explained as follows.
This will be explained according to FIG.

Assume that a data pulse train as shown in FIG. 4a is applied to the D flip-flop F1. This data pulse train is sequentially shifted through the D flip-flops F2 to F8 and stored each time a clock pulse is input. Each D flip-flop F1
~F8 contents are flip-flop F9~F16
is latched to.

By the way, the virtual ground point of the operational amplifier A1 is the voltage value divided by the voltage dividing resistors R9 and R10.
It is equal to Vcc/2. Therefore, if the sum of the data pulse trains added by the resistors R1 to R8 and the diodes D1 to D8 is equal to or higher than Vcc/2, that is, if the ratio of "1" in the data pulse train becomes high, , the output of the operational amplifier A1, that is, the "0" recording voltage gradually increases in the negative direction.

Also, for the virtual ground point of operational amplifier A2,
Since the diodes D9 to D16 are connected in opposite directions, the resistors R1 to R8 and the diodes D9 to D
The sum of the data pulse trains added by 16 is
When the voltage is Vcc/2 or less, that is, when the ratio of "0" in the data pulse train increases, the output of the operational amplifier A2, that is, the "1" recording voltage gradually increases in the positive direction.

On the other hand, the output of the D flip-flop F1 is
It is input to the analog switch mentioned above via NOT gate G1. Therefore, when the input data is "0", the diodes D17 and D18
becomes conductive, and the output of the operational amplifier A1, that is, the "0" recording voltage is applied to the buffer amplifier A3. On the other hand, when the input data is "1", diodes D19 and D20 become conductive, and the output of operational amplifier A2, that is, the "1" recording voltage is applied to buffer amplifier A3. Then, the output of buffer amplifier A3 is
8 to a magnetic head (not shown),
Writing is performed on the magnetic tape.

The above is an operation common to the embodiments according to the first invention and the second invention. Next, the operation of the embodiment of the recording voltage resetting means, which is a feature of the second invention, will be explained.

When a data transition is detected by the gates G2 to G5, the transition signal is applied to the retriggerable monomulti circuit 16 via the NOR gate G8. If the transition signal is not input within a period determined by a preset time constant, the retriggerable monomulti circuit 16 inverts its output from "1" to "0". NOR gate G6 outputs "1" when continuous data of "0" is input, and NOR gate G7 outputs "1".
Outputs "1" when continuous data is input.

Therefore, if "0" is input continuously for a long period of time, the D flip-flops F5 to F
OR gate circuit G10 is connected to preset terminal PR of 8.
``1'' is input through the D flip-flops F5 to F8, and the D flip-flops F5 to F8 are set to ``1''. As a result, the voltage applied to the virtual ground point of the operational amplifier A1 increases, and the "1" recording voltage is raised.
This eliminates the inconvenience of the "1" recording voltage reaching the ground level even if "0" is input continuously over a long period of time.

On the other hand, when "1" is inputted continuously for a long period of time, "1" is added to the clear terminals of D flip-flops F5 to F8 via OR gate G9, and the D flip-flops F5 to F8 become "1". 1”. As a result, the "0" recording voltage is lowered, thereby eliminating the inconvenience that the "0" recording voltage reaches the ground level when "1" is input continuously.

Due to the above-described operation, as shown in FIG. 4b, the recording voltage changes so that as the ratio of "1" in the recorded data increases, the "1" recording voltage decreases, and the "0" recording voltage decreases. The voltage changes to increase in the negative direction. Furthermore, when the ratio of "0" in the recording data increases, the recording voltage changes in the opposite direction to that in the above case.

FIG. 4c shows fluctuations in the DC level when data recorded as described above is reproduced, and FIG. 4d shows the reproduced signal waveform. In this way, when each recording voltage is varied according to the ratio of "0" and "1" in the data pulse train to be recorded, the level of the reproduced signal becomes almost constant. Therefore, by comparing such reproduced signals with reference to the ground level, the original data pulse train can be restored with sufficient accuracy. but,
``0'' or ``1'' for a considerable period of time
When the signal is continuously reproduced, the level of the reproduced signal becomes close to the ground level. Therefore, in order to more accurately restore the data pulse,
As shown in Figure 3, the reproduction signal changes from “0” to “1”.
It is preferable that the recorded data pulse train be restored by detecting the transition from "1" to "0" using thresholds that are individually set corresponding to the respective transitions.

That is, in the embodiment shown in FIG.
After the reproduced signal detected at step 2 is amplified by an amplifier 20, it is applied to a Schmitt trigger circuit 22 comprised of transistors Tr1 to Tr3. As is well known, the Schmitt trigger circuit 22 has hysteresis characteristics, so in the case of a transition from "0" to "1", it is on the positive side of the ground level and "1"
→In the case of a "0" transition, each data transition is detected on the negative side of the ground level. If data transitions are detected in this way, even if the reproduced signal approaches the ground level due to successive 0s or 1s, compared to the case where both transitions are detected at ground level, , the recorded data can be restored more accurately.

In the above embodiment, the shift register and latch circuit as the data ratio detection means 2 are
Each was formed with eight flip-flops,
These can be constructed from any number of flip-flops. As the number of flip-flops increases, the ``0'' of the data pulse train,
Since the ratio of "1" can be detected with high precision, control of the recording voltage is also improved accordingly.

Furthermore, the means for restoring the data pulse train from the reproduced signal may be modified in various ways other than using the Schmitt trigger circuit 22 as shown in FIG.

(Effects of the Invention) As is clear from the above explanation, the digital data recording/reproducing apparatus according to the present invention detects the ratio of "0" and "1" of the data pulse train to be recorded, and adjusts the ratio to "0" and "1". Since the "0" recording voltage and the "1" recording voltage are set accordingly, the level of the reproduced signal becomes constant, thereby stably restoring the original data pulse train from the reproduced signal. be able to.

Furthermore, from the above, since the data pulse train is directly recorded on the magnetic tape using a cassette tape recorder, etc., without converting the data pulse train into an analog signal as in the conventional case,
Digital data can be recorded and reproduced at relatively high speed.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the configuration of the present invention, Fig. 2 is a circuit diagram of the data recording section of the embodiment, Fig. 3 is a circuit diagram of the data reproducing section of the embodiment, and Fig. 4 is the operation of the embodiment. The waveform diagram and FIG. 5 are explanatory diagrams of the operation of the conventional example. 2...Data ratio detection means, 4...'0' recording voltage generating means, 6...'1' recording voltage generating means,
8... Recording voltage selection means, 10... Data transition detection means.

Claims (1)

[Scope of Claims] 1. The digital data recording unit includes data ratio detection means for detecting the ratio of "0" and "1" in the data pulse train, and "0" recording for varying the recording voltage according to the ratio. a voltage generating means and a "1" recording voltage generating means; when the data to be recorded is "0", the recording voltage of the "0" recording voltage generating means is applied; when the data to be recorded is "1", the recording voltage is applied to the "0" recording voltage generating means; It is equipped with recording voltage selection means for selecting and outputting the recording voltages of the "1" recording voltage generation means, and the digital data reproducing section is configured to select "0" of the reproduction signal.
→'1' and '1' → '0' transitions are detected using a predetermined threshold value, and data transition detection means is provided for restoring the recorded data pulse train. Digital data recording/playback device. 2. The data transition detection means detects transitions from "0" to "1" and from "1" to "0" of the reproduced signal.
2. The digital data recording/reproducing apparatus according to claim 1, wherein the recorded data pulse train is restored by detecting each pulse using a threshold value set individually corresponding to each pulse. 3. The digital data recording section includes data ratio detection means for detecting the ratio of "0" and "1" in the data pulse train, "0" recording voltage generating means for varying the recording voltage according to the ratio, and "1" recording voltage generating means for varying the recording voltage according to the ratio. ” recording voltage generating means, when the data to be recorded is “0”, the recording voltage of the “0” recording voltage generating means is applied, and when the data to be recorded is “1”, the recording voltage of the “1” recording voltage is applied. recording voltage selection means for selecting and outputting recording voltages of the generating means; and "0" or "1" of the data pulse train.
If it continues for longer than a predetermined period,
and a recording voltage resetting means for resetting the recording voltage of the recording voltage generating means, and the digital data reproducing section is configured to perform a reproducing section for resetting the recording voltage of the recording voltage generating means.
→“1” and “1”→“0” transitions are detected using a predetermined threshold value, and data transition detection means is provided for restoring the recorded data pulse train. Digital data recording/playback device.