JPH0438197B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to a video playback device that removes jitter caused by fluctuations in the time axis included when playing back a video signal recorded on a video disk or the like.

BACKGROUND ART When a reproduced video signal contains jitter, the quality of the screen deteriorates, and especially when a still image is reproduced, the hue of a color image deteriorates significantly. Therefore, it is necessary to remove jitter from the reproduced video signal.

In the prior art, in order to remove jitter, there is a device that corrects it using a variable delay line, and a device that corrects the reproduced signal using PCM.
A device such as a digital TVC (time base corrector) is used, which converts the signal into a pulse code modulated signal and uses memory to absorb the jitter.

Problems to be Solved by the Invention Such correction devices and digital TVC devices using variable delay lines are expensive and impractical.

An object of the present invention is to remove jitter in a reproduced video signal with a simple configuration, thereby eliminating hue unevenness, image horizontal shaking, etc. during still image reproduction, and obtaining high-quality images. It is an object of the present invention to provide a video playback device that does the following.

Means for Solving the Problems The present invention provides a still image reproducing device that reproduces a still image video signal including a synchronization signal, a luminance signal included between the synchronization signals, and a carrier color signal from a recording medium 1. a) a reading device 4 that reads a video signal of the still image recorded on the recording medium 1; (b) a first switch S1 to which the video signal from the reading device 4 is applied; Individual contact S11, (b2) another second individual contact S12, (b3) first or second individual contact S11,S
The first common contact S switches to 12 and becomes conductive.
a first changeover switch S1 having 13;
(c) a memory 11 that stores one field's worth of video signals from the first common contact S13; (d) a synchronization separation circuit 9 that separates and derives a synchronization signal from the video signal from the reading device 4; (e) Synthesizing means 1 for combining the video signal from the memory 11 with the synchronization signal from the synchronization separation circuit 9
3, 18, and (f) means 15, l12, l13 for applying the output of the combining means 13, 18 to the second individual contact S12.
(g) a second changeover switch S2; (g1) a third individual contact S21 to which the outputs of the combining means 13 and 18 are applied; and (g2) a fourth individual contact S21 to which the video signal from the reading device 4 is applied. Contact S22 and (g3) third or fourth individual contact S21,S
The second common contact S switches to 22 and becomes conductive.
a second changeover switch S2 having 23;
(h) means 7 for displaying in response to the output of the second common contact S23; (i) a transfer clock generator for generating a transfer clock synchronized with jitter in response to the synchronization signal from the synchronization separation circuit 9; (j) generating a synchronizing signal having a constant frequency to connect the first and second changeover switches S1, S2;
, thereby (j1) the first individual contact S1
1 to the first common contact S13 to store the video signal for the first field in the memory 11;
At this time, the fourth individual contact S22 is connected to the second common contact S
23, (j2) then the second individual contact S
12 to the first common contact S13 to sequentially store video signals for a predetermined number of fields in the memory 11. At this time, the third individual contact S21
Oscillating means 2 conducts to the second common contact S23
(k) Transfer clock generation circuit 1 transmits the video signal of memory 11 only when outputting the first field.
6. A still video reproducing apparatus characterized in that the still video reproducing apparatus outputs the still video using the transfer clock from 6 and then outputs using the transfer clock that is not synchronized with the jitter.

Effect According to the present invention, the reading device 4 reads the video signal of a still image recorded on the recording medium 1 such as a video disk, and the first The video signal for one field is stored in the memory 11 via the common contact S13 by a synchronizing signal having a constant frequency from the oscillation means 20 and 21, and at this time, the video signal from the reading device 4 is
Fourth individual contact S22 of second changeover switch S2
The image is displayed by the display means 7 via the second common contact S23, and from this memory 11, only the first field is output by a transfer clock synchronized with the jitter, and thereafter, the jitter is output. Since the output can be performed using a transfer clock that is not synchronized with the reading device 4
Even if the video signal from the camera contains jitter, it is possible to prevent the image quality from deteriorating.

Embodiment FIG. 1 is a block diagram of a video playback device 3 according to the present invention, FIG. 2 is a schematic diagram of a storage area 2 on a video disk 1, and FIG. FIG. The video playback device 3 basically includes a reading device 4 for reading recorded signals stored on the video disk 1, a means 5 for removing jitter from the video signal reproduced by the reading device 4, and a jitter removing device. It includes a display means 7 for displaying the video signal from the means 5 on a cathode ray tube or the like. The reading device 4 includes a magnetic disk 1 shown in the second figure and a reading head 8 disposed facing a storage area 2 of the video disk 1. The video disk 1 is read from a plurality of concentric tracks T ₁ -T _o It has a store area 2 consisting of:
In one track of the store area 2, signals corresponding to the images of the four fields V _1o , V _2o , V _3o , and V _4o shown in FIG. 3 are recorded, and the read head 8 follows the track switching pulse. The rotating magnetic disk 1 is controlled to move inward in the radial direction. During still image reproduction, the reading head 8 is fixed on the track T to be reproduced and repeatedly reads the recorded signals of the four fields V _1o to V _4o .

The video signal read by the read head 8 is sent to the sync separator circuit 9 and the clamp circuit 10 included in the first illustrated removing device 5 via lines l1, l.
2 respectively. Reading device 4
The video signal derived from includes a synchronization signal, a luminance signal included between the synchronization signals, and a carrier color signal,
The synchronization signal includes a horizontal synchronization signal H and a vertical synchronization signal V. The clamp circuit 10 clamps (fixes) the pedestal level of the video signal to a constant level, and
3 to the individual contact _S11 of the changeover switch _S1 . In the changeover switch _S1 , while the video signal of the first field _V1o is applied from the clamp circuit 10 to the individual contact _S11 by the control circuit 20, the individual contact _S11 and the common contact _S13 are brought into conduction, and the amplifier circuit While the video signal of the first field _V1o delayed by 1 to 3 fields from 15 is applied to the individual contact _S12 , the drive control is performed so that the individual contact _S12 and the common contact _S13 are electrically connected. The video signal from the common contact S ₁₃ of the changeover switch S ₁ is applied to an analog field memory 11 realized by a CCD (charge coupled device), BBD (bucket bridge device), or the like. The analog field memory 11 has a capacity that can sequentially store one field's worth of video-related signals, and responds to the transfer clock from the transfer clock generation circuit 16 and outputs the same in synchronization with the transfer clock. The stored contents are sequentially derived from line 14, and the video signal for one subsequent field is stored by the derived amount. line l
4, the transfer clock is removed in a low-pass filter 12, and the video signal derived from line l
5 to the synthesis circuit 13.

On the other hand, the video signal from the reading device 4 is given to the synchronization separation circuit 9 via line l1. Vertical synchronization signal V separated in synchronization separation circuit 9
is derived from line l6, and the horizontal synchronization signal H is derived from line l7. The vertical synchronization signal V and the horizontal synchronization signal H are provided to the synchronization control circuit 14 via branch lines l8 and l9, respectively.

The synchronization control circuit 14 includes an oscillation circuit 21 and a transfer clock generation circuit 16. Oscillation circuit 21
is a phaselock frequency synthesizer PLL
This is a circuit realized by, for example, oscillating pulses with a constant frequency. The vertical synchronization signal V from the synchronization separation circuit 9 is applied from the line l6 to the transfer clock generation circuit 16 and the oscillation circuit 20 via branch lines l8 and l9. The video signal of the first field V _1o stored from the analog field memory 11 is derived by the horizontal and vertical transfer clocks from the transfer clock generation circuit 16 and transferred to the synthesis circuit 13 .

For example, when a video signal containing jitter stored in the analog field memory 11 is sampled using a clock having a constant frequency, the amount of delay time τd in the analog field memory 11 is expressed by the first equation. will be the value.

τd=B/fck (1) Here, B represents the number of bits stored in the analog field memory, and fck represents the frequency of the transfer clock. From the relationship of the first equation, τd becomes constant, and therefore a video signal containing jitter is derived from the analog field memory 11.

Therefore, if a transfer clock synchronized with the jitter is used as the output transfer clock and the timing of output from the analog field memory 11 is controlled in synchronization with the jitter, the amount of delay time τd can be varied in synchronization with the jitter. jitter correction can be performed.

According to the present invention, when playing still images as described above, a transfer clock synchronized with jitter is used only when outputting the first field, and at other timings, the jitter-corrected video signal is input again. Therefore, by using a transfer clock that is not synchronized with jitter, it is possible to reproduce still images without jitter.

Vertical synchronization signal V and horizontal synchronization signal H from synchronization separation circuit 9 are applied to synchronization signal generation circuit 18 from lines l6 and l7. Synchronous signal generation circuit 1
8 provides various synchronization signals such as clamp, horizontal, vertical, and blanking gate pulses to the synthesis circuit 13 via line l10 in response to the vertical synchronization signal V and the horizontal synchronization signal H. In the synthesis circuit 13, the clamp, horizontal and vertical synchronization signals from the synchronization signal generation circuit 18 are synthesized with the video signal derived from the analog field memory 11 via the low-pass filter 12, and the video signal is generated on the line l11.
One individual contact of the switch S ₂ toggled through
S ₂₁ and also to the amplifier circuit 15 via line l12. The video signal amplified in the amplifier circuit 15 is applied to an individual contact _S12 of the changeover switch _S1 via a line l13. In addition, the individual contact S ₂₂ of the changeover switch S ₂ is
It is connected to the output side of the reading device 4 via line l14. This changeover switch S ₂ switches the individual contact S ₂₂ while the video signal for one field is applied to the individual contact S ₂₂ by the control circuit 20.
and the common contact S ₂₃ conduct, and the video signal of the first field V _1o delayed by 1 to 3 fields is transferred to the individual contact.
While given to S ₂₁ , individual contact S ₂₁ and common contact S ₂₃
The drive is controlled so that they are electrically connected. The video signal from the common contact _S23 of the changeover switch _S2 is applied to the video circuit 30 via line l14. A video signal from the video circuit 30 is displayed as an image on a cathode ray tube 32 by a drive circuit 31 constituting the display means 7.

During still image reproduction, the video signal of the first field _V1o shown in FIG _.
The data is stored in the analog field memory 11 via the analog field memory 11. Next, the video signal of the first field V _1o is transferred to the synthesis circuit 1 using a transfer clock synchronized with the jitter.
3 to create a jitter-corrected video signal and provide it to the video circuit 30.
The data is stored in the analog field memory 11 again via the . Next, the first field is jitter-corrected by a transfer clock that is not synchronized to the jitter.
V _1o video signal to analog field memory 11
The signal is then transferred to the synthesis circuit 13 and applied to the video circuit 30, and is stored in the analog field memory 11 via the amplifier circuit 15 again. Furthermore, the video signal of the first field _V1o delayed by three fields is also created in the same manner as described above, and the still reproduced image shown in FIG. 42 is obtained. In this way, when playing still images, a transfer clock synchronized with jitter is used for the first output, and a fixed transfer clock not synchronized with jitter and for re-output is used as a transfer clock for re-inputting a video signal delayed by one field. As a result, the video circuit 30 is provided with a jitter-free video signal. This makes it possible to eliminate hue unevenness during still image playback.
High quality images can be obtained.

The video playback method according to the present invention is not limited to magnetic disk recording and playback devices, but can be implemented in a wide range of technical fields such as magnetic tape recording and playback devices.

Effects According to the present invention, a still image video signal that may include jitter from the reading device 4 to the memory 11 is transferred to the memory 11 by a synchronization signal having a constant frequency from the oscillation means 20 and 21. When storing and outputting the video signal in the memory 11, only the first field is output using a transfer clock that is synchronized with jitter, and thereafter is output using a transfer clock that is not synchronized with jitter. As a result, it is possible to eliminate hue unevenness, horizontal shaking, etc. in still images at their peak, and to obtain high-quality images. In particular, only when outputting the first field from memory 11, a transfer clock synchronized with jitter is used, but after that, a transfer clock not synchronized with jitter is used for output.
The excellent effect of being able to reproduce still images virtually without jitter is achieved.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment according to the present invention, and FIG. 2 shows a storage area 2 of a video disc 1.
FIG. 3 is a diagram schematically showing pulses for explaining the transfer relationship between the transfer clock and the synchronization signal. 3...Video playback device, 9...Synchronization separation circuit, 1
1...Analog field memory, 13...Synthesizing circuit, 14...Synchronization control circuit, 16...Transfer clock generation circuit.

Claims (1)

[Scope of Claims] 1. A still image reproducing device that reproduces a still image video signal including a synchronization signal, a luminance signal included between the synchronization signals, and a carrier color signal from a recording medium 1, comprising: (a) a recording medium 1; (b) a first changeover switch S1; (b1) a first individual contact S11 to which the video signal from the reading device 4 is applied; (b2) Another second individual contact S12, (b3) First or second individual contact S11,S
The first common contact S switches to 12 and becomes conductive.
a first changeover switch S1 having 13;
(c) a memory 11 that stores one field's worth of video signals from the first common contact S13; (d) a synchronization separation circuit 9 that separates and derives a synchronization signal from the video signal from the reading device 4; (e) Synthesizing means 1 for combining the video signal from the memory 11 with the synchronization signal from the synchronization separation circuit 9
3, 18, and (f) means 15, l12, l13 for applying the output of the combining means 13, 18 to the second individual contact S12.
(g) a second changeover switch S2; (g1) a third individual contact S21 to which the outputs of the combining means 13 and 18 are applied; and (g2) a fourth individual contact S21 to which the video signal from the reading device 4 is applied. Contact S22 and (g3) third or fourth individual contact S21,S
The second common contact S switches to 22 and becomes conductive.
a second changeover switch S2 having 23;
(h) means 7 for displaying in response to the output of the second common contact S23; (i) a transfer clock generator for generating a transfer clock synchronized with jitter in response to the synchronization signal from the synchronization separation circuit 9; (j) generating a synchronizing signal having a constant frequency to connect the first and second changeover switches S1, S2;
, thereby (j1) the first individual contact S1
1 to the first common contact S13 to store the video signal for the first field in the memory 11;
At this time, the fourth individual contact S22 is connected to the second common contact S
23, (j2) then the second individual contact S
12 to the first common contact S13 to sequentially store video signals for a predetermined number of fields in the memory 11. At this time, the third individual contact S21
Oscillating means 2 conducts to the second common contact S23
(k) Transfer clock generation circuit 1 transmits the video signal of memory 11 only when outputting the first field.
6. A still video reproducing apparatus characterized in that the still video reproducing apparatus outputs the still video using the transfer clock from 6 and then outputs using the transfer clock that is not synchronized with the jitter.