JPH0439814B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a burst control circuit for a distributed processing type adaptive time division multiplex transmission transmitter.

In a traditional communication line network, a switching function for interconnecting lines and a multiplex transmission function for connecting each switching function existed clearly separately. In such a situation, mutual communication begins only after an exclusive communication line is established between the terminals desiring connection. That is, a line setting procedure (call processing) is always required prior to communication. If the information sent and received between terminals is telephone voice, fax, file transmission, etc., and the transmitted information is regularly and continuously transmitted for a considerable period of time, this call processing will not reduce the transmission efficiency. .

In recent years, the information processing field has become increasingly oriented toward distributed processing based on computer networks, and there has been a demand for efficient data transmission between computers or between terminals and computers, which occurs aperiodically. Conventionally, this problem has been dealt with by preparing a random access network exclusively for computer networks. However, society's expectations for data communications cannot be met by a proliferation of these exclusive and individual networks, and new transmission media that can organically and flexibly integrate and accommodate each network are being sought. It will be done. Since such transmission media are strongly required to have wide-area and general-purpose characteristics from an economic point of view, traditional circuit-switched signals, which dislike delay between transmission and reception, have poor delay correction and absorption functions. It is hoped that coexistence with

As a way to satisfy the above contradictory demands,
It is conceivable to treat signals suitable for circuit switching, such as voice, with priority, and to process non-periodically generated data using random access technology, making use of regularly occurring idle time.

An object of the present invention is to provide a distributed processing based control circuit that embodies such a new transmission medium.

This invention uses time slots arbitrarily selected by each station based on a frame having J time slots, and each participating station transmits its own burst signal for each arbitrary frame. a time slot monitor that detects whether a signal is being sent to each time slot of the received frame signal; monitors the time slot monitor output for each of the J time slots at its own desired sending cycle; and a transmission timing detector for detecting the presence or absence of the transmission timing of the distributed processing type burst control circuit, the distributed processing type burst control circuit is characterized in that it transmits its own transmission information at the unused transmission timing.

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1a shows a transmission signal time series of a conventionally used time division multiple access (TDMA) system. In the figure, the same transmission signal pattern is repeated in units of fixed frames indicated by T. That is, each station A and B periodically sends out its own burst signal at the same position in the frame.

FIG. 1b shows a burst of a multi-period TDMA signal. The signal of station A transmits its own burst every frame as in FIG. 1a, but stations B and C transmit their own burst every two frames. In other words, stations B and C transmit their own bursts at twice the frequency of station A. In general, it is possible to send out a self-burst every n frames, and it is possible to send out a self-burst to station A at a cycle n times as many. In this case, by observing only a few frames, it appears that the time slots are used at irregular intervals, but it is very easy to identify whether or not the time slots are used periodically.

Figure 2 shows the usage status of the six time slots in a frame simply averaged for each frame based on Figure 1b.
Since station A sends out every frame, slots 3 and 4 have an average value of 0.5 because stations B and C send out every two frames. Although it can be seen that the first time slot with an average of 1 is used every time in such a simple average, the 3rd and 4th time slots are used every time.
It is unclear how time slots are used. In order to solve this problem, a reference signal as shown in FIG. 3 is used.

The reference signal 7 in FIG. 3 has a waveform that becomes 1 during odd frames, and the reference signal 8 has a waveform that becomes 1 during even frames. After multiplying the reference signal 7 by the frame signal in Figure 1b, the fourth time slot (burst of station C)
When observing , it is immediately clear from FIG. 4a that it is unused in this cycle. Similarly, when the reference signal 8 is applied to the frame signal of FIG. 1b and the third time slot (burst of station B) is observed, it can be seen from FIG. 4b that it is unused in this period.

Also, when the usage status of each time slot is averaged only when the reference signal is 1 (1 when used, 0 when not used), if a burst with the same period as the reference signal appears in a certain time slot, The average output is always 1. By comparing the received signal with a reference signal equal to a certain transmission period as shown in Fig. 3, it can be determined whether each time slot is empty or in use in that transmission period. . When the previous average output takes a value between 0 and 1, it can be seen that it is at the start or end of a periodic signal, or at the time of receiving a random periodic signal.

FIG. 5 is a diagram showing actually necessary reference signal groups. In the figure, 40 is for every frame period, 41, 4
2 is the same as reference signals 7 and 8 in Fig. 3, 43, 4
4 and 45 are reference signals for 3 frame periods,
Each changes downward with a frame period T.

FIG. 6 shows an embodiment of the present invention comprising a time slot monitor 60 that detects the presence or absence of a signal on each time slot, and a transmission timing detector 61 that detects in what cycle each time slot is used. 1 is a diagram showing a block diagram of FIG.

A received signal is applied from an input terminal 100, and an input power detector 600 identifies the presence or absence of a signal on a time slot. This identification value is input to the shift register 601 one after another at a time slot period, and
After this operation is completed for a frame, the usage status of each time slot can be observed individually through the changeover switch of the time slot sweeper 602 depending on the contents of the shift register 601.

Sending timing detection for an arbitrary time slot is performed using a reference signal generator 6100 that generates a reference signal shown in FIG. 6, a switch 6101 that allows the output of the time slot sweeper 602 to pass only when the output is 1, and This is performed by a smoothing circuit (low-frequency filter) 6102 that averages the output of , and a discriminator 6103 that uses three values to identify whether the output of the circuit is zero, 1, or an intermediate value. The same blocks as block 610 are prepared only for the types of reference signals, and are composed of the same components except that the waveforms generated by the reference signal generators of each block are different. When each output of the output terminal 101 is 1, it indicates that the sending cycle is used periodically, and when it is 0, it indicates that it is not used.

In order to monitor all time slots at the same time, a send timing detector 61 may be provided for each time slot, or smoothers (low frequency filters) 6102 in the block 610 may be prepared for each time slot. It is necessary to time-divisionally switch in synchronization with the lot sweeper 602 and read out the discrimination values for the time slots one after another within the time that the smoother 6102 is connected to the discriminator 6103.

[Brief explanation of drawings]

FIG. 1a is a diagram illustrating a frame structure used in conventional time division multiplex transmission. FIG. 1b is a diagram illustrating a frame structure used in multi-period time division multiplex transmission that allows burst transmission every n frames. Second
The figure is a conceptual diagram obtained by simply averaging the usage status of each time slot in the frame of FIG. 1b. FIG. 3 is a diagram showing an example of a reference signal used to observe the usage status of time slots divided into odd and even frames. 4a and 4b are diagrams showing how the time slot usage status of the time division multiplexed transmission signal of FIG. 1b is observed divided into odd and even frames using the reference signal of FIG. 3; FIG. FIG. 5 is a diagram showing an example of a general reference signal. FIG. 6 is a diagram showing a block diagram of an embodiment of the present invention. In the figure, 60 is a time slot monitor, and 61 is a sending timing detector.

Claims (1)

[Claims] 1 Using time slots arbitrarily selected by each station based on a frame with J time slots,
a time slot monitor for detecting whether a signal is being sent to each time slot of a received frame signal in each participating station of a multi-period time division transmission system that sends its own burst signal for each arbitrary frame; and a transmission timing detector for observing the time slot monitor output at the own desired transmission cycle for each of the J time slots and detecting the presence or absence of an unused transmission timing; A distributed processing burst control circuit characterized by transmitting transmission information.