JPH0443319B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an alarm device for fire, gas leak, etc., and particularly to an alarm device in which signals from a plurality of sensors are processed by a microcomputer or the like.

``Prior Art'' Conventionally, in an alarm device using a microcomputer, a processing program generally enters an infinite loop of a monitoring routine after passing through an initialization routine when the power is turned on. Therefore, if a status signal is output to a routine that always passes through in the monitoring routine, this status signal will be output at least once within the maximum processing time that can be considered from the program. A watchdog timer is often used to check whether this status signal is outputted within a predetermined time by a circuit such as a mono-multivibrator. The watchdog timer detects runaway of the computer, returns the computer to its initial state by hardware reset or interrupt, and also indicates that an abnormality has occurred in the computer.

``Problems to be solved by the invention'' The watchdog timer is easy and effective in returning the computer to its original state when the computer goes out of control due to noise, etc., but it can be used to easily restore the original state when the computer goes out of control due to noise, etc. It is not an effective method for permanent damage. Alarm devices using computers have the disadvantage that if the computer malfunctions, all functions may stop or false alarms may be displayed.

"Means for Solving Problems" This invention is an alarm system using a computer, which detects a failure of the computer in the same manner as a watchdog timer, and uses a gate circuit to detect a signal input to the computer. It is also input to the logic circuit, and in the event of a computer failure, the minimum necessary functions are backed up by hardware, and false alarms are prevented from being displayed.

"Embodiment" An embodiment of the alarm device of the present invention will be described based on the drawings.

FIG. 1 is a system diagram showing an embodiment of the alarm device of the present invention.

The alarm device of this invention includes a central processing circuit MCP such as a microprocessor, a memory MR storing processing programs or data, an input port IP, an output port OP, and a fire detection system. An interface IF that allows signals from sensors such as gas detectors and gas detectors to be input to the computer, and a first gate circuit GT connected to this interface IF.
1, a second gate circuit GT2 connected to the output port OP, a logic circuit LG that outputs an alarm signal based on a direct signal from a sensor or a processed signal from a computer, and an environmental abnormality driven by the logic circuit LG. a display section INC that displays alarms such as;
It consists of a mono multivibrator MM that is triggered by a status signal output from the output port OP of the computer via the second gate circuit GT2.

When the power is turned on, the mono multivibrator MM is in a triggered state and its output is at a low level. This output signal causes the first gate circuit GT1 to be in a closed state and the second gate circuit GT2 to be in an open state. When the computer is normally executing the processing program, the status signal is always outputted once within a predetermined period of time. Since the mono multivibrator MM performs a retrigger operation and the output pulse width is set to be slightly longer than a predetermined time, the mono multivibrator MM is normally always triggered and its output maintains a low level state. In this state, the computer constantly receives signals from the sensor via the interface IF according to the processing program, and monitors for environmental abnormalities such as fire outbreaks and gas leaks. When it is determined that there is an environmental abnormality, an alarm signal is output from the output port OP and input to the logic circuit LG via the second gate circuit GT2. Logic circuit LG is display section
Drive INC and display the abnormality occurrence status along with the abnormality occurrence area.

If a failure occurs in the computer's memory MR or the like and the status signal stops, the mono multivibrator MM will no longer be triggered and its output will go to high level. The first gate circuit GT1 is in an open state, and the second gate circuit GT2 is in a closed state. Therefore, the signal from the interface IF passes through the first gate circuit GT1 and is input to the logic circuit LG. Since the signal from the output port OP is not input to the logic circuit LG because the second gate circuit GT2 is closed, and the status signal is also not input to the mono multivibrator MM, when the computer becomes abnormal,
The mono multivibrator MM remains in this state. To prevent a false alarm from being displayed even if a computer becomes abnormal and goes out of control. In this way, the mono-multivibrator MM constitutes the main part of the monitoring circuit that monitors the status signal output from the computer. Further, a part of the second gate circuit GT2 for the status signal is provided with a holding means in the watch circuit for holding an abnormality detection state in which the watch circuit has detected an abnormality in the computer. This holding means is not limited to this embodiment; for example, even when a status signal is input directly to the mono multivibrator MM, this holding means is a holding circuit that maintains this state when the output of the mono multivibrator MM becomes high level. It can also be configured by controlling the gate circuits GT1 and GT2 via the gate circuits GT1 and GT2.

In this abnormal state of the computer, the signal from the interface IF (sensor signal) is
The signal is input to the logic circuit LG through the gate circuit GT1, and the monitoring state is maintained. When an environmental abnormality signal is output from the sensor, the logic circuit LG outputs a corresponding alarm signal and drives the display unit INC to display an alarm.

When the signal from the interface IF is directly processed by the logic circuit LG, a minimum monitoring function is provided. When signals are processed by a computer, a rich amount of information can be easily processed, but if this is done using hardware, the configuration becomes extremely complicated and difficult. Further, the signal from the interface IF is directly processed only when the computer fails.

Next, interface IF, first and second gate circuits GT1, GT2, logic circuit LG, display section
A simple concrete example of INC is shown in FIG. 2 and will be explained using a fire alarm system as an example. Interface IF consists of transistors Q1, 2 and resistors R1~1, R2~1, R1
~2, R2~2, the first gate circuit GT1 is comprised of NAND circuits NAD1, 2,
The second gate circuit GT2 is composed of OR circuits OR1 to OR3, and the logic circuit LG is composed of NAND circuits NAD3,
Consisting of 4 parts, the display part INC is a light emitting diode.
It consists of LEDs 1 and 2. Terminal L1, C
A fire detector (not shown) is connected between the terminals L2 and C through a pair of lines, respectively.

The operation of the fire alarm system configured in this way will be explained. Normally, a small amount of monitoring current flows through a fire detector, and when it detects heat, smoke, etc. from a fire phenomenon and operates, it conducts between a pair of wires with low impedance. Therefore, under normal conditions, the voltage drop across the resistors R1-1, R1-2 is small and the transistors Q1, Q2 are in a cut-off state. The collector electrodes of the transistors Q1 and Q2 are pulled down and input as low level signals to the input port IP and the first gate circuit GT1. On the other hand, if the computer is running the processing program normally, the status signal will be OR circuited from the terminal n of the output port OP at least once within a predetermined time.
Output to OR3. The other input of the OR circuit OR3 is connected to the output of the mono multivibrator MM. If the output is at low level from the beginning, the status signal is the OR circuit OR3.
Through this, the mono multivibrator MM is always triggered and the output is maintained at a low level. This output Q is a NAND circuit NAD1, 2, an OR circuit OR1-3
is input to one of the respective inputs of the first and second inputs.
It acts as a control signal for the gate circuits GT1 and GT2. Therefore, since one of the inputs of the NAND circuit NAD1 and NAD2 is at low level, the interface
Its output is at high level regardless of the signal from the IF. Further, the signal from the output port OP is input to the logic circuit LG and the mono multivibrator MM via OR circuits OR1 to OR3. Terminals 1 and 2 of the output port OP are normally at a high level. Therefore, the inputs of the NAND circuits NAD3 and NAD4 are all at high level, and their outputs are at low level, so that the light emitting diodes LED1 and LED2 do not light up.

In this state, for example, if a fire detector connected between terminals L2 and C operates, terminals L2 and
C is conductive with low impedance, and resistors R1-2
A current flows through the resistor R2~2 due to this voltage drop.
A base current flows through the transistor Q2 through the transistor Q2, and the transistor Q2 becomes conductive. Input port IP connected to collector electrode of transistor Q2
Terminal 2 and the input of NAND circuit NAD2 become high level. When the computer identifies a high-level signal at terminal 2 of the input port IP, it determines that the fire detector of this line has been activated, and sets the terminal 2 of the output port OP to a low level. OR circuit OR
The output of 2 becomes low level, and the NAND circuit NAD
The output of 4 becomes high level and the issuing diode
Lights up LED2 to display an alarm. Further, although the computer is not shown, it can easily drive other output devices such as a CRT and a printer, and can also store this information and output it when necessary.

If the computer malfunctions due to a failure or the like and no status signal is output for a predetermined period of time, the output of the mono multivibrator MM becomes high level. All outputs of OR circuits OR1~3 are output ports
It will be in a high level state regardless of the output state of OP.
Therefore, once an abnormality occurs, even if the computer returns to normal and outputs a status signal, the mono multivibrator MM will not be triggered and will maintain this state. Further, even if the computer goes out of control and erroneous information is output to the output port OP, the light emitting diodes LED1 and LED2 will not be driven, thereby preventing false alarms.

In this state, the control signals of the NAND circuits NAD1 and NAD2 are at high level, so the signal from the interface IF is inverted and input to the logic circuit LG. For example, if a fire detector connected between terminals L1 and C is activated, transistor Q1 becomes conductive. The output of the NAND circuit NAD1 becomes a low level, and the output of the NAND circuit NAD3 becomes a high level, so that the issuing diode LED1 of the display section INC can be lit to display an alarm for the occurrence of a fire.

In addition, the same line (a pair of lines L1,
C or a pair of lines L2, C) for the sensor operation signal of the same district indicator light (issue diode LED
1 and 2) are made to light up. In other words, this logic circuit LG has the same type of display content, not only the fire area display.

In this way, when the computer is operating normally, monitoring and alarm display are performed by the computer's judgment processing, and when the computer becomes abnormal, false alarms are prevented and minimal monitoring is performed. , the alarm function has been backed up.

In addition, if the status signal from the output port OP is used to directly trigger the mono multivibrator MM without going through the second gate circuit GT2, all functions can be returned to the normal state at the same time as the computer returns to normal. . Also, the second gate circuit
It goes without saying that GT2 must be provided for output ports that act on all output devices.
It is also convenient to provide a display driven by the output of the mono-multivibrator MM to display abnormal conditions of the computer.

"Effects of the Invention" As explained above, the alarm device of the present invention is capable of maintaining minimal monitoring and alarm functions using a backup circuit in the event that the computer that constantly processes signals and issues various commands fails. Therefore, it is possible to provide a highly reliable alarm system, and in particular, the system can be made safe from permanent damage to computers, which is extremely useful in the disaster prevention industry.

[Brief explanation of drawings]

FIG. 1 is a system diagram showing one embodiment of the alarm device of the present invention, and FIG. 2 is a concrete block diagram of the main parts of FIG. 1. MCP...Central processing circuit, MR...Memory,
IP...Input port, OP...Output port, GT1,
GT2...First and second gate circuits, IF...Interface, LG...Logic circuit, INC...Display section, MM...Mono multivibrator, Q1, 2
...transistor, R1~1, R1~2, R2~
1, R2~2...Resistance, NAD1~4...NAND circuit, OR1~3...OR circuit, LED1,2...
Light emitting diode, L1, L2, C... terminal.

Claims (1)

[Claims] 1. A microcomputer comprising a central processing circuit, a memory, and an input/output port, and the microcomputer processes signals from sensors via an interface through program processing to determine whether the environment is normal or not. In an alarm device that determines an abnormality and drives a display unit to display an alarm when an abnormality is determined, the above-mentioned microcomputer always executes the alarm once within a predetermined period of time when the processing program is normally executed. is adapted to output a status signal, and detects an abnormality in the microcomputer when the status signal is not output even once within the predetermined time; and a signal from the sensor via the interface or the A theoretical circuit that drives the display unit based on an output signal from the microcomputer, and a logic circuit that is connected between the interface and the logic circuit, and connects the signal from the sensor to the logic circuit when the lookout circuit detects an abnormality. a first gate circuit connected between the output of the microcomputer and the logic circuit, and a second gate circuit that cuts off the connection between the output of the microcomputer and the logic circuit when the lookout circuit detects an abnormality; An alarm device comprising: 2. The logic circuit is a means for driving the same display for the same type of display content when driving the display based on the output signal of the microcomputer or the signal from the sensor via the interface. An alarm device according to claim 1, characterized in that the alarm device has: 3. The alarm device according to claim 1, wherein the lookout circuit includes a holding means for maintaining an abnormality detection state when an abnormality in the microcomputer is detected. 4. The alarm device according to claim 1, wherein the lookout circuit includes an indicator that indicates an abnormal state of the microcomputer.