JPH0447851B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a program control circuit, and in particular,
The present invention relates to a program control circuit as a so-called address sequencer used in a microprogram logic type processor system.

[Background technology and its problems]

In microprogram logic processor systems or microcomputers, a program control circuit (or program control circuit, address sequencer) is used to read out microinstructions stored in a microprogram memory in a predetermined order. . The simplest example of this program control circuit is a so-called address counter that sequentially increments addresses by 1, but it also has a function that controls the progress of the program according to the contents of read microinstructions, operation results, etc. Those equipped with the following are generally used.

By the way, when performing loop control of a program using such a program control circuit, a memory is required to temporarily store the number of loops and return addresses. Only one register for managing the number of loops and a stack memory of several words are provided. Therefore, although it is possible to program control a program with a single loop, it is not easy to control multiple loops with two or more loops, and the memory for storing the loop count and return address and the value of the loop count are required outside the program control circuit. , and means to reload the loop count and return address into the program control circuit. As a result, the hardware becomes complicated, the number of microprogram steps increases significantly, and the processing speed decreases.

[Purpose of the invention]

In view of the above-mentioned circumstances, the present invention provides a program control circuit which has an internal memory for storing a plurality of loop count data and a plurality of return addresses and can easily and quickly execute a multi-loop program. With the goal.

[Summary of the invention]

A program control circuit according to the present invention is a program control circuit for controlling the reading order of programs stored in a program memory.
An output port that outputs an address for accessing the program memory, a program counter that adds 1 to this output address and outputs it, a return address stack memory that stores the address from this program counter, and an input port. A loop count stack memory for storing the loop count from , a decrementer for subtracting 1 from the loop count stored in the loop count stack memory, and a zero detector for detecting whether the subtracted value by the decrementer has become zero. and an instruction interpretation means for interpreting the instructions of the read program to control the operation of each part; a stack pointer that points to a memory word of the loop count stack memory in response to a loop count stack manipulation command from the command interpreter; The present invention is characterized by comprising a multiplexer which selects either the address or the return address from the return address stack memory and outputs it from the output port.

〔Example〕

Hereinafter, a preferred embodiment of the program control circuit according to the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the internal configuration of a program control circuit 1 as an embodiment of the present invention, and FIG. 2 is a block diagram showing the main parts of a microcomputer configured using this program control circuit 1. It is a diagram. 1 and 2, a program control circuit 1 outputs a read address of the microprogram memory 2 in order to control the execution order of microinstructions stored in the microprogram memory 2. Inside the program control circuit 1, a multiplexer 11 selects and outputs one of, for example, four types (four systems) of address data. That is, multiplexer 11
, the direct address data from the input port 12 and the register 13 using the preceding microinstruction.
Address data stored and held in the multiplexer 11, return address data from the return address stack memory 14, and address data sequentially incremented by 1 from the microprogram counter 15 are supplied to the multiplexer 11. One of the four types of address data is selected in response to a selection control signal from the command interpretation block 16 and sent to the output port 18 via the buffer gate 17.

The microprogram counter 15 is a type of latch or register that captures and outputs the output data from the incrementer 21 in response to clock pulses from the clock input terminal 22, and the count address output from the microprogram counter 15 Data is supplied not only to the multiplexer 11 but also to the data input terminal of the stack memory 14 at the return address. Here, the clock pulses input to the clock input terminal 22 are sent to the micro program counter 15, return address stack memory 14, loop number stack memory 23,
Stack pointer 2 of each of these stack memories
5, 26, decrementer 27, and register 13
, and determines the clock cycle for reading the microinstruction. Incrementer 2
1 is the output data from the multiplexer 11.
is incremented and sent to the microprogram counter 15. The return address stack memory 14 is stored in the instruction interpretation block 16.
In response to a return address stack manipulation command from the microprogram counter 15, the count address data from the microprogram counter 15 is written to the memory word pointed to by the stack pointer 25, or the contents of the memory word pointed to by the stack pointer 25 are read. and sends it to multiplexer 11. The stack pointer 25 increments or decrements the pointer value in response to the return address stack manipulation commands, such as push and pop commands, thereby controlling the data to the stack memory 14 as last-in/first-out. In addition, the return address can also be read without changing the stack pointer.

Next, the loop count stack memory 23 has a plurality of words capable of storing a plurality of loop count data, and stacks the loop count data from the input port 12 in response to a loop count stack operation command from the instruction interpretation block 16. It writes to the memory word pointed to by the pointer 26, or sends the contents of the memory word pointed to by the stack pointer 26 to the decrementer 27, decrements it by 1, and writes it to the memory word again. The decrement operation at this time is performed in response to a decrement operation command from the instruction interpretation block. Further, the value decremented by the decrementer 27 is sent to a zero detector 28, and when the value becomes zero, a zero detection output is sent to the instruction interpretation block 16. It goes without saying that the loop number stack memory 23 is also capable of push and pop operations, which are write and read operations that involve incrementing and decrementing the value of the stack pointer 26.

By the way, the microinstruction read out from the microprogram memory 2 by the address data from the output port 18 of the program control circuit 1 is as follows.
One word consists of, for example, several tens of bits, and this one word contains a plurality of instructions. This read microinstruction is sent via the pipeline register 3 to each instruction execution unit, such as an ALU (logic unit) 4, a multiplier, a data memory, a control bus, etc., and some of it is sent to the program control circuit. 1 to the command input terminal 19a of the command interpretation block 16. Furthermore, data such as the number of loops in the microinstruction and the subroutine start address are taken into the program control circuit 1 through the input port 12. In addition, a condition code corresponding to the operation in the ALU 4 is sent to the condition code input terminal 19b of the instruction interpretation block 16 of the program control circuit 1.

In the above configuration, the operation of each part when executing a program including multiple loops will be explained.

FIG. 3 shows, as an example, the address of a program including a double loop and each stack memory 14, 2.
This shows the contents of 3, and the _first address is
The next address A ₁ +1 and the loop number N ₁ are stored in each stack memory 14, 23.
Each of them is pushed. This first loop processing extends to address A ₄ , and this address
Check the number of loops N ₁ at A ₄ , and if it has not reached N ₁ , return to address A ₁ +1,
When reaching _N1 times, proceed to the next address A ₄ +1. Between these addresses A ₁ + 1 and A ₄ ,
The second loop processing is included, and the address A ₂
The second loop processing is started at the next address
A ₂ + 1 and the number of loops N ₂ are each stack memory 1
4 and 23 respectively. Then, the number of loops N ₂ is checked at address A ₃ ,
When the number of loops is less than N ₂ , address A ₂ + 1
When N ₂ is reached, the process returns to address A ₃ +1. In addition, each stack memory 14, 2 in FIG.
The arrows shown in 3 indicate the positions indicated by the stack pointers 25 and 26.

When executing such a double-loop program, the program starts at the start address of the first loop.
_A1 is reached, and a loop start operation is performed by this _A1 line microinstruction. That is, by supplying the loop start instruction to the instruction interpretation block 16 and interpreting it, the multiplexer 11 outputs the program counter 1 as shown by the thick line in FIG.
The output of the address A ₁ +1 from the return address stack memory 14 is selected, and the address data A ₁ +1 is written to the word in the return address stack memory 14 designated by the stack pointer 25.
This is a stack push operation in which the stack pointer is incremented, for example, at the same time as the memory write operation. Similarly, regarding the number of loops, the loop number data N ₁ from the input port 12 is stored in the word in the loop number stack memory 23 specified by the stack pointer 26.
A push operation is performed on the stack, such as writing .

Next, the program selects the second loop start address
When A ₂ is reached, as shown by the thick line in FIG.
A ₂ +1 is pushed and the loop number N ₂ from the input port 12 is stored in the loop number stack memory 23.
is pushed, and the multiplexer 11
is the address A ₂ + from program counter 15
Select 1 and output. At this time, each stack pointer 25, 26 specifies a word in each stack memory 14, 23 whose address is incremented, for example, by 1 from the state shown in FIG.

Next, when the end address _A3 of the second loop is reached, a loop end command, for example, is sent to the command interpretation block 16, and the loop number data N from the loop number stack memory 23 is sent, as shown by the thick line in FIG. ₂ is popped and decrementer 27
sent to. The decrementer 27 uses this data
N ₂ is subtracted by 1 and sent to the zero detector 28, and the zero detector 28 determines whether N ₂ -1 is zero. The detection output from the zero detector 28 is sent to the command interpretation block 16, and when it is non-zero, the operation is controlled as shown in FIG. 6, and when it is zero, the operation is controlled as shown in FIG. 7.

That is, if the subtraction data N ₂ -1 is non-zero, the subtraction data is pushed to the loop number stack memory 23 as second loop number data (N ₂ =N ₂ -1), as shown in FIG. At the same time, the stack memory 1 is
The program progress is controlled so that the return address A ₂ +1 from 4 is selected and output, and the program returns to address A ₂ +1 in the next step. Therefore,
Each time the second loop processing program is executed, the loop count data _N2 is subtracted by 1 and written into the same word in the loop count stack memory 23.

Then, when the second loop processing is executed N ₂ (initial value) times, that is, when the second loop processing is executed N 2 (initial value) times,
When N ₂ -1 becomes zero, zero detector 2
The instruction interpretation block 16 responds to the detection output from 8.
As shown in FIG. 7, the multiplexer 11 selects and outputs the address A ₃ +1 from the microprogram counter 15, and in the next step, the next address A ₃ +1 on the program memory is selected and output.
control to proceed. In FIG. 7, the flow of data after the loop count stack memory 23 is popped during execution of the instruction at address _A3 is indicated by a thick line, and the flow of pop control signals to the stack memory 23 and stack pointer 26 is indicated by a thick line. is omitted. In this case, the stack memory 23 remains in the pop operation, but the push operation of the subtracted data of the decrementer 27 is not performed, and the stack pointer 26 points to the word stored for the first loop number _N1 .

6 and 7, the flow of control signals to the return address stack memory 14 and the stack pointer 25 is also omitted, but in the case of FIG. Either the stack memory 14 is only read without changing the value of the stack pointer 25, and in the case of FIG. 7, only the value of the stack pointer 25 is decremented, for example.
Alternatively, a pop operation may be performed since the multiplexer 11 selects the counter 15.

i.e. the end address of such a loop
To explain the stack operation in A ₃ ,
Regarding the loop number stack memory 23, first, data is always popped into the decrementer 27, and the subtracted data is pushed only when the data is non-zero, depending on the detection output from the zero detector 28 after decrementing. Therefore, the subtracted data becomes zero.
N At the end of _{the second} loop, only the above pop is performed, and the stack pointer 26 is set to the first loop number.
N indicates the word in which ₁ data is stored. Also, return address stack memory 1
4, when the subtraction data is non-zero, the value of the stack pointer 25 does not change, and the address data A ₂ +1 of the stack memory 14 is read out, and when the subtraction data is zero, the value of the stack pointer 25 does not change. is, for example, decremented to indicate the word in which address data A ₁ +1 is stored.

Next, when the end address _A4 of the first loop is reached, the number of loops _N1 is popped from the stack memory 23 to the decrementer ₂₇ , and is subtracted by 1, in the same way as when the address A3 is reached. 28, it is determined whether or not it is zero, and if it is non-zero, the subtracted data is pushed to the stack memory 23, and the multiplexer 11 selects the return address A ₁ +1 from the stack memory 14, and in the next step, the address A ₁ +1 is pushed. Return to
Also, when the first loop is executed _N1 times and the above subtracted data becomes zero, the multiplexer 1
1 is address A from program counter 15 ₄
Select +1 and in the next step address A ₄ +1
Proceed to.

As above, for the first loop
The second loop is executed N ₁ times, and the second loop is executed N ₂ times for each iteration of the first loop (total N ₁ ×N ₂ times).

As a microprogram to perform such double loop processing, each of the above addresses
It is only necessary to provide a loop start instruction in each step of A ₁ and A ₂ with the respective loop numbers N ₁ and N ₂ , and provide a loop end instruction in each step of each of the above addresses A ₃ and A ₄ . For loop operation control including address memory write, read operations, and decrement operations,
Since the program is executed mainly by the instruction interpretation block 16 within the program control circuit 1 in response to the loop start command and the loop end command, the burden on the microprogram is greatly reduced. Therefore, the number of steps in the microprogram and the number of words in the microprogram memory can be reduced, and the number of bits for addressing can also be reduced. Moreover, the memory for storing the loop count and return address is provided inside the program control circuit 1, eliminating the need for external hardware and allowing each operation to start and end a loop in one step. , processing time can be significantly reduced.

It should be noted that the present invention is not limited to the above-mentioned embodiments, and for example, processing of multiple loops of three or more can be executed in a short time with a simple program. Furthermore, the usage example of the program control circuit (program controller) is not limited to that shown in FIG.

〔Effect of the invention〕

According to the program control circuit according to the present invention, in the case of a program including multiple loops, the number of loops can be stored in the loop number stack memory within the program control circuit. There is no need to use this, the program becomes simpler, the number of steps is greatly reduced, the amount of program memory is also small, the number of bits in the address to access it can be reduced, and the processing time can be shortened. .

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing an embodiment of the program control circuit according to the present invention, FIG. 2 is a block diagram showing an example of use of the program control circuit of FIG.
FIG. 3 is a diagram showing addresses and stack memory contents of a program showing a double loop, and FIGS. 4 to 7 are diagrams for explaining the operation of the circuit of FIG. 1. 1...Program control circuit, 2...Micro program memory, 11...Multiplexer, 12
... Input port, 14 ... Return address stack memory, 15 ... Microprogram counter, 16 ... Instruction interpretation block, 18 ... Output port, 21 ... Incrementer, 23 ... Loop number stack memory, 25, 26 ...Stack pointer, 27...Decrementer, 28...Zero detector.

Claims (1)

[Scope of Claims] 1. In a program control circuit for controlling the read order of programs stored in a program memory, an output port that outputs an address for accessing the program memory; and an output port that adds 1 to this output address. a program counter for outputting the program counter; a return address stack memory for storing addresses from this program counter; a loop number stack memory for storing the number of loops from the input port; and a return address stack memory for storing the number of loops from the input port; A decrementer that subtracts 1 from the number of times, a zero detector that detects whether the subtracted value by the decrementer becomes zero, and an instruction interpreter that interprets the instructions of the read program and controls the operation of each part. , a stack pointer that points to a memory word in the return address stack memory in response to a return address stack manipulation command from the command interpretation means; A stack pointer indicating a memory word in the stack memory, and a switch controlled by the instruction interpreting means to select at least one of the address from the program counter and the return address from the stack memory to output the output port from the stack memory. A program control circuit comprising: a multiplexer for outputting output.