JPH0451079B2 - - Google Patents
Info
- Publication number
- JPH0451079B2 JPH0451079B2 JP4807984A JP4807984A JPH0451079B2 JP H0451079 B2 JPH0451079 B2 JP H0451079B2 JP 4807984 A JP4807984 A JP 4807984A JP 4807984 A JP4807984 A JP 4807984A JP H0451079 B2 JPH0451079 B2 JP H0451079B2
- Authority
- JP
- Japan
- Prior art keywords
- conductive
- metal foil
- conductive pattern
- wiring board
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
〔産業上の利用分野〕
本発明は、基板上に複数層の導電パターンを設
けてなる多層配線基板の製造方法に関するもので
ある。
〔背景技術とその問題点〕
各種電子機器の小型化や薄型化に伴つて所定の
電気回路を構成する配線基板を収納するスペース
が非常に限られたものとなつてしまつており、こ
の限られた収納スペース内に所望する通りの電気
回路を構成する配線基板を取付け得るようにする
ため、導電パターンを複数層積層して設け回路配
線の高密度化を図つた所謂多層配線基板が用いら
れている。この多層配線基板によれば、高密度実
装回路が得られるばかりでなく、部品間を接続す
る導体の長さを短縮して信号伝送速度の向上を図
ることができる等実用上のメリツトは大きい。
ところでこの種の多層配線基板は、片面あるい
は両面に所定の導電パターンを形成した複数の絶
縁基板を各層間の接着を行なうとともに上記導電
パターンの保護及び層間絶縁の役目を果すプリプ
レグを介して積層し、プレスにより多層化積層成
形して製造されており、上記各層の導電パターン
間において接続導通する必要のある箇所にはスル
ーホールを穿設し、このスルーホール内に所謂ス
ルーホールメツキを施して導通を図るのが一般的
である。
しかしながら、上述の製造方法においては、特
にスルーホールメツキを施すためのメツキ工程が
複雑で生産性を低下しているばかりか、大がかり
なメツキ設備や排水処理施設が必要となつて製造
コストを増大してしまつている。また、上述のス
ルーホールメツキにより各層の導電パターン間の
導通を図る場合には、所謂スミヤの発生により上
記導通が妨げられる虞れがあり、上記多層配線基
板の信頼性を著しく低下してしまつている。
さらに従来、セラミツク基板の如き絶縁基板上
にAg−Pdペーストのような導体ペーストを印刷
することにより形成される厚膜パターンとガラス
絶縁層とを交互に積層して多層配線化を図つたガ
ラス焼成積層板が提案されているが、このガラス
焼成積層板にあつては、加工性が悪くわずかな衝
撃で簡単に破損してしまうという欠点を有し、ま
た上記厚膜パターンの抵抗値が大きいので信号処
理スピードが低下してしまい大型の基板を製作す
るには不利である。
あるいは、基体上に銅箔等により形成される導
体パターンを印刷形成有機絶縁体あるいは写真形
成有機絶縁体を介して接続部が部分的に重なるよ
うに積層形成し、各導電パターン間を上記接続部
において上記有機絶縁体に設けられる接続用窓部
を介してCuペーストやGd合金ペースト、半田ペ
ースト等の導電ペーストにより接続導通を図り多
層配線基板を製造するという方法が提案されてい
るが、このような製造方法においては上記導電ペ
ーストの印刷に高精度が要求され作業が煩雑なも
のとなるとともに製造歩留りも低下してしまつて
いる。
〔発明の目的〕
そこで本発明は、上述の従来の実情に鑑みて提
案されたものであつて、煩雑なメツキ工程や印刷
工程等が不要で工程の簡略化を図ることが可能な
多層配線基板の製造方法を提供することを目的と
し、さらに大がかりな設備が不要で製造コストの
低減を図ることが可能な多層配線基板の製造方法
を提供することを目的とする。
さらにまた本発明は、各導電パターン間の導通
が確実に図られ信頼性の高い多層配線基板を得る
ことが可能な製造方法を提供することを目的とす
る。
〔発明の概要〕
本発明は、上述の如き目的を達成するために、
あるかじめ第1の導電パターンが形成された基体
上に接続用窓部を有する絶縁層を形成し、該絶縁
層上に少なくとも一部分に導電性皮膜を被着した
導電金属箔を接合した後、上記導電金属箔に対し
てエツチングを施し第2の導電パターンを形成す
ることを特徴とするものである。
〔実施例〕
以下、本発明の具体的な実施例について図面を
参照しながら説明する。
第1図ないし第6図は本発明を適用した多層配
線基板の製造方法をその工程順序に従つて示すも
のである。
すなわち、本発明においては、第1図に示すよ
うに、先ずガラスエポキシ樹脂積層板、紙フエノ
ール積層板、ポリテトラフルオルエチレン板等の
絶縁性材料やアルミニウム、鉄等の金属材料によ
り形成される基体1を準備し、この基体1上に銅
箔の如き導電金属箔を接合した後、該導電金属箔
に対してエツチングを施し第1の導電パターン2
を形成する。なお、上記基体1としてアルミニウ
ム板や鉄板等の金属板を用いる場合には、上記基
体1上にあらかじめエポキシ系接着剤を40μ程度
の厚さに塗布しておき、この接着剤層上に上記第
1の導電パターン2を形成する。
次いで、第2図に示すように上記基体1上に上
記第1の導電パターン2を被覆するように絶縁層
3を積層形成する。
上記絶縁層3は上記第1の導電パターン2と後
述の第2の導電パターンの電気的絶縁を図るとと
もにこの第2の導電パターンを接合するための接
着剤として作用するものであつて、ホツトメルト
型ポリアミド樹脂やエポキシ・アクリル系熱硬化
性樹脂、アクリルゴム添加エポキシ・アクリレー
ト系紫外線硬化型樹脂等により形成して接着性を
付与しておく必要がある。また、上記絶縁層3に
おいて上記第1の導電パターン2と後述の第2の
導電パターンとの間で接続導通を図る必要がある
部分には接続用窓部4を設けておく必要がある
が、この接続用窓部4を形成するためには上記絶
縁層3をスクリーン印刷法やドライフイルムタイ
プ写真法、液状フオトレジスト写真法等の手法を
用いて被着形成すればよい。
したがつて、上記絶縁層3の形成方法として
は、例えばエポキシ・アクリル系接着剤を40μの
厚さに印刷形成し80℃で2分間あるいは100℃で
1分間乾燥する方法や、エポキシ・アクリレート
樹脂を先ず30μの厚さに印刷形成し紫外線照射に
より硬化した後エポキシ・アクリル系接着剤10μ
を印刷し乾燥する方法、エポキシ・アクリレート
樹脂にアクリルゴム30重量%添加した紫外線・熱
硬化併用フオトレジストにより写真形成する方法
等が挙げられる。
一方、上記基体1とは別に、第3図に示すよう
に導電金属箔5を用意し、この導電金属箔5の一
方の面に低融点半田あるいは導電性接着剤を全面
に亘つて塗布し導電性皮膜6を被着形成してお
く。
上記導電金属箔5の材質としては導電金属材料
であれば如何なるものであつてもよいが、通常は
厚さ18〜35μ程度の銅箔が用いられる。
上記導電性皮膜6を形成するために使用される
低融点半田としては一般の半田と比べて融点温度
の低い合金材料が用いられ、例えば次表に示す各
種合金や商品名Uアロイ(大坂アサヒメタル社
製)等が挙げられる。
[Industrial Application Field] The present invention relates to a method for manufacturing a multilayer wiring board in which a plurality of layers of conductive patterns are provided on a board. [Background technology and its problems] With the miniaturization and thinning of various electronic devices, the space for storing wiring boards constituting a predetermined electric circuit has become extremely limited. In order to be able to mount a wiring board constituting a desired electrical circuit within a storage space, a so-called multilayer wiring board is used, which has multiple layers of conductive patterns laminated to increase the density of circuit wiring. There is. This multilayer wiring board not only provides high-density packaging circuits, but also has great practical advantages, such as being able to shorten the length of conductors connecting components and improve signal transmission speed. By the way, this type of multilayer wiring board is made by laminating a plurality of insulating substrates each having a predetermined conductive pattern formed on one or both sides through a prepreg that performs adhesion between each layer and also serves to protect the conductive pattern and provide interlayer insulation. It is manufactured by multi-layer lamination molding by pressing, and through holes are drilled at the locations where connection and continuity are required between the conductive patterns of each layer, and so-called through-hole plating is applied inside these through holes to establish continuity. It is common to aim for However, in the above manufacturing method, the plating process for through-hole plating is particularly complicated, which not only reduces productivity, but also requires large-scale plating equipment and wastewater treatment facilities, increasing manufacturing costs. It is closed. Furthermore, when attempting to establish electrical continuity between the conductive patterns in each layer by using the above-mentioned through-hole plating, there is a risk that the electrical continuity will be hindered by the occurrence of so-called smear, which will significantly reduce the reliability of the multilayer wiring board. There is. Furthermore, in the past, thick film patterns formed by printing a conductive paste such as Ag-Pd paste on an insulating substrate such as a ceramic substrate and glass insulating layers were alternately laminated to create multilayer wiring. A laminated plate has been proposed, but this fired glass laminated plate has the disadvantage of poor workability and is easily damaged by the slightest impact, and the above-mentioned thick film pattern has a high resistance value. The signal processing speed decreases, which is disadvantageous for manufacturing large substrates. Alternatively, conductive patterns formed of copper foil or the like are laminated on the substrate via a printed organic insulator or a photo-formed organic insulator so that the connecting portions partially overlap, and the connecting portions are connected between each conductive pattern. proposed a method of manufacturing a multilayer wiring board by using a conductive paste such as Cu paste, Gd alloy paste, or solder paste through a connection window provided in the organic insulator. In this manufacturing method, high precision is required for printing the conductive paste, making the work complicated and reducing the manufacturing yield. [Object of the Invention] Therefore, the present invention has been proposed in view of the above-mentioned conventional situation, and provides a multilayer wiring board that can simplify the process by eliminating the need for complicated plating processes, printing processes, etc. Another object of the present invention is to provide a method for manufacturing a multilayer wiring board that does not require large-scale equipment and can reduce manufacturing costs. A further object of the present invention is to provide a manufacturing method that can ensure electrical continuity between conductive patterns and obtain a highly reliable multilayer wiring board. [Summary of the invention] In order to achieve the above-mentioned objects, the present invention has the following features:
After forming an insulating layer having a connection window on a substrate on which a first conductive pattern has been formed in advance, and bonding a conductive metal foil having at least a portion covered with a conductive film on the insulating layer, This method is characterized in that the conductive metal foil is etched to form a second conductive pattern. [Example] Hereinafter, specific examples of the present invention will be described with reference to the drawings. 1 to 6 show a method for manufacturing a multilayer wiring board to which the present invention is applied, according to the process order. That is, in the present invention, as shown in FIG. 1, first, a laminate is formed of an insulating material such as a glass epoxy resin laminate, a paper phenol laminate, or a polytetrafluoroethylene board, or a metal material such as aluminum or iron. After preparing a base 1 and bonding a conductive metal foil such as copper foil onto the base 1, the conductive metal foil is etched to form a first conductive pattern 2.
form. In addition, when using a metal plate such as an aluminum plate or a steel plate as the base 1, an epoxy adhesive is applied to the base 1 in advance to a thickness of about 40 μm, and the above adhesive layer is coated on the base 1. 1 conductive pattern 2 is formed. Next, as shown in FIG. 2, an insulating layer 3 is laminated on the base 1 so as to cover the first conductive pattern 2. The insulating layer 3 serves to electrically insulate the first conductive pattern 2 and a second conductive pattern (described later) and also acts as an adhesive for bonding the second conductive pattern. It is necessary to provide adhesive properties by forming the adhesive using a polyamide resin, an epoxy/acrylic thermosetting resin, an epoxy/acrylate ultraviolet curable resin containing acrylic rubber, or the like. Further, it is necessary to provide a connection window 4 in a portion of the insulating layer 3 where it is necessary to establish a connection between the first conductive pattern 2 and a second conductive pattern described below. In order to form the connection window 4, the insulating layer 3 may be deposited using a screen printing method, a dry film type photography method, a liquid photoresist photography method, or the like. Therefore, the insulating layer 3 can be formed by, for example, printing epoxy/acrylic adhesive to a thickness of 40μ and drying it at 80°C for 2 minutes or 100°C for 1 minute, or using epoxy/acrylate resin. First, print it to a thickness of 30μ, cure it by UV irradiation, and then apply 10μ of epoxy/acrylic adhesive.
Examples include a method of printing and drying, and a method of photoforming using a combination of ultraviolet and heat curing photoresist made by adding 30% by weight of acrylic rubber to epoxy acrylate resin. On the other hand, apart from the base 1, a conductive metal foil 5 is prepared as shown in FIG. 3, and one surface of the conductive metal foil 5 is coated with low melting point solder or conductive adhesive over the entire surface to make it conductive. A protective film 6 is formed in advance. The conductive metal foil 5 may be made of any conductive metal material, but copper foil having a thickness of about 18 to 35 microns is usually used. The low melting point solder used to form the conductive film 6 is an alloy material whose melting point temperature is lower than that of general solder, such as the various alloys shown in the table below or the product name U Alloy (Osaka Asahi Metal company), etc.
上述の実施例の説明からも明らかなように、本
発明によれば、各層の導電パターンを接合すると
同時に導電性皮膜によりこれら導電パターン間の
接続が図られるので製造工程が簡略化し生産性が
向上するとともに、メツキ工程が不要となつてい
るので大がかりな設備が不要となり製造コストの
低減を図ることが可能となつている。
また、本発明によれば、各導電パターン間の導
通が導電性皮膜の溶融あるいは接着によつて確実
に図られ、得られる多層配線基板の信頼性は高い
ものとなつている。
As is clear from the description of the embodiments described above, according to the present invention, the conductive patterns of each layer are bonded and at the same time the conductive patterns are connected by the conductive film, which simplifies the manufacturing process and improves productivity. At the same time, since the plating process is no longer necessary, large-scale equipment is not required, making it possible to reduce manufacturing costs. Further, according to the present invention, conduction between the respective conductive patterns is reliably achieved by melting or adhering the conductive film, and the reliability of the obtained multilayer wiring board is high.
第1図ないし第6図は本発明を適用した多層配
線基板の製造方法の一実施例をその工程順序に従
つて示す概略的な断面図であつて、第1図は第1
の導電パターン形成工程、第2図は絶縁層形成工
程、第3図は導電性皮膜形成工程、第4図は導電
金属箔接合工程、第5図は導電金属箔エツチング
工程、第6図は導電性皮膜エツチング工程、をそ
れぞれ示す。第7図ないし第9図は本発明の他の
実施例における製造工程の一部を示す概略的な断
面図であり、第7図は導電性皮膜形成工程、第8
図は導電金属箔接合工程、第9図は導電金属箔エ
ツチング工程、をそれぞれ示す。第10図ないし
第16図は本発明のさらに他の実施例をその工程
順序に従つて示す概略的な断面図であり、第10
図は第1の導電パターン形成工程、第11図は絶
縁層形成工程、第12図は導電性皮膜及びエポキ
シ系接着剤被着工程、第13図は導電金属箔の仮
熱圧着工程、第14図は導電金属箔エツチング工
程、第15図は熱圧着工程、第16図は導電性皮
膜エツチング工程、をそれぞれ示す。
1…基体、2…第1の導電パターン、3…絶縁
層、4…接続用窓部、5…導電金属箔、6…導電
性皮膜、7…第2の導電パターン。
1 to 6 are schematic cross-sectional views showing one embodiment of a method for manufacturing a multilayer wiring board to which the present invention is applied according to the process order, and FIG.
Figure 2 shows the insulating layer forming process, Figure 3 shows the conductive film forming process, Figure 4 shows the conductive metal foil bonding process, Figure 5 shows the conductive metal foil etching process, and Figure 6 shows the conductive pattern forming process. The process of etching the film is shown below. 7 to 9 are schematic cross-sectional views showing a part of the manufacturing process in another embodiment of the present invention, in which FIG.
The figure shows the conductive metal foil bonding process, and FIG. 9 shows the conductive metal foil etching process. 10 to 16 are schematic cross-sectional views showing still other embodiments of the present invention according to the process order, and FIG.
The figure shows the first conductive pattern forming step, FIG. 11 shows the insulating layer forming step, FIG. 12 shows the conductive film and epoxy adhesive adhesion step, FIG. 13 shows the conductive metal foil preliminary thermocompression bonding step, and The figure shows the conductive metal foil etching process, FIG. 15 shows the thermocompression bonding process, and FIG. 16 shows the conductive film etching process. DESCRIPTION OF SYMBOLS 1... Base body, 2... First conductive pattern, 3... Insulating layer, 4... Connection window, 5... Conductive metal foil, 6... Conductive film, 7... Second conductive pattern.
Claims (1)
基体上に接続用窓部を有する絶縁層を形成し、該
絶縁層上に少なくとも一部分に導電性皮膜を被着
した導電金属箔を接合した後、上記導電金属箔に
対してエツチングを施し第2の導電パターンを形
成することを特徴とする多層配線基板の製造方
法。1. After forming an insulating layer having a connection window on a substrate on which a first conductive pattern has been formed in advance, and bonding a conductive metal foil with a conductive film coated on at least a portion of the insulating layer, the above-mentioned A method for manufacturing a multilayer wiring board, comprising etching a conductive metal foil to form a second conductive pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4807984A JPS60193398A (en) | 1984-03-15 | 1984-03-15 | Method of producing multilayer circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4807984A JPS60193398A (en) | 1984-03-15 | 1984-03-15 | Method of producing multilayer circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60193398A JPS60193398A (en) | 1985-10-01 |
| JPH0451079B2 true JPH0451079B2 (en) | 1992-08-18 |
Family
ID=12793325
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4807984A Granted JPS60193398A (en) | 1984-03-15 | 1984-03-15 | Method of producing multilayer circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60193398A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0367446A (en) * | 1989-08-05 | 1991-03-22 | Matsushita Electric Ind Co Ltd | Flat type image display device and manufacture thereof |
-
1984
- 1984-03-15 JP JP4807984A patent/JPS60193398A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60193398A (en) | 1985-10-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |