JPH0452680B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a stereo reproduction device, and particularly to a stereo reproduction device that outputs signal components of both channels through three terminals and increases the output amplitude as much as possible with respect to a specified power supply voltage. The present invention relates to a device that can be taken out and is suitable for use in, for example, stereo headphones.

[Technical background of the invention and its problems]

As is well known, the conventional stereo reproduction means shown in Figure 1 has been used to amplify and supply both stereo channel signal components to a device having a three-terminal input, such as stereo headphones. There is. That is, among the three input terminals 11 to 13, the input terminal 12 connected to the ground terminal is used in common, and a stereo signal, for example, is connected between the input terminal 12 and the other two input terminals 11 and 13. The L and R channel signal components are provided respectively. Then, the signal components of the L and R channels are amplified by amplifier circuits 14 and 15, respectively,
Among the three output terminals 16 to 18, the output terminal 17 connected to the ground terminal is used as a common terminal, and the signal components of the L and R channels are transmitted between the output terminal 17 and the other two output terminals 16 and 18. are taken out and supplied to a stereo headphone or the like (not shown).

By the way, in such conventional stereo reproduction means, for example, if the absolute value of the power supply voltage of the amplifier circuits 14 and 15 is _Vcc , the output voltages of the signal components of the L and R channels are as shown in FIG. With reference to the ground potential (0 potential), the voltage can only reach a peak of ±V _cc (actually, since there is a reactive component, it is slightly closer to 0 than ±V _cc ). In other words,
The undistorted and maximum range of the output voltage of the signal components of the L and R channels is as shown in FIG. 3, regardless of whether the signal components of the L and R channels are in phase or out of phase with each other. Therefore, in order to increase the output voltage of the signal components of the L and R channels, it is necessary to increase the power supply voltage. On the other hand, since many of the devices using such headphones are portable types that use batteries, there is a problem that the power supply voltage cannot be increased, and as a result, a large output cannot be obtained.

Furthermore, as shown in FIG. 4, a configuration in which an amplifier circuit 19 is interposed between the input terminal 12 and the output terminal 17 can be considered; Since the potential is the same as the ground potential, it is still impossible to obtain a large output.

Furthermore, as shown in FIGS. 5 to 7, R
and L channel signal components are mixed at a predetermined ratio determined by each resistor, and the mixed signals are amplified by amplifier circuits 20 and 21, respectively, and output from between output terminal 17 and output terminals 16 and 18. By doing so, when each output signal obtained from the output terminal 17 and the output terminals 16 and 18 is reproduced by two speakers (not shown), the sounds will be output with a wider interval than the actual interval between the two speakers. There are some that have a so-called stereo wide effect, which makes it sound like it is being emitted. Also, in the stereo reproduction means having such a configuration, since the output terminal 17 is common, the problem is similar to that described above.

Therefore, in order to increase the output voltage amplitude of the signal components of the L and R channels with a low power supply voltage, a BTL as shown in FIG.
(balanced transformerless) circuits are being considered. That is, this means that the signal component of the L channel supplied between the input terminals 11 and 12 is sent to the amplifier circuit 2.
2 from the output terminal 23, and
The signal component of the R channel supplied between the input terminals 13 and 12 is outputted from the output terminal 28 via the amplification circuit 27. In addition, the phase inversion circuit 29 and the amplifier circuit 3
0 from the output terminal 31.

According to such a BTL circuit, for example, considering the output of the L channel signal component, the 9th
As shown in the figure, since the voltage waveforms A and B output from the output terminals 23 and 26 are completely opposite in phase, the absolute value of the power supply voltage of the amplifier circuits 22 and 25 is
V _cc , the output voltage of the signal component of the L channel, that is, the potential difference between output terminals 23 and 26, will be 2V _cc at the peak, which can be theoretically doubled compared to that shown in Figure 1. It is something. Also,
Similarly, the output voltage of the signal component of the R channel can be 2V _cc at the peak. That is,
The undistorted and maximum range of the output voltage of the signal components of the L and R channels is as shown in FIG. 10, regardless of whether the signal components of the L and R channels are in phase with each other or in opposite phases.

However, in the stereo reproduction means using the BTL circuit configuration as described above, the four output terminals 2
3, 26, 28, and 31 are required, and there is a problem that it cannot be used in a stereo head with three terminal input.

[Purpose of the invention]

This invention was made in consideration of the above circumstances, and for example, each signal component of a two-channel stereo is outputted from three terminals, and the output amplitude is made as large as possible with respect to the specified power supply voltage without impairing the crosstalk characteristics. It is an object of the present invention to provide an extremely good stereo playback device that can be taken out and is particularly suitable for use in three-terminal input stereo headphones.

[Summary of the invention]

That is, the present invention includes first and second input terminals and a third input terminal to which a reference potential is applied,
The signal component of one channel supplied between the first and third input terminals is multiplied by a constant (a), and the signal component of the other channel supplied between the second and third input terminals is multiplied by a constant (b). a first amplification means for multiplying the signal component of the one channel by a constant (c) and a signal component of the other channel by a constant (d); (e) A third amplifying means for multiplying the signal component of the other channel by a constant (f) and an output terminal of one of the first to third amplifying means, and the output terminal thereof is shared. and each output end of the other two amplifying means, first and second output means for respectively obtaining each signal component of the two channels or an output signal corresponding thereto; the amplification means, comprising first and second feedback means for detecting a potential difference between both ends of the output means and feeding it back to the first and second input ends, and having the commonly used output end; It is characterized in that the constants of are both non-zero.

[Embodiments of the invention]

First, a basic example of the present invention will be explained with reference to FIGS. 11 to 25. That is, in FIG. 11, 41 to 43 are input terminals, of which input terminal 42 is grounded. The L channel signal component is supplied between the input terminals 41 and 42, and the R channel signal component is supplied between the input terminals 43 and 42.

Here, the input terminal 41 is connected to the first to third amplifier circuits 4 constituting the stereo playback device main body 44.
It is connected to one end of each of inputs 5 to 47, respectively. Further, the input terminal 43 is connected to the other input terminals of the first to third amplifier circuits 45 to 47, respectively. Then, the first amplifier circuit 45
The matrix is configured so that the signal component of the L channel is multiplied by a constant (a), the signal component of the R channel is multiplied by a constant (b), and a signal obtained by adding the two is output to the output terminal 48. . Further, the second amplifier circuit 46 multiplies the signal component of the L channel by a constant (c), multiplies the signal component of the R channel by a constant (d), and outputs a signal obtained by adding the two to the output terminal 49. The matrix is constructed as follows. Furthermore, the third amplifier circuit 47 multiplies the signal component of the L channel by a constant (e), and multiplies the signal component of the R channel by a constant (f).
The matrix is configured so as to output a signal obtained by multiplying the two and adding the two to the output terminal 50.

Therefore, if the voltages output from the output terminals 48 to 50 are respectively V ₁ to V ₃ , this V ₁
V ₃ to V 3 can be expressed as V ₁ =aL+bR V ₂ =cL+dR V ₃ =eL+fR. And output terminal 48,
The potential difference V _1-2 between the output terminals 50 and 49 is V _1-2 = V ₁ - V ₂ = aL + bR - (cL + dR) = (a-c) L + (b-d) R. _3-2 becomes _V3-2 = _V3 - _V2 =eL+fR-(cL+dR)=(e-c)L+(f-d)R. Therefore, the L channel signal component is extracted from between output terminals 48 and 49, and output terminal 5
If you want to extract the R channel signal component from between 0 and 49, set each constant a to f so that a-c≠0, b-d=0 e-c=0, f-d≠0. It's a good thing. For example, if a = 3/4, b = -1/4, c = -1/4 d = -1/4, e = -1/4, f = 3/4, then between output terminals 48 and 49 Potential difference V _1-2
is, V _1-2 = V ₁ −V ₂ = 3/4L-1/4R-(-1/4L-1/4R)=L, and the potential difference V _3-2 between the output terminals 50 and 49 is V _3-2 =V ₃ -V ₂ = -1/4L+3/4R-(-1/4L-1/4R)=
R, and the signal components of the L and R channels are respectively extracted.

In this case, the signal components of the L and R channels obtained between the output terminals 48 and 49 and between the output terminals 50 and 49, respectively, have voltage waveforms output from the output terminals 48 to 50, respectively, as shown in FIG. Of C to E, the difference between waveforms C and D and the difference between waveforms E and D are obtained. Therefore, if the absolute value of the power supply voltage of the first to third amplifier circuits 45 to 47 is _Vcc , then the above-mentioned Similar to the BTL circuit, at the peak
It can take up to 2V _cc .

Therefore, by appropriately selecting the values of the constants a to f of the first to third amplifier circuits 45 to 47, it is possible to obtain terminal 50,
Like the BTL circuit described above, the output voltage is made larger than the specified power supply voltage and the signal components of the L and R channels can be extracted. However, in this case, if the constants c and d of the second amplifier circuit 46 connected to the commonly used output terminal 49 are both "0", it is equivalent to the output terminal 49 being grounded. Since it is the same as that explained earlier with reference to FIG. 1, the condition that both constants c and d become "0" is excluded.

Also, as mentioned earlier, b−d=0, e−c
= 0, the L and R channel signal components output from between the output terminals 48 and 49 and between the output terminals 50 and 49 should include the R and L channel signal components at a predetermined ratio, respectively. For example, it becomes possible to provide the stereo wide effect described above. For example, a=3/4, b=-1/4, c=-(1/4-1/10) d=-(1/4-1/10), e=-1/4, f=3 /4, the potential difference between output terminals 48 and 49 is V _1-2
is, V _1-2 =V ₁ -V ₂ =3/4L-1/4R-{-(1/4-1/10)L-
(1/4-1/10)R} =3/4L-1/4R+1/4L-1/10L+1/4
R-1/10R = 9/10L-1/10R, and the potential difference V _3-2 between the output terminals 50 and 49 is V _3-2 = V ₃ -V ₂ =-1/4L+3/4R-{-( 1/4-1/10) L
-(1/4- 1/10)R} =-1/4L+3/4R+1/4L-1/10L+1/
4R-1/10R=9/10R-1/10L, and a stereo wide effect can be obtained.

Hereinafter, an example in which the stereo reproduction device main body 44 is configured with specific circuit elements will be described.

First, in the thirteenth input terminal 41, the resistor
It is connected to the inverting input terminal 1 of the amplifier circuit 51 via R ₁ and R ₂ in series, and is also connected to the non-inverting input terminal + of the amplifier circuit 51. The output terminal of this amplifier circuit 51 is connected to the output terminal 48 and also to the inverting input terminal - of the amplifier circuit 51 via a resistor _R3 . In addition, the input terminal 42 is connected to the amplifier circuit 52 via resistors R ₄ and R ₅ in series.
It is connected to the inverting input terminal - of the amplifier circuit 52 and to the non-inverting input terminal + of the amplifier circuit 52 . The output terminal of this amplifier circuit 52 is an output terminal 49.
It is also connected to the inverting input terminal - of the amplifier circuit 52 via a resistor _R6 . Furthermore, the input terminal 43 is connected to the inverting input terminal - of the amplifier circuit 53 via resistors R ₇ and R ₈ in series, and is also connected to the non-inverting input terminal + of the amplifier circuit 53 . The output terminal of this amplifier circuit 53 is connected to the output terminal 50 and also to the inverting input terminal - of the amplifier circuit 53 via a resistor _R9 . In addition, the connection point of the above resistors R ₁ and R ₂ and the resistors R ₄ ,
The connection point of R ₅ and the connection point of resistors R ₇ and R ₈ are commonly connected.

In the configuration shown in FIG. 13, if each amplifier circuit 51 to 53 is considered to be an ideal circuit with infinite gain, the potential at the inverting input terminal of each amplifier circuit 51 to 53 and the potential at the non-inverting input terminal are It is considered to be equal to the + potential. Therefore, when looking at the impedance component from the common terminal 54, the circuit shown in FIG. 13 can be considered as an equivalent circuit as shown in FIG. 14. When the signal components of the L and R channels are respectively supplied between the input terminals 41 and 42 and between the input terminals 43 and 42, the common terminal 54
The output voltage V ₅₄ of is V ₅₄ = (R ₄ R ₅ ) (R ₇ R ₈ )/(R ₁ R ₂ ) + (R ₄ R ₅
) (R ₇ R ₈ ) L + (R ₁ R ₂ ) (R ₄ R ₅ )/(R ₇ R ₈ ) + (R ₁ R ₂ )
(R ₄ R ₅ )R. Therefore, if the output voltages of each amplifier circuit ₅₁ to 53 are V1 to _V3 , then 1/ _R3 ( _V1 - L) = 1/ _R2 (L - _V54 ), so _V1 = _R2 Since +R ₃ /R ₂ L-R ₃ /R ₂ V ₅₄ V ₂ = -R ₆ /R ₅ V ₅₄ 1/R ₉ (V ₃ -R) = 1/R ₈ (R-V ₅₄ ), _{V3 = R8} + _R9 / _R8R - _R9 / _R8V54 . Therefore, the potential difference V _1-2 between the output terminals 48 and 49 is V _1-2 = V ₁ − V ₂ = R ₂ + R ₃ /R ₂ L+(R ₆ /R ₅ −R ₃ /R ₂ ) V ₅₄ , and the potential difference V _3-2 between the output terminals 50 and 49 is: V _3-2 = V ₃ - _{V 2} = R ₈ + R ₉ / R ₈ R + (R ₆ / R ₅ - _{R 9} / R ₈ ) It becomes _V54 . Here, if R ₃ / R ₂ = R ₆ / R ₅ = R ₉ / R ₈ , V _1-2 = R ₂ + R ₃ / R ₂ L V _3-2 = R ₈ + R ₉ / R ₈ R. , between output terminals 48 and 49 and output terminal 5
The signal components of the L and R channels are obtained from between 0 and 49, respectively.

Next, in FIG. 15, the input terminal 41 is connected to the amplifier circuit 5 through resistors R ₁₀ , R ₁₁ , and R _{12 ,} respectively.
1, 52, and 53, respectively. Also,
The input terminal 43 is connected to the inverting input terminal -, the inverting input terminal -, and the non-inverting input terminal + of the amplifier circuits 51, 52, and 53 via resistors _R13 , _R14 , and _R15, respectively. Furthermore, the input terminal 42 is connected to the amplifier circuit 5
It is connected to the non-inverting input terminal + of 2, and the resistor
Amplifying circuits 51 and 53 via R ₁₆ and R ₁₇ , respectively
are respectively connected to the non-inverting input terminals + of . Also,
The output terminal and inverting input terminal of each amplifier circuit 51 to 53 -
Resistors R ₁₈ , R ₁₉ , and R ₂₀ are respectively inserted and connected between them.

In the configuration shown in FIG. 15, when signal components of the L and R channels are respectively supplied between input terminals 41 and 42 and between input terminals 43 and 42, first, the non-inverting input terminal + Since the voltage is R ₁₆ /R ₁₀ +R ₁₆ L, the output voltage V ₁ of the amplifier circuit 51 is 1/R ₁₈ (R ₁₆ /R ₁₀ +R ₁₆ L-V ₁ ) = 1/R ₁₃ (R −R ₁₆ /R ₁₀ +R ₁₆ L) ∴V ₁ =R ₁₃ +R ₁₈ /R ₁₃・R ₁₆ /R ₁₀ +R ₁₆ L−R ₁₈ /R ₁₃ R. Moreover, since the non-inverting input terminal + of the amplifier circuit 52 is grounded, its output voltage V ₂ is −V ₂ /R ₁₉ =L/R ₁₁ +R/R ₁₄ ∴V ₂ = −R ₁₉ /R ₁₁ It becomes L−R ₁₉ /R ₁₄ R. Furthermore, the non-inverting input terminal + of the amplifier circuit 53
Since the voltage of R ₁₇ /R ₁₅ +R ₁₇ R is, the output voltage V ₃ of the amplifier circuit 53 is 1/R ₂₀ (R ₁₇ /R ₁₅ +R ₁₇ R-V ₃ ) = 1/R ₁₂ (L −R ₁₇ /R ₁₅ +R ₁₇ R) ∴V ₃ =R ₂₀ /R ₁₂ L+R ₁₂ +R ₂₀ /R ₁₂・R ₁₇ /R ₁₅ +R ₁₇ R). Here, if R ₁₀ = R ₁₅ , R ₁₆ = R ₁₇ R ₁₁ = R ₁₄ = R ₁₃ = R ₁₂ , R ₁₈ = R ₁₉ = R ₂₀ , the potential difference between the output terminals 48 and 49 is V _1-2
is, V _1-2 = V ₁ - V ₂ = (R ₁₃ + R ₁₈ / R ₁₃・R ₁₆ / R ₁₀ + R ₁₆ L-R ₁₈ / R ₁₃ R) - (R ₁₉ / R ₁₁ L-R ₁₉ / _R14R )=( _R11 + _R19 / _R11・_R16 / _R10 + _R16 + _R19 / _R11 )L. Similarly, the potential difference V _3-2 between the output terminals 50 and 49 is V _3-2 = V ₃ −V ₂ = (R ₁₁ + R ₁₉ /R ₁₁・R ₁₇ /R ₁₅ +R ₁₇ +R ₁₉ /R ₁₁ )R between output terminals 48 and 49 and output terminal 5
The signal components of the L and R channels are obtained from between 0 and 49, respectively.

Next, in FIG. 16, the input terminal 41 is
It is connected to the bases of NPN transistors Q ₁ to Q ₃ respectively. These transistors Q ₁
Each emitter of Q3 is connected to a resistor _R21 to _Q3 , respectively.
They are commonly connected via R ₂₃ , and the common connection point is connected to the emitter of the NPN transistor Q ₄ via a resistor R ₂₄ and grounded via a constant current source 55 . And the above transistor
A circuit including Q ₁ to Q ₄ , resistors R ₂₁ to R ₂₄ , and constant current source 55 constitutes a differential amplifier circuit 56 .

On the other hand, the input terminal 43 is connected to the bases of NPN transistors _Q5 to _Q7 , respectively. The emitters of these transistors Q ₅ to Q ₇ are connected in common through resistors R ₂₅ to R ₂₇ , respectively, and the common connection point is connected to the emitter of NPN transistor Q ₈ through a resistor R ₂₈ . , are grounded via a constant current source 57. Then, the transistors Q ₅ to Q ₈ and the resistors R ₂₅ to
A circuit including R ₂₈ and the constant current source 57 constitutes a differential amplifier circuit 58.

Here, the bases of the transistors Q ₄ and Q ₈ are commonly connected, and the connection point thereof is connected to the input terminal 42. Further, the collectors of the transistors Q ₁ and Q ₅ are both connected to a power supply terminal 59 to which a DC voltage +V _cc is applied. Further, the collectors of the transistors Q ₄ and Q ₇ are commonly connected, and the connection point thereof is connected to the power supply terminal 59 via a resistor R ₂₉ and to the output terminal 48 via a buffer circuit 60. . The collectors of the transistors Q ₃ and Q ₆ are connected in common, and the connection point is connected to the power supply terminal 59 via a resistor R ₃₀ and to the output terminal 49 via a buffer circuit 61. . Furthermore, the collectors of the transistors Q ₂ and Q ₈ are commonly connected, and the connection point thereof is connected to the power supply terminal 59 via a resistor R ₃₁ and to the output terminal 50 via a buffer circuit 62. .

Note that the potential drop due to the resistors R ₂₁ to R ₂₈ connected to the emitters of each transistor Q ₁ to Q ₈ so that each differential amplifier circuit 56, 58 operates linearly is V _T =kT/q, where k : Boltzmann's constant T: Absolute temperature q: It is assumed that it is sufficiently larger than the electric charge of the electron, and R ₂₄ =R ₂₁ R ₂₂ R ₂₃ R ₂₈ =R ₂₅ R ₂₆ R ₂₇ .

In the configuration shown in FIG. 16, when the signal components of the L and R channels are supplied between the input terminals 41 and 42 and between the input terminals 43 and 42, respectively, the output voltage V ₁ of the buffer circuit 60 becomes V ₁ = R ₂₉ (△Ic ₄ + △Ic ₇ ) = R ₂₉ (L/R ₂₄ −R/R ₂₇ ). However, △Ic ₄ and △Ic ₇ are transistors
This is the change in the collector current of Q ₄ and Q ₇ . Also,
The output voltage V ₂ of the buffer circuit 61 is as follows: V ₂ =R ₃₀ (ΔIc ₃ +ΔIc ₆ ) =R ₃₀ (−L/R ₂₃ −R/R ₂₆ ). However, △Ic ₃ and △Ic ₆ are transistors
This is the change in the collector current of Q ₃ and Q ₆ . moreover,
The output voltage V ₃ of the buffer circuit 62 is as follows: V ₃ =R ₃₁ (ΔIc ₂ +ΔIc ₈ ) =R ₃₁ (−L/R ₂₂ +R/R ₂₈ ). However, △Ic ₂ and △Ic ₈ are transistors
This is the change in the collector current of Q ₂ and Q ₈ . Here, if R ₂₉ = R ₃₀ = R ₃₁ , R ₂₄ = R ₂₈ R ₂₃ = R ₂₇ = R ₂₂ = R ₂₆ , the potential difference between the output terminals 48 and 49 is V _1-2
is, V _1-2 = V ₁ - V ₂ = V ₂₉ (L/R ₂₄ - R/R ₂₇ ) - R ₃₀ (-L/R ₂₃ - R/R
₂₆ ) = R ₃₀ (1/R ₂₄ + 1/R ₂₃ )L. Similarly, the potential difference V _3-2 between the output terminals 50 and 49 is V _3-2 = V ₃ - _{V 2} = R ₃₀ (1/R ₂₄ + 1/R ₂₃ )R, and the potential difference between the output terminals 48 and 49 is as follows. and output terminal 5
The signal components of the L and R channels are obtained from between 0 and 49, respectively.

Next, in FIG. 17, the input terminal 41 is connected to the inverting input terminal of the amplifier circuit 63 via a resistor R32, and the input terminal ₄₁ is connected to the inverting input terminal of the amplifier circuit ₆₃ via a resistor R33.
It is connected to the inverting input terminal of 4. The output end of the amplification circuit 63 is connected to each inverting input end of the amplification circuits 65 and 66 via resistors R ₃₄ and R ₃₅ , respectively.

On the other hand, the input terminal 43 is connected to the inverting input terminal of the amplifier circuit 67 via the resistor _R36 , and
It is connected to the inverting input terminal of the amplifier circuit 66 via a resistor _R37 . Then, the amplification circuit 67
The output terminal of is connected through resistors R ₃₈ and R ₃₉ respectively,
It is connected to each inverting input terminal of the amplifier circuits 64 and 65, respectively.

Further, the output terminals of the amplifier circuits 64 to 66 are
They are connected to output terminals 48 to 50, respectively. Further, the input terminal 42 is connected to the non-inverting input terminal + of each amplifier circuit 63 to 67, respectively. Further, resistors R40 to _R40 are connected between the output terminal and the inverting input terminal of each of the amplifier circuits 63 to 67, respectively.
R ₄₄ is inserted.

In the configuration shown in FIG. 17, when the signal components of the L and R channels are supplied between the input terminals 41 and 42 and between the input terminals 43 and 42, respectively, the output voltage V _{63 of the amplifier circuit 63} is V ₆₃ =-R ₄₀ /R ₃₂ L. Further, the output voltage V ₆₇ of the amplifier circuit 67 is V ₆₇ =−R ₄₄ /R ₃₆ R. Therefore, the output voltage V ₁ of the amplifier circuit 64 becomes V ₁ =-R ₄₁ (L/R ₃₃ +V ₆₇ /R ₃₈ ) =-R ₄₁ /R ₃₃ L+R ₄₁ /R ₃₈ ·R ₄₄ /R ₃₆ R. Moreover, the output voltage V ₂ of the amplifier circuit 65 is V ₂ =−R ₄₂ (V ₆₃ /R ₃₄ +V ₆₇ /R ₃₉ =R ₄₂ /R ₃₄・R ₄₀ /R ₃₂ L +R ₄₂ /R ₃₉・R ₄₄ /R ₃₆ R.Furthermore, the output voltage V ₃ of the amplifier circuit 66 is V ₃ =-R ₄₃ (V ₆₃ /R ₃₅ +R/R ₃₇ ) =R ₄₃ /R ₃₅・R ₄₀ /R ₃₂ L- R ₄₃ /R ₃₇ R. Therefore, the potential difference V _1-2 between the output terminals 48 and 49 is V _1-2 = V ₁ −V ₂ = −(R ₄₁ /R ₃₃ +R ₄₂ /R ₃₄・R ₄₀ /R ₃₂ )L +R ₄₄ /R ₃₆ (R ₄₁ /R ₃₈ -R ₄₂ /R ₃₉ )R. Also, the potential difference between the output terminals 50 and 49
V _3-2 is: V _3-2 = V ₃ − V ₂ = R ₄₀ / R ₃₂ (R ₄₃ / R ₃₅ − R ₄₂ / R ₃₄ ) L − (R ₄₃ / R ₃₇ + R ₄₂ / R ₃₉・R ₄₄ /R ₃₆ )R. Here, by setting R ₄₁ /R ₃₈ −R ₄₂ /R ₃₉ =0, R ₄₃ /R ₃₅ −R ₄₂ /R ₃₄ =0, from between the output terminals 48 and 49 and between the output terminals 50 and 49, Signal components of the L and R channels are obtained respectively. Further, by setting R ₄₁ /R ₃₈ −R ₄₂ /R ₃₉ >0 and R ₄₃ /R ₃₅ −R ₄₂ /R ₃₄ >0, the stereo wide effect described above can be obtained.

Above, we have shown an example in which the present invention is constructed using specific circuit elements.
The constants a to f for determining the respective matrices of the third amplifier circuits 45 to 47 will be generally explained. That is, the constants a to f are respectively a=k-1/k, b=-1/k, c=-1/k d=-1/k, e=-1/k, f=k-1/ k, the output voltage of each output terminal 48 to 50 is
V ₁ to V ₃ are as follows: V ₁ =k-1/kL-1/kR V ₂ =-1/kL-1/kR V ₃ =-1/kL+k-1/kR. Therefore, first, considering the case of k=2, the output voltages V ₁ to V ₃ are as follows: V ₁ = 1/2L-1/2R V ₂ =-1/2L-1/2R V ₃ =-1/2L+1 /2R, and in this case, V ₁ +V ₃ =0. Then, the output voltages of the signal components of the L and R channels obtained between the output terminals 48 and 49 and between the output terminals 50 and 49 are −V _cc 1/2L−1/2RV _cc −V _cc −1/2L− There is no distortion within the range that satisfies the condition 1/2RV _cc -V _cc -1/2L+1/2RV _cc , that is, within the range shown in Figure 18, and this distortion-free range was previously shown in Figure 3. It is wider than the no-distortion range.

Next, considering the case of k=3, each output voltage V ₁ to V ₃ is as follows: V ₁ = 2/3L-1/3R V ₂ =-1/3L-1/3R V ₃ =-1/3L+2 /3R, and in this case, V ₁ +V ₃ =-V ₂ . Then, set the condition that the output voltage of the signal components of the L and R channels is -V _cc 2/3L-1/3RV _cc -V _cc -1/3L-1/3RV _cc -V _cc -1/3L+2/3RV _cc If it is within a satisfactory range, that is, within the range shown by the solid line in FIG. 19, there will be no distortion.

Here, considering the maximum output voltage of the signal components of the L and R channels, first, if the output voltages of the signal components of the L and R channels have the same sign, |V ₂ | |V ₁ | |V ₂ | |V ₃ |, and V ₂ will first be clipped at V _cc or −V _cc . However, at this point,
Since V ₁ and _{V 3} have _{the same} sign and have not _been clipped yet, the signal components of _the L _and R channels are The output voltage can be increased. Next, when the output voltages of the signal components of the L and R channels have different signs, V ₁ and V ₂ have different signs, so L
and the output voltage of the R channel signal component is clipped before V ₂ . Therefore, when V ₁ and V ₂ are clipped at either V _cc or −V _cc , respectively, the output voltages of the signal components of the L and R channels become maximum. Then,
The maximum output voltage of the signal components of the L and R channels is as shown by the dashed line in FIG. This maximum output voltage is the same in all cases where k>4, which will be described below.

Next, considering the case of k=4, each output voltage V ₁ to V ₃ is as follows: V ₁ = 3/4L-1/4R V ₂ =-1/4L-1/4R V ₃ =-1/4L+3 /4. Then, set the condition that the output voltage of the signal components of the L and R channels is -V _cc 3/4L-1/4RV _cc -V _cc -1/4L-1/4RV _cc -V _cc -1/4L+3/4RV _cc If it is within a satisfactory range, that is, within the range shown by the solid line in FIG. 20, there will be no distortion. When L=R, V ₁ =-V ₂ =V ₃ , and all are clipped at the same time.

Next, considering the case of k=5, each output voltage V ₁ to V ₃ is: V ₁ =4/5L-1/5R V ₂ =-1/5L-1/5R V ₃ =-1/5L+4 /5R. Then, set the condition that the output voltage of the signal components of the L and R channels is -V _cc 4/5L-1/5RV _cc -V _cc -1/5L-1/5RV _cc -V _cc -1/5L+4/5RV _cc If it is within a satisfactory range, that is, within the range shown by the solid line in FIG. 21, there will be no distortion.

The case where k is from 2 to 5 has been explained above, but as is clear from FIGS. 19 to 21, when the signal components of the L and R channels are in phase, the distortion-free range and maximum output range is the conventional
The range is almost the same as that of the BTL circuit (see Figure 10), but when the signal components of the L and R channels are in opposite phase, the undistorted range and maximum output range are greater than the range of the conventional BTL circuit. You can see that it is getting smaller. However, in actual music signals, the signal components of the L and R channels are almost always in phase, and it is common knowledge that the bass, which has a particularly high power, is located in the center (that is, L=R). Therefore, the stereo playback device according to the present invention can be considered to have a distortion-free range and a maximum output range that are approximately equivalent to conventional BTL circuits for most music signals, and in particular, This is extremely suitable for stereo heads and the like having terminal inputs.

Next, maximum power output will be explained. First, the formula for power P ₀ is generally P ₀ =V ² /r, where r: load resistance. Therefore, the power output of the entire signal components of the L and R channels is P ₀ = 1/r (L ² + R ² ), which can be easily calculated from the above equation and the maximum output voltage shown in Figures 19 to 21. Be able to understand the maximum power output.

Here, consider the undistorted maximum power output when L=R, which is the most common signal component of the L and R channels. First, in the case of conventional stereo playback means as shown in Figure 1, its maximum power
P ₀ max is: P ₀ max=1/r{(Lmax(rms)) ² +(Rmax(rm s)) ² } =1/r{(V _cc /√2) ² +(V _cc /√2 ) ² }=V _cc
/r. In addition, in the case of a BTL circuit as shown in Fig. 8, its maximum power P ₀ max is P ₀ max = 1/r {(2V _cc /√2) ² + (2V _cc /√2) ² }
=4V _cc ² /r.

On the other hand, in the stereo playback device according to the present invention,
First, when L=R and k4, as described above, V ₂ =-1/k-1/kR is clipped first. Therefore, from |V ₂ |V _cc , L=R=±k/2V _cc (Vpeak) is obtained, and therefore, the maximum power P ₀ max is P ₀ max=1/r {(±kV _cc /2 √2) ² + (±kV _cc /2√
2) ² }=k ² /4·V _cc ² /r, as shown by curve F in FIG. Further, in the case of k4, since L=R, |V ₁ |=|V ₃ |=|k-2/kL1V _cc . Therefore, L=R=±k/k−2V _cc (Vpeak) is obtained, and thus P ₀ max=1/r{(±kV _cc /(k−2)√2) ² + (±kV _cc / (k-2)√2) ² }=k ² / (k-2) ²
・V _cc ² /r, as shown by curve G in FIG.

However, the simple maximum power output ignoring distortion is P ₀ max=4V _cc ² /r when k>2.

Next, the case where L≠R will be explained. Here, |L| is the maximum amplitude, R is variable, and R/L is considered as a parameter. Then, L and R are completely analogous, and regarding power, R and L
Since the sign of can be ignored, considering -1R/L1, all conditions are satisfied. That is, in the case of the stereo reproduction means shown in FIG.
The maximum power P ₀ max is P ₀ max=1/r(V _cc /√2) ² {1+(R/L) ² }, and in the case of the BTL circuit shown in Figure 8, P ₀ max=1 /r(2・V _cc /√2) ² {1+(R/L
) ² }.

On the other hand, in the stereo playback device according to the present invention,
Considering the case of k4, if V ₂ of the above-mentioned V ₂ =-1/kL-1/kR clips first, |V ₂ |=|-1/kL-1/kR| =| 1/k(1+R/L)L|V _cc ∴P ₀ max=1/r(kV _cc /√2(1+R/L)) ² {1+(R/L) ² } .... Furthermore, if V ₂ of V ₁ = k-1/kL-1/kR described above clips first, |V ₁ |=|k-1/kL-1/kR = |1/k(k- 1-R/L)L| _Vcc∴P0max =1/r( _kVcc /√2( _k -1-R/L)) ² {1+(R/L) ² }... FIG. 23 shows the values obtained by normalizing the above results by setting the maximum power P ₀ max of the stereo reproduction means shown in FIG. 1 to "1". In addition, in Fig. 23, the straight line H indicates the maximum power of the BTL circuit shown in Fig. 8.
P ₀ max.

Here, the above formulas include the no-distortion condition, and the maximum power output ignoring distortion is k>
2, with −1R/L0, P ₀ max=1/r(√2V _cc /1−R/L) ² {1+(R
/L) ² } and 0R/L1, P ₀ max=1/r(2V _cc /√2) ² {1+(R/L) ²
} becomes.

Furthermore, a stereo amplifier configured as shown in FIG. 24 can be considered as something similar to the above basic example.

That is, the first and third input terminals 41a and 43a, to which the (L) channel signal and the (R) channel signal are respectively applied, are connected to the second input terminal 42a connected to the virtual ground point. They are connected correspondingly to the respective non-inverting input terminals (+) of the first and third amplifier circuits 45a and 47a, and are coupled to each other via resistors R ₁ and R ₂ in series.

Here, the connection midpoint of the resistors R ₁ and R ₂ is connected to the inverting input terminal (-) of the second amplifier circuit 46a. This second amplifier circuit 46a has its non-inverting input end (+) connected to the reference potential point Vref ₁ , and its output end connected to its own inverting input end (-) via a feedback resistor _R3 . together with the second output terminal 49a
It is connected to the.

Further, the first and third amplifier circuits 45a,
47a has its output terminal connected to its respective inverting input terminal (-) via feedback resistors R ₄ and R ₅ correspondingly, and the first and third output terminals 48 a,
50a, and their respective inverting input terminals (-) are mutually coupled via a resistor _R6 .

The first and third output terminals 48
Between a, 50a and the second output terminal 49a are L and R channel loads Z _L , Z _R such as headphones.
is connected.

Therefore, in the above configuration, the resistors R ₁ to R ₃ are selected as R ₁ = R ₂ = 1-k/kR ₃ , and the resistors R ₃ to R ₆ are selected as R ₁ = R ₂ = k/1-kR. ₆ , the first to third output terminals 48a,
The respective potentials V ₁ , V ₂ , and V ₃ of 49a and 50a are as follows.

V ₁ = R ₄ + R ₆ /R ₆ L-R ₄ /R ₆ R=1/1-k (L-k・R) V ₂ =-R ₃ /R ₁ L-R ₃ /R ₁ R=- k/1-k (L+R) V ₃ = R ₅ + R ₆ /R ₆ R-R ₅ /R ₆ L = 1/1-k (R-k・L) As a result, the loads Z _L , Z _B The voltage applied to V _L ,
V _R becomes V _L = V ₁ - V ₂ = 1 + k / 1 - k · L V _R = V ₃ - V ₂ = 1 + k / 1 - k · R, and both of them are the result of only the L channel component or only the R channel component. It turns out that it is a signal.

And, with this type of amplifier, it is possible to send separate signals to two loads using a 3-wire (terminal) system, compared to the case where two single amplifiers are used as in the basic example mentioned above. Large output can be obtained.

In other words, if L = R, k = 1/3, if L = 1/2R or R = 1/2L, k = 1/2, and if L = 0 or R = 0, k = 1, respectively, in the conventional BTL configuration. It is possible to obtain the same non-clip maximum output as in the case of .

Figure 25 shows a comparison of such output sizes, where (A) is the output of a conventional BTL amplifier, (B) is the output of a conventional single amplifier, and (C) is the output of a conventional single amplifier.
is the full power output according to the basic example of this invention (including FIG. 24), and (D) is the non-clip maximum output according to the basic example of this invention (including FIG. 24). However, V _L and _VR should each be clipped at ±2V _cc (this is for a dual power supply type, and ±V _cc for a single power supply type).

That is, according to the basic example of this invention, L=R
Only when V ₁ , V ₂ , and V ₃ begin to clip at the same time, the maximum non-clip output becomes the same as that of the conventional BTL circuit.

However, in general V ₁ and V ₂ (or V ₃ and V ₂ )
The basic example of the invention described above has a drawback in that V _L and _VR start clipping earlier than the full power output because they do not clip at the same time.

In addition, in the basic example of this invention described above, the crosstalk characteristics tend to be greatly affected by the accuracy of the resistance ratio used, and even if the resistance ratio deviates by only 1%, the crosstalk characteristics will be reduced to -40 dB. This has the disadvantage that the amplifier tends to be considerably inferior to a normal two-system amplifier.

Therefore, this invention is a further development of the basic example so as to overcome the above-mentioned difficulties, and V ₁ and V ₂
(or V ₃ and V ₂ ) start clipping at the same time to improve the non-clip maximum output, and is also characterized by improvements made to eliminate the negative effects on crosstalk characteristics caused by the accuracy of the resistance ratio. are doing.

An embodiment of the present invention will be described below with reference to FIGS. 26 and 27.

That is, the parts in FIG. 26 that are configured in the same manner as in the case of FIG. The respective output terminals of fourth and fifth amplification circuits 70 and 71 as newly installed input stage amplifiers are connected to the section.

These fourth and fifth amplifier circuits 7
0 and 71, respectively, and a second input terminal 42b connected to a virtual ground point, the L and R channel signals are applied correspondingly to the first
and correspondingly connected to third input terminals 41b and 43b.

Further, the fourth and fifth amplifier circuits 70, 7
Each inverting input terminal (-) of No. 1 is connected correspondingly to each output terminal of sixth and seventh amplifier circuits 72 and 73 as newly installed differential amplifiers.

Here, the sixth and seventh amplifier circuits 72 and 73
are connected in common to the second output terminal 49a through resistors R ₇ and R ₁₁ correspondingly, and respectively connected through resistors R ₈ and R ₁₂ correspondingly. , and their anti-non-inverting input terminal (+) is correspondingly connected to the first and third output terminals 48a, 50a via resistor _R9 or _R13 , and resistor R ₁₀ or R ₁₄ to the reference potential points Vre ₂ and Vre ₃ correspondingly.

Therefore, in the above configuration, when the output potentials of the sixth and seventh amplifier circuits 72 and 73 are V ₄ and V ₅ , one of the output potentials V ₄ is V ₄ =R ₁₀ /R ₉ +R ₁₀・R ₇ +R ₈ /R ₇・V ₁ −R ₈ /R ₇・V ₃ . Here, if R ₇ =R ₈ =αR ₉ =αR ₁₀ is selected, V ₄ =1/α(V ₁ −V ₃ ).

In this case, if the amplification degree of the fourth amplifier circuit 70 is sufficiently large, V ₄ =L due to the negative feedback effect, but since V _L = V ₁ −V ₃ as described above, V _L = α・L. can be expressed.

In other words, the output voltage V _L of the left channel L is similar to the input signal L component.

As a result, when either V ₁ or V ₂ clips, the negative feedback effect causes the output of the sixth amplifier circuit 70 to reduce the amplitude of the clipped side and reduce the amplitude of the non-clipped side by that much. attempts to maintain similarity by increasing the amplitude of . Therefore, as a result, V ₁ and V ₂ start clipping at the same time, and the non-clip maximum output on the L channel side increases accordingly.

The above explanation has been made on the L channel side, but it goes without saying that the R channel side also performs the same operation, and the non-clip maximum output on the R channel side increases.

Figure 27 shows the output relationship based on the above.Compared to the characteristics shown in broken lines (C) and (D) in the basic example where k = 1/2 and k = 1/3, the characteristics shown in Figure 26 are It is obvious at a glance that the solid line (D)' characteristic in the figure has a larger non-clip maximum output.

Then, as in the embodiment of FIG. 26, load Z _L or
Since the voltage across _ZR is differentially detected and compared with the input signal, crosstalk characteristics will not deteriorate even if the resistance ratio used is not very accurate. This is because even if the resistance ratios of the resistors R ₇ to R ₁₄ vary, only the potentials of V ₁ , V ₂ , and V ₃ vary, and the crosstalk characteristics are not adversely affected.

Furthermore, in this case, since so-called overall negative feedback is applied, it is also possible to improve the distortion rate.

As mentioned above, the non-clip maximum output increases, but as can be seen from Figure 27, the in-phase component provides the same output as a normal BTL circuit, and is generally used for musical components. is mainly composed of in-phase components, so it sounds like a normal BTL
This is almost the same as in the case of a circuit.

FIG. 28 shows another embodiment. In this case, the part surrounded by the dotted line frame is the same as the basic example, and in particular operates exactly the same as that shown in FIG. 24. , and a circuit 70 for producing similar feedback signals on the L channel side and R channel side shown in FIG. 26, and a circuit 70 for obtaining output voltages 72 and 73 similar to the input signals of each channel.
71 is attached.

It should be noted that the present invention is not limited to the above-described embodiments, and can be implemented with various modifications without departing from the gist thereof.

〔Effect of the invention〕

Therefore, as described in detail above, according to the present invention, each signal component of, for example, two-channel stereo can be output at three terminals (three power amplifiers are sufficient) and at a specified power supply voltage without impairing crosstalk characteristics. On the other hand, it is possible to obtain an output amplitude as large as possible, and it is possible to provide an extremely good stereo playback device that is particularly suitable for use in stereo headphones with three terminal inputs.

[Brief explanation of drawings]

Figures 1 to 3 are circuit configuration diagrams, waveform diagrams, and diagrams showing the undistorted maximum output range for explaining conventional stereo reproduction means, respectively, and Figures 4 to 7 are diagrams showing other conventional stereo reproduction means, respectively. The circuit configuration diagrams illustrating the means and FIGS. 8 to 10 are respectively conventional
A circuit configuration diagram, a waveform diagram, and a diagram showing the undistorted maximum output range for explaining the BTL circuit; FIG. 11 is a block configuration diagram showing a basic example of a stereo playback device according to the present invention; FIG. 12 is a basic example of the same. 13 and 14 are a circuit configuration diagram and an equivalent circuit diagram showing an example of the same basic example configured with specific circuit elements, respectively, and FIGS. 15 to 17 are the same waveform diagram for explaining the same. Circuit configuration diagrams showing other examples in which the basic example is configured with specific circuit elements, Figures 18 to 21
The figures are diagrams showing the undistorted maximum output range when the constants of the same basic example are changed, respectively. Figures 22 and 23 are characteristic curve diagrams for explaining the maximum power output of the same basic example, respectively. Figure 24 25 is a block diagram of another basic example and a characteristic curve diagram for explaining its non-clip maximum output, and FIGS. 26 and 27 are block diagrams showing an embodiment of the present invention and its non-clip maximum output. Characteristic curve diagram to explain the output,
FIG. 28 is a configuration diagram of another embodiment. 11, 12, 13...input terminals, 14, 15...
...Amplification circuit, 16, 17, 18...Output terminal, 1
9...Amplification circuit, 20, 21...Amplification circuit, 22
...Amplification circuit, 23 ... Output terminal, 24 ... Phase inversion circuit, 25 ... Amplification circuit, 26 ... Output terminal, 27 ... Amplification circuit, 28 ... Output terminal, 29
...Phase inversion circuit, 30...Amplification circuit, 31...
Output terminal, 41, 42, 43...Input terminal, 44
... Stereo playback device main body, 45 ... First amplifier circuit, 46 ... Second amplifier circuit, 47 ... Third amplifier circuit, 48, 49, 50 ... Output terminal, 5
1, 52, 53...Amplification circuit, 54...Common terminal, 55...Constant current source, 56...Differential amplifier circuit,
57... Constant current source, 58... Differential amplifier circuit, 59
...Power terminal, 60,61,62...Buffer circuit, 63,64,65,66,67...Amplification circuit, 70,71,72,74...Amplification circuit, R ₁
~ _R14 ...Resistance, _ZL , _ZR ...Load.

Claims (1)

[Claims] 1 comprises first and second input terminals and a third input terminal to which a reference potential is applied, and the signal component of the one channel supplied between the first and third input terminals is multiplied by a constant (a). and a first amplifying means for multiplying a signal component of the other channel by a constant (b), which is supplied between the second and third input terminals; and a first amplifying means for multiplying the signal component of the one channel by a constant (c), a second amplification means for multiplying the signal component of the one channel by a constant (e) and a third amplification means for multiplying the signal component of the other channel by a constant (f); The output terminal of one of the first to third amplifying means is shared, and each signal component of each of the channels is transmitted between the output terminal and each output terminal of the other two amplifying means. Alternatively, first and second output means for obtaining output signals corresponding thereto, and a potential difference between both ends of the first and second output means are detected and fed back to the first and second input terminals. 1. A stereo reproduction device comprising first and second feedback means, wherein constants of the amplifying means having the commonly used output end are both non-zero.