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JPH0454964B2 - - Google Patents
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JPH0454964B2 - - Google Patents

Info

Publication number
JPH0454964B2
JPH0454964B2 JP58014054A JP1405483A JPH0454964B2 JP H0454964 B2 JPH0454964 B2 JP H0454964B2 JP 58014054 A JP58014054 A JP 58014054A JP 1405483 A JP1405483 A JP 1405483A JP H0454964 B2 JPH0454964 B2 JP H0454964B2
Authority
JP
Japan
Prior art keywords
wafer
sample
scanning
temperature distribution
heating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58014054A
Other languages
Japanese (ja)
Other versions
JPS59139624A (en
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58014054A priority Critical patent/JPS59139624A/en
Publication of JPS59139624A publication Critical patent/JPS59139624A/en
Publication of JPH0454964B2 publication Critical patent/JPH0454964B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04Apparatus for manufacture or treatment
    • H10P72/0431Apparatus for thermal treatment
    • H10P72/0436Apparatus for thermal treatment mainly by radiation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90Thermal treatments, e.g. annealing or sintering

Landscapes

  • Recrystallisation Techniques (AREA)

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は半導体ウエハなどの試料に棒状の赤外
線ランプにより赤外線ビームを照射してウエハの
加熱を行う方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a method for heating a sample such as a semiconductor wafer by irradiating an infrared beam with a rod-shaped infrared lamp.

(b) 技術の背景 例えばシリコンウエハ上に二酸化シリコン
(SiO2)等の絶縁膜を形成し、その上に多結晶シ
リコン層を形成し、これにレーザービームやラン
プを用いたアニールを行なつて単結晶シリコン層
を形成する技術が単結晶シリコン層を多層に積層
して構成される三次元(立体)集積回路の製造に
おいて重要なものとなつてくる。
(b) Background of the technology For example, an insulating film such as silicon dioxide (SiO 2 ) is formed on a silicon wafer, a polycrystalline silicon layer is formed on top of it, and this is annealed using a laser beam or lamp. BACKGROUND ART The technology for forming single-crystal silicon layers is becoming important in the production of three-dimensional (stereoscopic) integrated circuits constructed by laminating multiple single-crystal silicon layers.

この際ウエハ全面に多結晶シリコン層を形成
し、ウエハ表面全体をカバーするような大きさの
棒状ヒータ(ランプ)を走査してアニールするこ
とにより、結晶方位のそろつた大面積の多結晶シ
リコン領域が得られる。
At this time, a polycrystalline silicon layer is formed on the entire surface of the wafer, and by scanning and annealing a rod-shaped heater (lamp) large enough to cover the entire wafer surface, a large area of polycrystalline silicon with uniform crystal orientation is formed. is obtained.

(c) 従来技術と問題点 従来のこのようなランプアニールのようすを第
1図に示す。
(c) Conventional technology and problems Figure 1 shows a conventional lamp annealing process.

同図(a)に示すように多結晶シリコン層が形成さ
れたウエハ1上を赤外線ランプによる線状のビー
ム2が矢印の方向に走査する。これにより多結晶
シリコン層は加熱され、溶融した後固化し単結晶
化してゆく。
As shown in FIG. 2(a), a linear beam 2 from an infrared lamp scans in the direction of the arrow over a wafer 1 on which a polycrystalline silicon layer is formed. As a result, the polycrystalline silicon layer is heated, melted, and then solidified to become a single crystal.

従来はビーム2の強度および走査速度を一定と
していた。この時のウエハ上におけるビームの走
査位置と、それに対する走査領域の温度を同図b
に示す。
Conventionally, the intensity and scanning speed of the beam 2 were kept constant. The scanning position of the beam on the wafer at this time and the temperature of the scanning area corresponding to it are shown in Figure b.
Shown below.

ウエハ1の温度は、主としてビームの輻射によ
る温度分布成分(破線4)と、ウエハ内(多結晶
シリコンも含む)の熱伝導による温度分布成分
(一点鎖線3)とによつて表される。
The temperature of the wafer 1 is mainly represented by a temperature distribution component due to beam radiation (broken line 4) and a temperature distribution component due to heat conduction within the wafer (including polycrystalline silicon) (dotted chain line 3).

ビームの輻射による温度分布成分は、ビームに
よる直接照射によつてもたらされる成分であり、
ビームにより平坦なウエハ上を走査していけば、
理論的にはほぼ均一な分布となる。ただ実際に
は、ビームによるウエハの走査直前と直後にウエ
ハの側端部がビームの輻射により加熱されるた
め、ウエハの端部近傍はウエハ表面のみが加熱さ
れる他の領域に比較して多少温度が高くなる。
The temperature distribution component due to beam radiation is a component brought about by direct irradiation with the beam,
If the beam scans a flat wafer,
Theoretically, the distribution is almost uniform. However, in reality, the side edges of the wafer are heated by beam radiation just before and after the wafer is scanned by the beam, so the area near the edge of the wafer is slightly heated compared to other areas where only the wafer surface is heated. The temperature increases.

また熱伝導による温度分布成分は、ビームによ
る走査領域からの熱伝導を考慮した成分である。
ビームにて走査された領域を中心として熱伝導は
発生しつづけているため、ビーム走査の終点とな
る端部Bでは、ビーム走査時の温度が他の領域に
比較して最も高くなる。
Further, the temperature distribution component due to heat conduction is a component that takes into consideration heat conduction from the scanning area by the beam.
Since heat conduction continues to occur centering around the region scanned by the beam, the temperature at the end B, which is the end point of the beam scan, is the highest during the beam scan compared to other regions.

上述した二種類の温度分布成分により、ウエハ
内におけるビーム走査時のその領域の温度は、実
線5に示す分布となる。
Due to the two types of temperature distribution components described above, the temperature of the region within the wafer during beam scanning has a distribution shown by the solid line 5.

すなわち、ウエハ上の走査終了位置方向にそつ
て温度が高くなつており、ウエハは過剰な加熱を
受けることになる。
In other words, the temperature increases in the direction of the scanning end position on the wafer, and the wafer is subjected to excessive heating.

このような過剰アニールを行うとウエハの後半
で単結晶化されるべきシリコン層が剥離したり、
更に、三次回路の場合、既に完成した下層のLSI
の素子特性を損つたりする。逆に、そのようなこ
とが起こらない様に輻射強度を下げると、今度
は、ウエハの前半で充分なアニールが行われなく
なる。したがつて、一定輻射強度で一定速度の走
査では均一なアニールは不可能である。
If such excessive annealing is performed, the silicon layer that should be single-crystalized in the latter half of the wafer may peel off, or
Furthermore, in the case of a tertiary circuit, the lower layer LSI that has already been completed
This may impair the device characteristics of the device. Conversely, if the radiation intensity is lowered to prevent this from happening, sufficient annealing will not be performed in the first half of the wafer. Therefore, uniform annealing is not possible with constant radiation intensity and constant speed scanning.

(d) 発明の目的 本発明は、従来のこのような欠点を解消し、ウ
エハを均一に加熱することのできる加熱方法を提
供することを目的とする。
(d) Object of the Invention The object of the present invention is to provide a heating method that can eliminate these conventional drawbacks and uniformly heat a wafer.

(e) 発明の構成 上記目的を実現するための本発明は、試料上で
該試料の一端部から他端部へ線状ビームを走査し
て該試料を加熱する方法において、該試料に対す
る単位面積当りおよび単位時間当りのビーム照射
量を該他端部方向に沿つて漸次増大させた後減少
させることを特徴とする。
(e) Structure of the Invention To achieve the above object, the present invention provides a method for heating a sample by scanning a linear beam from one end of the sample to the other end. It is characterized in that the beam irradiation amount per unit time is gradually increased along the direction of the other end and then decreased.

(f) 発明の実施例 第2図は本発明の実施例を説明する図である。
第1図の実施例としては、第2図に実線6で示す
ように、ウエハの端部Bの方向に沿つてビームの
強度を漸次減少させる。
(f) Embodiment of the invention FIG. 2 is a diagram illustrating an embodiment of the invention.
In the embodiment of FIG. 1, the intensity of the beam is gradually decreased along the direction of the edge B of the wafer, as shown by the solid line 6 in FIG.

これによつて第1図に実線5で示す温度分布の
かたよりを補償し、均一な温度分布を得ることが
できる。
As a result, it is possible to compensate for the bias in the temperature distribution shown by the solid line 5 in FIG. 1, and to obtain a uniform temperature distribution.

第2の実施例としては、第2図に破線7で示す
ようにビームの走査速度を端部Bの方向に沿つて
漸次増大させる。
In a second embodiment, the scanning speed of the beam is gradually increased along the direction of the end B, as shown by the broken line 7 in FIG.

これら第1、第2の実施例はつまりウエハの単
位面積に対する単位時間当りのビームの照射量を
ウエハの端部Bの方向に沿つて初め僅か増加さ
せ、次に漸次減少させていることになる。これに
より、ウエハ面内の温度分布を均一化することが
できる。
In other words, in these first and second embodiments, the amount of beam irradiation per unit time per unit area of the wafer is initially slightly increased along the direction of the edge B of the wafer, and then gradually decreased. . Thereby, the temperature distribution within the wafer surface can be made uniform.

(g) 発明の効果 以上説明したように本発明によればウエハ内の
温度分布を均一にすることができ、従つて多結晶
シリコンを単結晶化する場合には、ウエハ全面に
わたつて均一、同質の単結晶シリコン層が得られ
る。又照射量はウエハの到る所、必要最小限に出
来るから、三次元回路の下層LSIの素子を熱的に
破損するおそれもない。
(g) Effects of the Invention As explained above, according to the present invention, the temperature distribution within the wafer can be made uniform, and therefore, when polycrystalline silicon is made into a single crystal, the temperature distribution is uniform over the entire surface of the wafer. A homogeneous single crystal silicon layer is obtained. Furthermore, since the amount of irradiation can be kept to the minimum necessary throughout the wafer, there is no risk of thermally damaging the underlying LSI elements of the three-dimensional circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の加熱方法を説明するための図、
第2図は本発明の実施例を説明するための図であ
る。 図において、1はウエハ、2はビーム、6はウ
エハ上でのビームの強度分布を示す線、7はウエ
ハ上でのビームの走査速度の変化を示す線であ
る。
Figure 1 is a diagram for explaining the conventional heating method.
FIG. 2 is a diagram for explaining an embodiment of the present invention. In the figure, 1 is a wafer, 2 is a beam, 6 is a line showing the intensity distribution of the beam on the wafer, and 7 is a line showing changes in the scanning speed of the beam on the wafer.

Claims (1)

【特許請求の範囲】[Claims] 1 試料上で該試料の一端部から他端部へ線状ビ
ームを走査して該試料を加熱する方法において、
該試料が均一に加熱されるように、該試料に対す
る単位面積当りおよび単位時間当りのビーム照射
量を該他端部方向に沿つて漸次増大させた後減少
させることを特徴とする試料の加熱方法。
1. A method of heating a sample by scanning a linear beam from one end of the sample to the other end of the sample,
A method for heating a sample, characterized in that the amount of beam irradiation per unit area and per unit time to the sample is gradually increased along the direction of the other end and then decreased so that the sample is heated uniformly. .
JP58014054A 1983-01-31 1983-01-31 Heating method of sample Granted JPS59139624A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58014054A JPS59139624A (en) 1983-01-31 1983-01-31 Heating method of sample

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58014054A JPS59139624A (en) 1983-01-31 1983-01-31 Heating method of sample

Publications (2)

Publication Number Publication Date
JPS59139624A JPS59139624A (en) 1984-08-10
JPH0454964B2 true JPH0454964B2 (en) 1992-09-01

Family

ID=11850370

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58014054A Granted JPS59139624A (en) 1983-01-31 1983-01-31 Heating method of sample

Country Status (1)

Country Link
JP (1) JPS59139624A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080173620A1 (en) * 2005-09-26 2008-07-24 Ultratech, Inc. Apparatuses and methods for irradiating a substrate to avoid substrate edge damage
US10196678B2 (en) 2014-10-06 2019-02-05 ALVEO Technologies Inc. System and method for detection of nucleic acids
CN109996888A (en) 2016-09-23 2019-07-09 阿尔韦奥科技公司 For testing and analyzing the method and composition of object
JP6837202B2 (en) * 2017-01-23 2021-03-03 パナソニックIpマネジメント株式会社 Substrate heating device and method and manufacturing method of electronic device
EP3899022A4 (en) 2018-12-20 2023-03-01 Alveo Technologies Inc. PORTABLE IMPEDANCE-BASED DIAGNOSTIC TEST SYSTEM FOR ANALYTE DETECTION
US12472492B2 (en) 2020-08-14 2025-11-18 Alveo Technologies, Inc. Systems and methods of sample depositing and testing

Also Published As

Publication number Publication date
JPS59139624A (en) 1984-08-10

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