JPH0463403B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a periodic test circuit for emergency control circuits in systems that require high real-time performance.

Conventionally, this type of periodic test circuit actually forcibly activates the system failure detection circuit under program control online and operates the emergency control circuit.
I confirmed this by reconfiguring the system. However, this test circuit had the disadvantage that there was a risk that service would be interrupted during system reconfiguration, and that if there was a latent failure in the emergency control circuit, system reconfiguration would be impossible and the system would go down.

An object of the present invention is to solve the above-mentioned drawbacks by disabling the output of the emergency control circuit during regular tests, visually displaying the operating status of the emergency control circuit, and automatically determining the normality. The present invention provides a periodic test circuit that can automatically restore the system to online mode in the event of a system failure without requiring the intervention of a maintenance person.

The periodic test circuit for the emergency control circuit of the present invention is a system failure detection circuit that is reset by a reset signal periodically supplied by an online program, and detects the occurrence of a system failure when the reset signal is no longer supplied when a system failure occurs. A test instruction signal and a test start instruction signal are input to a central processing unit having an emergency control circuit that is automatically activated by this system failure detection circuit and performs an operation to reconfigure the programmable system. a test activation circuit that disables the reset signal provided by the online program and activates the system fault detection circuit; and output sending from the emergency control circuit activated by the test activation circuit to the online side. a display circuit for displaying the operational status of the emergency control circuit activated by the test activation circuit using a gate means, a flip-flop circuit, and a display means; an operation result determination circuit that determines the normality of the operating state of the control circuit; the test starting circuit is reset by either the output of the system failure detection circuit or a signal for canceling the test state; The circuit is characterized in that a reset signal is inputted to the circuit by an online program.

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention.
The system failure detection circuit 13 in this embodiment is a counter circuit, which is normally reset periodically by a reset signal 2a by an online program, but when a system failure occurs, the reset signal 2a is reset.
When the counter overflows without being reset, the overflow signal 14 activates the emergency control circuit 1. Furthermore, the signal 2c instructing a periodic test and the signal 2b instructing the start of a periodic test are input signals to the system failure detection circuit 13, and the periodic test instruction signal 2
a flip-flop 3b that holds c to indicate that a periodic test is in progress; a flip-flop 3a that holds the periodic test start signal 2b; a gate circuit 4a that takes the AND of the flip-flop 3b and the flip-flop 3a; The output of the gate circuit 4a is connected to a gate circuit 4b which invalidates the reset signal 2a generated by the online program. Further, an OR signal that resets the flip-flop 3b that indicates that the periodic test is in progress is generated using either the signal 2d for canceling the periodic test state and the signal 2d, or the output 11 of the operation result judgment circuit 10 that judges the operation of the emergency control circuit 1. circuit 1
2 is connected to the flip-flop 3b. Furthermore, a flip-flop 3 instructs to start the periodic test using either the signal 2d for canceling the periodic test state or the overflow signal 14.
An OR circuit 5 for resetting a is connected to the flip-flop 3a. Further, the emergency control circuit 1
After activation, the gate circuits 6 and 7 that control the destination of the output signal, the flip-flop 8 that maintains the operating state of the emergency control circuit 1 during periodic tests, and the lamps 9a, 9b, and 9c that display them are connected to the emergency control circuit 1. Connected to control circuit 1. Further, a lamp 9d indicating that a periodic test is in progress is connected to the flip-flop 3b which indicates that a periodic test is in progress.

Next, the operation of the embodiment of the present invention will be described in detail with reference to the drawings.

During normal operation, the system failure detection circuit 13
is reset signal 2a by online program
However, when a system failure occurs and the reset signal 2a is no longer received, the system failure detection circuit 13 overflows and the emergency control circuit 1 is activated, the output is output via the output signal invalidation gate circuit 7. Sent to the online side.
During a periodic test, a signal 2c instructing a periodic test is held in the flip-flop 3b, and an indicator lamp 9d is lit to indicate that the periodic test is in progress. Furthermore, the signal 2b instructing the start of the periodic test is held in the flip-flop 3a, and the output of the test start gate circuit 4a, which is ANDed the outputs of the flip-flops 3b and 3a, is used to inhibit the output of the gate circuit 4b, and the output from the online program is The reset signal 2a is disabled to cause the failure detection circuit 13 to overflow, and the overflow signal 14 is used to activate the emergency control circuit 1. At the same time, the flip-flop 3a is reset by the overflow signal 14, and the subsequent reset signal 2a is made valid. During a periodic test, the output signal invalidation gate circuit 7 is disabled by the output of the flip-flop 3b held during the periodic test, and instead the gate circuit 6 is opened and the operating state of the emergency control circuit 1 after startup is held by the flip-flop 8; Display lamp 9
The result is displayed, and the operation result judgment circuit 10 also determines that the result is normal and outputs the output signal 1.
Flip-flop 3b which displays periodical test in progress at 1
is reset, the output signal invalidation gate circuit 7 is opened, the gate circuit 6 is closed, and the lamp 9d indicating that a periodic test is in progress is extinguished. Subsequently, each flip-flop 3 is activated by the signal 2d for canceling the periodic test state.
3 and 8 to reset the lamps 9a, 9b, 9.
Extinguish c and end the periodic test.

Note that the method of activating the emergency control circuit 1 by the system failure detection circuit 13 in this embodiment is merely an example, and is not limited to this method.

As explained above, the present invention aims at reconfiguring a system that requires a high degree of real-time performance.

If there is a latent fault in a circuit that is not normally activated, but when it is activated, it may immediately lead to a system failure. It is possible to isolate and test only the above-mentioned circuit, and it is also possible to automatically restore the online mode even if there is a startup request from the online side during a periodic test, making it easier to conduct periodic tests. It has a positive effect.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Emergency control circuit, 2...Signal line, 3...Start inhibition flip-flop, 4...Test start gate circuit, 5...OR circuit, 6...Gate circuit, 7...
... Output signal invalid gate circuit, 8 ... Flip-flop, 9 ... Lamp, 10 ... Operation result judgment circuit, 11 ... Judgment result output, 12 ... OR circuit,
13...System failure detection circuit, 14...Overflow signal.

Claims (1)

[Scope of Claims] 1. A system failure detection circuit that is reset by a reset signal periodically supplied by an online program and detects the occurrence of a system failure by stopping the supply of the reset signal when a system failure occurs; In a central processing unit having an emergency control circuit that is automatically activated by a detection circuit and performs an operation to reconfigure a program controllable system, when a test instruction signal and a test start instruction signal are input, the online program is activated. a test activation circuit for disabling the reset signal supplied by the system failure detection circuit and activating the system failure detection circuit; and a circuit for disabling output transmission to the online side from the emergency control circuit activated by the test activation circuit. and a display circuit that displays the operating state of the emergency control circuit activated by the test starting circuit using a gate means, a flip-flop circuit, and a display means, and an operating state of the emergency control circuit that is determined based on the output state of the flip-flop circuit. an operation result determination circuit for determining the normality of the system; and a circuit for resetting the test activation circuit using either the output of the system failure detection circuit or a signal for canceling the test state, and for controlling the system failure detection circuit by an online program. A periodic test circuit for an emergency control circuit, characterized in that a reset signal is input.