JPH0465036B2 - - Google Patents
Info
- Publication number
- JPH0465036B2 JPH0465036B2 JP59008219A JP821984A JPH0465036B2 JP H0465036 B2 JPH0465036 B2 JP H0465036B2 JP 59008219 A JP59008219 A JP 59008219A JP 821984 A JP821984 A JP 821984A JP H0465036 B2 JPH0465036 B2 JP H0465036B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- mixed crystal
- epitaxial
- substrate
- gaas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
- H10P14/3421—Arsenides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2902—Materials being Group IVA materials
- H10P14/2905—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2907—Materials being Group IIIA-VA materials
- H10P14/2909—Phosphides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2907—Materials being Group IIIA-VA materials
- H10P14/2911—Arsenides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3214—Materials thereof being Group IIIA-VA semiconductors
- H10P14/3218—Phosphides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3214—Materials thereof being Group IIIA-VA semiconductors
- H10P14/3221—Arsenides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3242—Structure
- H10P14/3244—Layer structure
- H10P14/3254—Graded layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
- H10P14/3418—Phosphides
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Description
【発明の詳細な説明】
本発明は高輝度の発光ダイオードの製造に適し
たりん化ひ化ガリウム混晶エピタキシヤルウエハ
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a gallium phosphide arsenide mixed crystal epitaxial wafer suitable for manufacturing high brightness light emitting diodes.
りん化ひ化ガリウム、すなわち、GaAs1-xPx混
晶エピタキシヤルウエハは黄色、橙色その他
560nmより長波長側の可視光の発光ダイオードの
製造に適する。 Gallium arsenide phosphide, i.e., GaAs 1-x P x mixed crystal epitaxial wafers are yellow, orange, etc.
Suitable for manufacturing visible light emitting diodes with wavelengths longer than 560nm.
かかる混晶エピタキシヤルウエハはGaP、
GaAs、Si、Ge等の単結晶基板上に上記混晶をエ
ピタキシヤル成長させて製造される。しかしなが
ら、この場合、基板に用いられる単結晶と上記
GaAs1-xPx混晶とは格子定数が異なるので、それ
に伴なう転位その他の結晶欠陥の発生を防止する
目的で、基板と所望の混晶率を有する混晶率一定
層の間に混晶率変化層が設けられる。これは第1
図に示したGaAs1-xPx混晶エピタキシヤルウエハ
の縦断面模型図によつて説明する。 Such mixed crystal epitaxial wafers include GaP,
It is manufactured by epitaxially growing the above-mentioned mixed crystal on a single crystal substrate of GaAs, Si, Ge, etc. However, in this case, the single crystal used for the substrate and the above
Since the lattice constant is different from that of GaAs 1-x P A mixed crystal ratio changing layer is provided. This is the first
This will be explained using a vertical cross-sectional model diagram of a GaAs 1-x P x mixed crystal epitaxial wafer shown in the figure.
なお、本明細書において、混晶率とはりん化ひ
化ガリウムをGaAs1-xPx(0<x<1)と表わし
た場合のxの値をいう。 In this specification, the mixed crystal ratio refers to the value of x when gallium arsenide phosphide is expressed as GaAs 1-x P x (0<x<1).
第1図において、1は単結晶基板、2は基板1
上に形成された混晶率変化層、3は混晶率一定層
である。単結晶基板1としてGaPを用いた場合、
混晶率変化層2の混晶率はGaPからGaAs1-xPxま
で、すなわち、xが1から所望のxの値まで徐々
に変化させる。 In FIG. 1, 1 is a single crystal substrate, 2 is a substrate 1
The mixed crystal percentage variable layer 3 formed above is a constant mixed crystal percentage layer. When GaP is used as the single crystal substrate 1,
The mixed crystal percentage of the mixed crystal percentage change layer 2 is gradually changed from GaP to GaAs 1-x P x , that is, x is gradually changed from 1 to a desired value of x.
従来、りん化ひ化ガリウム混晶エピタキシヤル
ウエハの混晶率変化層2における混晶率xの厚さ
に対する変化率、すなわち、△x/△l(△l;
厚さ、△x;混晶率の変化量)は一定とするのが
一般的であつた。 Conventionally, the rate of change of the mixed crystal ratio x in the mixed crystal ratio change layer 2 of a gallium phosphide arsenide mixed crystal epitaxial wafer with respect to the thickness, that is, △x/△l (△l;
Generally, the thickness (Δx; amount of change in mixed crystal percentage) was kept constant.
本発明者等は、りん化ひ化ガリウム混晶エピタ
キシヤルウエハを用いた発光ダイオードの輝度を
さらに向上させることを目的として鋭意研究を重
ねた結果、混晶率変化層2の基板1に接する側の
△x/△lを混晶率変化層2の全領域における△
x/△lの平均値よりも小さくし、かつ、層2内
に混晶率一定層を少なくとも1つ形成することよ
り、発光ダイオード輝度低下の原因となる各種の
結晶欠陥を減少できることを見出し本発明に到達
したものである。本発明の上記の目的は単結晶基
板1、上記基板1上に形成されたりん化ひ化ガリ
ウム混晶率変化層2、及び上記層2上に形成され
たりん化ひ化ガリウム混晶率一定層3からなるり
ん化ひ化ガリウム混晶エピタキシヤルウエハにお
いて、層2が、混晶率が一定の層を少なくとも1
つ該層中に有し、かつ、基板1と層2の界面から
層2の全厚みの1/10から3/4の厚さに相当する領
域における上記混晶率の厚さに対する変化率が、
層2の全領域における上記混晶率の厚さに対する
変化率の平均値よりも小さいウエハによつて達せ
られる。混晶率変化層2の全領域における平均値
とは、層2と基板1との界面近傍におけるxの値
と層2と層3との界面近傍におけるxの値の差△
xを層2の全厚さで除した値をいう。単結晶基板
1としてGaPまたはGaAsが好ましく、Siまたは
Geも用いることができる。基板1の面方位は
{100}面または{100}面に対して10゜以内の傾き
を有する面が好ましい。層2は基板1上に形成さ
れる。層2の厚さは30〜100μmが好ましい。層2
の混晶率は基板1と適合する混晶率から層3の混
晶率まで徐徐に変化させる。本発明に係るエピタ
キシヤルウエハにおいては、混晶率の厚さに対す
る変化率△x/△lを層2の成長の初期、すなわ
ち、基板1に近い領域で小さく、層3に近い領域
では大とする。すなわち、基板1と層2との界面
から、層2の全厚さの1/10〜3/4の厚さに相当す
る領域好ましくは1/3〜1/2に相当する領域におけ
る△x/△lを層2における△x/△lの平均値
よりも小さい値、好ましくは上記平均値の3/4〜
1/10、よりも好ましくは3/4〜5/10の値にする。
上記変化率を小さくする領域が、層2の全厚みの
1/10未満であつても、また3/4を超えても本発明
の効果が発揮されないので好ましくない。 As a result of intensive research aimed at further improving the brightness of a light emitting diode using a gallium arsenide phosphide mixed crystal epitaxial wafer, the inventors of the present invention discovered that the side of the variable crystal content layer 2 in contact with the substrate 1 △x/△l of △
The authors discovered that by making x/△l smaller than the average value and forming at least one layer with a constant mixed crystal content in layer 2, it is possible to reduce various crystal defects that cause a reduction in the brightness of the light emitting diode. This invention has been achieved. The above-mentioned objects of the present invention include a single crystal substrate 1, a gallium phosphide arsenide mixed crystal ratio variable layer 2 formed on the substrate 1, and a constant gallium phosphide arsenide mixed crystal ratio formed on the layer 2. In a gallium phosphide arsenide mixed crystal epitaxial wafer consisting of layer 3, layer 2 comprises at least one layer having a constant mixed crystal percentage.
The rate of change of the above-mentioned mixed crystal percentage with respect to the thickness in the layer and in a region corresponding to 1/10 to 3/4 of the total thickness of layer 2 from the interface between substrate 1 and layer 2 is ,
This is achieved by using a wafer in which the rate of change of the mixed crystal content with respect to the thickness in the entire region of layer 2 is smaller than the average value. The average value in the entire region of the mixed crystal ratio variable layer 2 is the difference △ between the value of x near the interface between layer 2 and substrate 1 and the value of x near the interface between layer 2 and layer 3.
It is the value obtained by dividing x by the total thickness of layer 2. GaP or GaAs is preferable as the single crystal substrate 1, and Si or GaAs is preferable.
Ge can also be used. The plane orientation of the substrate 1 is preferably a {100} plane or a plane having an inclination of within 10° with respect to the {100} plane. Layer 2 is formed on substrate 1 . The thickness of layer 2 is preferably 30 to 100 μm. layer 2
The mixed crystal percentage is gradually changed from the mixed crystal percentage compatible with the substrate 1 to the mixed crystal percentage of the layer 3. In the epitaxial wafer according to the present invention, the rate of change of the mixed crystal ratio Δx/Δl with respect to the thickness is small in the early stage of growth of layer 2, that is, in the region close to the substrate 1, and large in the region close to the layer 3. do. That is, from the interface between substrate 1 and layer 2, Δx/ in an area corresponding to 1/10 to 3/4 of the total thickness of layer 2, preferably in an area corresponding to 1/3 to 1/2 Set Δl to a value smaller than the average value of Δx/Δl in layer 2, preferably 3/4 to 3/4 of the above average value.
The value should be 1/10, more preferably 3/4 to 5/10.
It is not preferable that the region in which the rate of change is reduced is less than 1/10 of the total thickness of layer 2, or even if it exceeds 3/4, since the effects of the present invention will not be exhibited.
層2上に形成される層3の混晶率は所望の発光
波長によつて決定される。例えば、橙色発光ダイ
オード用のエピウエハを製造する場合はx=0.65
で一定である層を形成する。層3中にpn接合が
形成される。混晶率xが0.45以上であるりん化ひ
化ガリウムは間接遷移型であるので必要に応じて
アイソエレクトロニツクトラツプとして窒素をド
ープするのが好ましい。層3の厚さは50〜100μm
程度が好ましい。層2及び層3は、通気は気相成
長方法によつて形成される。層2における混晶率
の変化は段階的、すなわち、層2中に少なくとも
1つ混晶率一定の層を形成するのがよい。段階的
に行なう場合は特開昭56−96384号公報記載の方
法によるのが好ましい。 The mixed crystal content of layer 3 formed on layer 2 is determined by the desired emission wavelength. For example, when manufacturing epitaxial wafers for orange light emitting diodes, x=0.65
form a constant layer. A pn junction is formed in layer 3. Since gallium arsenide phosphide having a mixed crystal ratio x of 0.45 or more is of indirect transition type, it is preferable to dope it with nitrogen as an isoelectronic trap if necessary. The thickness of layer 3 is 50-100μm
degree is preferred. Layer 2 and layer 3 are formed by a vapor deposition method. It is preferable that the change in the mixed crystal percentage in the layer 2 is gradual, that is, at least one layer in which the mixed crystal percentage is constant is formed in the layer 2. When carrying out stepwise, it is preferable to use the method described in JP-A-56-96384.
本発明に係るエピタキシヤルウエハを用いて製
造した発光ダイオードの輝度は、従来の発光タイ
オード、すなわち、混晶率の厚さに対する変化率
を一定にし、かつ、混晶率を連続的に変化させた
発光ダイオードに比較して1.8倍またはそれ以上
の高輝度である。 The brightness of the light emitting diode manufactured using the epitaxial wafer according to the present invention is different from that of the conventional light emitting diode, that is, the rate of change of the mixed crystal percentage with respect to the thickness is constant, and the mixed crystal percentage is continuously changed. The brightness is 1.8 times or more compared to light emitting diodes.
本発明を実施例に基づいて具体的に説明する。 The present invention will be specifically explained based on examples.
実施例
n型不純物として硫黄(S)が2×1017原子個/cm3
添加され、結晶学的面方位が(100)面より<110
>方向に約6゜偏位した面を有するGaP単結晶基板
を用意した。GaPは単結晶基板は、初め約360μm
の厚さであつたが、有機溶媒による脱脂工程に引
き続いた機械−化学的研磨(Mechahical−
Chemical Polishing)処理により、270μmの厚
さとなつた。Example: 2×10 17 atoms/cm 3 of sulfur (S) as n-type impurity
is added, and the crystallographic plane orientation is <110 from the (100) plane.
A GaP single crystal substrate with a plane deviated by about 6° in the > direction was prepared. GaP is a single crystal substrate with an initial thickness of approximately 360 μm.
However, after degreasing using an organic solvent, mechanical polishing (mechanical-chemical polishing)
The thickness was reduced to 270 μm by chemical polishing.
次に内径70mm、長さ100cmの水平型石英エピタ
キシヤル・リアクター内の所定の場所にそれぞれ
前記研磨済みGaP単結晶基板並びに高純度Ga入
り石英ボートをセツトした。エピタキシヤル・リ
アクター内にアルゴン(Ar)を導入し、空気を
充分置換除去し、次に、キヤリヤーガスとしての
高純度水素ガス(H2)を毎分2500cc導入し、Ar
の流れを止め昇温工程に入つた。前記Ga入り石
英ボートセツト領域並びにGaP単結晶基板セツト
領域の温度がそれぞれ760℃並びに950℃に保持さ
れていることを確認後、橙色発光ダイオード用エ
ピタキシヤル多層膜GaAs0.35P0.65の気相成長を開
始した。 Next, the polished GaP single crystal substrate and the high-purity Ga-containing quartz boat were set at predetermined locations in a horizontal quartz epitaxial reactor with an inner diameter of 70 mm and a length of 100 cm. Argon (Ar) was introduced into the epitaxial reactor to sufficiently replace and remove air, then 2500 cc/min of high-purity hydrogen gas (H 2 ) as a carrier gas was introduced, and the Ar
The flow of water was stopped and the temperature rising process started. After confirming that the temperatures of the Ga-containing quartz boat set region and the GaP single crystal substrate set region were maintained at 760°C and 950°C, respectively, vapor phase growth of an epitaxial multilayer film GaAs 0.35 P 0.65 for an orange light emitting diode was started. did.
気相成長開始時より、濃度30ppmに窒素ガスで
希釈したn型不純物である硫化水素(H2S)を毎
分10c.c.導入し、一方族成分として高純度塩化水
素ガス(HCl)を毎分40c.c.導入し、Gaと反応さ
せることにより、ほゞ100%GaClに変換生成さ
せ、他方H2で希釈された濃度12%の燐化水素
(PH3)を毎分220c.c.導入し、初めの10分間は成長
温度(基板温度に相当)を950℃に保持しつゝ、
GaP単結晶基板上にGaPエピタキシヤル層を形成
し、引続き10分間各ガスの流量を変える事なく、
成長温度のみ950℃から930℃まで徐々に降下させ
つゝGaPエピタキシヤル層を形成した。(以上を
第1層とする。)
次の20分間は、成長温度を930℃一定に保持し
つゝ、H2で希釈された濃度12%の砒化水素
(AsH3)を毎分0c.c.より20c.c.まで徐々に導入し、
上記各ガス流と共に第2のGaAs1-xPxエピタキシ
ヤル層を第1のエピタキシヤル層上に形成した。 From the start of vapor phase growth, hydrogen sulfide (H 2 S), an n-type impurity diluted with nitrogen gas to a concentration of 30 ppm, was introduced at 10 c.c./min, and high-purity hydrogen chloride gas (HCl) was introduced as a monogroup component. By introducing 40 c.c. per minute and reacting with Ga, it is converted to almost 100% GaCl. On the other hand, hydrogen phosphide (PH 3 ) with a concentration of 12% diluted with H 2 is introduced at 220 c.c. per minute. The growth temperature (corresponding to the substrate temperature) was maintained at 950°C for the first 10 minutes.
A GaP epitaxial layer was formed on a GaP single crystal substrate, and the flow rate of each gas was kept unchanged for 10 minutes.
A GaP epitaxial layer was formed by gradually decreasing the growth temperature from 950°C to 930°C. (The above is considered the first layer.) For the next 20 minutes, while keeping the growth temperature constant at 930°C, hydrogen arsenide (AsH 3 ) diluted with H 2 at a concentration of 12% was added at a rate of 0c.c per minute. Gradually introduced from . to 20c.c.
A second GaAs 1-x P x epitaxial layer was formed on the first epitaxial layer with each of the above gas flows.
次の10分間は、各ガスの流量を変える事なく、
即ち、H2,H2S,HCl,PH3並びにAsH3をそれ
ぞれ毎分2500c.c.、10c.c.、40c.c.、220c.c.並びに20c
.c.
導入しつゝ、成長温度を930℃より910℃まで徐々
に降下させ、第3のGaAs1-xPxエピタキシヤル層
を、第2のエピタキシヤル層上に形成した。 For the next 10 minutes, without changing the flow rate of each gas,
That is, H 2 , H 2 S, HCl, PH 3 and AsH 3 at 2500 c.c., 10 c.c., 40 c.c., 220 c.c. and 20 c./min, respectively.
.c.
During the introduction, the growth temperature was gradually lowered from 930° C. to 910° C., and a third GaAs 1-x P x epitaxial layer was formed on the second epitaxial layer.
次の20分間は、成長温度を910℃一定に保持し、
更に、H2,H2S,HCl並びにPH3の流量をそれぞ
れ毎分2500c.c.、10c.c.、40c.c.並びに220c.c.一定に
保
持し、AsH3の流量のみを毎分20c.c.から60c.c.まで
徐々に増加させつゝ、第4のGaAs1-xPxエピタ
キシヤル層を、第3のエピタキシヤル層上に形成
した。次の10分間は、H2,H2S,HCl,PH3並び
にAsH3の流量を、それぞれ毎分2500c.c.、10c.c.、
40c.c.、220c.c.並びに60c.c.一定に保持しつゝ、成長
温度を910℃より890℃まで徐々に降下させつゝ、
第5のGaAs1-xPxエピタキシヤル層を第4のエピ
タキシヤル層上に形成した。 For the next 20 minutes, the growth temperature was kept constant at 910°C.
Furthermore, the flow rates of H 2 , H 2 S, HCl, and PH 3 were kept constant at 2500 c.c., 10 c.c., 40 c.c., and 220 c.c. per minute, respectively, and only the flow rate of AsH 3 was maintained constant. A fourth GaAs 1-x Px epitaxial layer was formed over the third epitaxial layer in increasing amounts from 20 c.c. to 60 c.c. For the next 10 minutes, the flow rates of H 2 , H 2 S, HCl, PH 3 and AsH 3 were adjusted to 2500 c.c. and 10 c.c. per minute, respectively.
While keeping 40c.c., 220c.c., and 60c.c. constant, the growth temperature was gradually lowered from 910℃ to 890℃,
A fifth GaAs 1-x P x epitaxial layer was formed on the fourth epitaxial layer.
次の20分間は、H2,H2S,HCl並びにPH3の流
量をそれぞれ毎分2500c.c.、10c.c.、40c.c.並びに220
c.c.一定に保持し、又、成長温度も890℃一定に保
持しつゝ、AsH3の流量のみ毎分60c.c.より120c.c.
まで徐々に増加させ、第6のGaAs1-xPxエピタキ
シヤル層を、第5のエピタキシヤル層上に形成し
た。 For the next 20 minutes, the flow rates of H 2 , H 2 S, HCl and PH 3 were adjusted to 2500 c.c., 10 c.c., 40 c.c. and 220 c.c. per minute, respectively.
While keeping the cc constant and also keeping the growth temperature constant at 890℃, the flow rate of AsH 3 was increased from 60c.c./min to 120c.c./min.
A sixth GaAs 1-x P x epitaxial layer was formed on the fifth epitaxial layer.
次の40分間は、H2,H2S,HCl,PH3並びに
AsH3の流量を毎分それぞれ、2500c.c.、10c.c.、40
c.c.、220c.c.並びに120c.c.一定とし、更に成長温度を
890℃一定に保持し、第7のGaAs0.35P0.65エピタ
キシヤル層を、第6のエピタキシヤル層上に形成
した。 For the next 40 minutes, H 2 , H 2 S, HCl, PH 3 and
AsH 3 flow rate per minute, 2500c.c., 10c.c., 40c., respectively
cc, 220c.c. and 120c.c. were kept constant, and the growth temperature was
A seventh GaAs 0.35 P 0.65 epitaxial layer was formed on the sixth epitaxial layer while keeping the temperature constant at 890°C.
最終の40分間は、第7のエピタキシヤル層形成
条件に加え、新らたに高純度NH3ガスを毎分200
c.c.導入し、窒素(N)をアイソ・エレクトロニツク・
トラツプとしてドープした第8のGaAs1-xPxエピ
タキシヤル層を第7のエピタキシヤル層上に形成
し、エピタキシヤルウエハの全形成工程を終了し
た。 For the final 40 minutes, in addition to the seventh epitaxial layer formation conditions, high-purity NH 3 gas was added at a rate of 200 per minute.
cc is introduced and nitrogen (N) is isoelectronically
An eighth trap-doped GaAs 1-x P x epitaxial layer was formed on the seventh epitaxial layer, completing the entire epitaxial wafer formation process.
上記エピタキシヤルウエハにおいては第1から
第6のエピタキシヤル層までが混晶率変化層(第
1図における層2)であつてその全厚みは
42.4μm、最初の30.3μmの領域での混晶率の変化
率は平均の変化率の7/10であつた。 In the above epitaxial wafer, the first to sixth epitaxial layers are layers with variable crystal content (layer 2 in Figure 1), and the total thickness is
The rate of change in the mixed crystal percentage in the region of 42.4 μm and the first 30.3 μm was 7/10 of the average rate of change.
また、第7及び第8のエピタキシヤル層が混晶
率一定層(第1図層3)であつて、その厚みは
43.4μm、混晶率xは0.65であつた。 Further, the seventh and eighth epitaxial layers are constant-mixing-crystal-concentration layers (layer 3 in Figure 1), and the thickness thereof is
The diameter was 43.4 μm, and the mixed crystal ratio x was 0.65.
又、n型キヤリヤー濃度は、第1乃至第7のエ
ピタキシヤル層領域で概ね6×1016cm-3、窒素が
添加された第8のエピタキシヤル層領域で、2.4
×1016cm-3であつた。次に上述のエピタキシヤル
膜を有したエピタキシヤル層・ウエハーを用い、
橙色発光ダイオードを作成し、輝度値を実測し
た。 Further, the n-type carrier concentration is approximately 6×10 16 cm -3 in the first to seventh epitaxial layer regions, and 2.4 in the eighth epitaxial layer region doped with nitrogen.
It was ×10 16 cm -3 . Next, using the epitaxial layer/wafer having the epitaxial film described above,
We created an orange light emitting diode and measured its brightness.
即ち、該エピタキシヤルウエハをp形不純物と
しての砒化亜鉛ZnAs225mgと共に高純度石英アン
プル中に真空封入し、温度720℃で不純物拡散を
行つた。得られたpn接合深さは表面より4.3μmで
あつた。次に、得られたエピタキシヤルウエハ
を、裏面(基板)研磨工程、電極形成工程、ワイ
ヤー・ボンデイング工程等一連のデバイス製作ラ
インに投入し、橙色発光ダイオード・チツプを作
成した。 That is, the epitaxial wafer was vacuum-sealed in a high-purity quartz ampoule together with 25 mg of zinc arsenide ZnAs 2 as a p-type impurity, and the impurity was diffused at a temperature of 720°C. The depth of the pn junction obtained was 4.3 μm from the surface. Next, the obtained epitaxial wafer was put into a device manufacturing line that included a backside (substrate) polishing process, an electrode forming process, and a wire bonding process to produce an orange light emitting diode chip.
次に、該発光ダイオード・チツプ(チツプ面積
寸法及びpn接合面積寸法は、共に500μm×500μm
角)に対し、直流電流密度10A/cm2の電流を通電
し、該チツプにエポキシ樹脂コート無しの条件下
で、輝度値を測定した。 Next, the light emitting diode chip (chip area size and pn junction area size are both 500 μm x 500 μm)
A current with a DC current density of 10 A/cm 2 was applied to the chip, and the brightness value was measured under the condition that the chip was not coated with an epoxy resin.
その結果、尖頭発光波長平均632nmで、輝度値
が平均5200Ft・Lであり、従来品の約1.8倍と極
めて優れた高輝度値を本発明品が有している事が
判明した。 As a result, it was found that the product of the present invention has an extremely superior high brightness value, approximately 1.8 times that of the conventional product, with an average peak emission wavelength of 632 nm and an average brightness value of 5200 Ft·L.
比較例
(GaAs0.6P0.4エピタキシヤルウエハの製造)
n型不純物としてシリコン(Si)が1.0×1018原
子個/cm添加され、結晶学的面方位が(001)面
より〔110〕方向に2゜±0.5゜偏位した面を有する
単結晶基板を用意した。GaAs単結晶基板は初め
410μmの厚さであつたが有機溶剤による脱脂工程
に引き続き、機械−化学的研磨処理により360μm
の厚さとなつた。Comparative example (manufacture of GaAs 0.6 P 0.4 epitaxial wafer) Silicon (Si) is added as an n-type impurity at 1.0×10 18 atoms/cm, and the crystallographic plane orientation is 2 from the (001) plane to the [110] direction. A single crystal substrate having a plane deviated by ±0.5° was prepared. GaAs single crystal substrate was the first
The thickness was originally 410μm, but after degreasing with an organic solvent, it was reduced to 360μm by mechanical-chemical polishing.
It became thick and thick.
次に内径70mm、長さ1000mmの水平型石英エピタ
キシヤルリアクター内の所定の場所にそれぞれ前
記研磨済みのGaAs単結晶基板及び高純度Ga入り
石英ボートをセツトした。エピタキシヤルリアク
ター内にアルゴン(Ar)を導入し、空気を充分
置換除去し、次に、キヤリアーガスとしての高純
度水素ガス(H2)を毎分2500c.c.導入し、Arの流
れを止め昇温工程に入つた。前記Ga入り石英ボ
ートセツト領域及びGaAs単結晶基板セツト領域
の温度がそれぞれ830℃及び750℃に保持されてい
る事を確認後、GaAs0.6P0.4エピタキシヤル膜の
気相成長を開始した。 Next, the polished GaAs single crystal substrate and the high-purity Ga-containing quartz boat were set at predetermined locations in a horizontal quartz epitaxial reactor with an inner diameter of 70 mm and a length of 1000 mm. Argon (Ar) was introduced into the epitaxial reactor to sufficiently replace and remove air, and then high-purity hydrogen gas (H 2 ) was introduced as a carrier gas at 2500 c.c./min to stop the flow of Ar. We have started the heating process. After confirming that the temperatures of the Ga-containing quartz boat set region and the GaAs single crystal substrate set region were maintained at 830° C. and 750° C., respectively, vapor phase growth of a GaAs 0.6 P 0.4 epitaxial film was started.
まずGaAs0.6P0.4エピタキシヤル層の形成に先
立ち、侵蝕性気体である高純度塩化水素ガス
(HCl)を毎分90c.c.と大量に5分間導入し、上記
GaAs単結晶基板表面を侵蝕した。次に上記基板
侵蝕用HClの供給を止め、GaAs0.6P0.4エピタキ
シヤル層の形成を図つた。 First, prior to forming the GaAs 0.6 P 0.4 epitaxial layer, high-purity hydrogen chloride gas (HCl), which is an corrosive gas, was introduced for 5 minutes at a rate of 90 c.c. per minute.
The surface of the GaAs single crystal substrate was eroded. Next, the supply of HCl for substrate erosion was stopped, and a GaAs 0.6 P 0.4 epitaxial layer was formed.
即ち、H2ガスで濃度10ppmに希釈したジエチ
ル・テルル{(C2H5)2Te}ガスを毎分15c.c.導入
し、上記基板侵蝕用気体流(HCl)とほぼ同一方
向に、エピタキシヤル層形成用第b族成分気体
としてHClを毎分18c.c.石英ボート中のGaに導入
し、Gaと反応させることによりGaClを生成さ
せ、他方エピタキシヤル層形成用第b族成分気
体としてH2で希釈した濃度10%のひ化水素
(AsH3)の流量を初めの53分間、毎分336c.c.より
304c.c.に連続的に減少させ、また、同時に、H2で
濃度10%に希釈したPH3の流量を毎分0c.c.から32
c.c.まで連続的に増加させた。次の27分間はAsH3
の流量を毎分304c.c.から252c.c.に連続的に減少さ
せ、PH3の流量を毎分32c.c.から80c.c.に連続的に増
加させGaAs1-xPx混晶率変化層(xが0から0.4
まで徐々に増大するエピタキシヤル層)を形成
し、以後GaAs1-xPx(x=0.4)組成一定層の形成
に移行した。即ち次の60分間は上記
(C2H5)2Te,Gaに接触させるHCl,AsH3及び
PH3をそれぞれ15c.c.、18c.c.、252c.c.及び80c.c.と一
定量導入しながらGaAs0.6P0.4組成一定層を成長
させたエピタキシヤルウエハーの形成を終了し
た。 That is, diethyl tellurium {(C 2 H 5 ) 2 Te} gas diluted with H 2 gas to a concentration of 10 ppm was introduced at 15 c.c./min in approximately the same direction as the substrate-eroding gas flow (HCl). HCl is introduced into Ga in the quartz boat at 18 c.c. per minute as a Group B component gas for forming an epitaxial layer, and GaCl is generated by reacting with Ga, while HCl is used as a Group B component gas for forming an epitaxial layer. The flow rate of hydrogen arsenide (AsH 3 ) at a concentration of 10% diluted with H 2 was from 336 c.c. per minute for the first 53 minutes.
304 c.c. and at the same time the flow rate of PH 3 diluted with H 2 to a concentration of 10% was increased from 0 c.c. to 32 c.c. per minute.
Continuously increased up to cc. AsH 3 for next 27 minutes
The flow rate of GaAs 1-x P x mixture was continuously decreased from 304 c.c. to 252 c.c. Crystal rate change layer (x from 0 to 0.4
After that, a GaAs 1-x P x (x=0.4) constant composition layer was formed. That is, for the next 60 minutes, the above (C 2 H 5 ) 2 Te, HCl, AsH 3 and
The formation of epitaxial wafers in which GaAs 0.6 P 0.4 constant composition layers were grown while introducing PH 3 in fixed amounts of 15 c.c., 18 c.c., 252 c.c., and 80 c.c., respectively, was completed.
得られたGaAs0.6P0.4混晶エピタキシヤルウエ
ハの混晶率変化層の全厚みは平均30μm、また、
最初の19.9μmの領域での混晶率の変化率は平均
の変化率の57%であつた。 The total thickness of the mixed crystal ratio change layer of the obtained GaAs 0.6 P 0.4 mixed crystal epitaxial wafer was 30 μm on average, and
The rate of change in the mixed crystal percentage in the first 19.9 μm region was 57% of the average rate of change.
得られたGaAs0.6P0.4混晶エピタキシヤルウエ
ハを用いて実施例1と同様にして発光ダイオード
を作製した。尖頭発光波長655nm輝度はエポキシ
コートなし、直流電流密度10A/cm2、発光部直径
331μmで1200Ft・Lであつて、従来の発光ダイオ
ードの1.5倍であつた。 A light emitting diode was produced in the same manner as in Example 1 using the obtained GaAs 0.6 P 0.4 mixed crystal epitaxial wafer. Peak emission wavelength 655nm brightness without epoxy coating, DC current density 10A/cm 2 , emission part diameter
It was 331 μm and 1200 Ft·L, which was 1.5 times that of conventional light emitting diodes.
第1図はGaAs1-xPx混晶エピタキシヤルウエハ
の縦断面模型図である。
1……単結晶基板、2……混晶率変化層、3…
…混晶率一定層。
FIG. 1 is a vertical cross-sectional model diagram of a GaAs 1-x P x mixed crystal epitaxial wafer. DESCRIPTION OF SYMBOLS 1... Single crystal substrate, 2... Mixed crystal ratio change layer, 3...
...Constant mixed crystal ratio layer.
Claims (1)
ん化ひ化ガリウム混晶率変化層2、及び上記層2
上に形成されたりん化ひ化ガリウム混晶率一定層
3からなるりん化ひ化ガリウム混晶エピタキシヤ
ルウエハにおいて、層2が、混晶率が一定の層を
少なくとも1つ該層中に有し、かつ、基板1と層
2の界面から層2の全厚みの1/10から3/4の厚さ
に相当する領域における上記混晶率の厚さに対す
る変化率が、層2の全領域における上記混晶率の
厚さに対する変化率の平均値よりも小さいことを
特徴とするウエハ。1 a single crystal substrate 1, a gallium phosphide arsenide mixed crystal ratio variable layer 2 formed on the substrate 1, and the layer 2
In the gallium phosphide arsenide mixed crystal epitaxial wafer formed on top of the gallium phosphide arsenide mixed crystal layer 3 having a constant mixed crystal content, the layer 2 includes at least one layer having a constant mixed crystal content. And, the rate of change of the above-mentioned mixed crystal percentage with respect to the thickness in a region corresponding to 1/10 to 3/4 of the total thickness of layer 2 from the interface between substrate 1 and layer 2 is A wafer characterized in that the rate of change of the mixed crystal percentage with respect to thickness is smaller than the average value of the rate of change with respect to the thickness of the wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59008219A JPS60155598A (en) | 1984-01-20 | 1984-01-20 | Epitaxial wafer of mixed crystal of gallium phosphide arsenide |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59008219A JPS60155598A (en) | 1984-01-20 | 1984-01-20 | Epitaxial wafer of mixed crystal of gallium phosphide arsenide |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60155598A JPS60155598A (en) | 1985-08-15 |
| JPH0465036B2 true JPH0465036B2 (en) | 1992-10-16 |
Family
ID=11687091
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59008219A Granted JPS60155598A (en) | 1984-01-20 | 1984-01-20 | Epitaxial wafer of mixed crystal of gallium phosphide arsenide |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60155598A (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5117375A (en) * | 1974-08-03 | 1976-02-12 | Daiichi Lace Kk | Setsuchakushinjino seizohoho |
-
1984
- 1984-01-20 JP JP59008219A patent/JPS60155598A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60155598A (en) | 1985-08-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4378259A (en) | Method for producing mixed crystal wafer using special temperature control for preliminary gradient and constant layer deposition suitable for fabricating light-emitting diode | |
| USRE29845E (en) | GaAs1-x Px electroluminescent device doped with isoelectronic impurities | |
| US4001056A (en) | Epitaxial deposition of iii-v compounds containing isoelectronic impurities | |
| US4216484A (en) | Method of manufacturing electroluminescent compound semiconductor wafer | |
| US4987472A (en) | Compound semiconductor epitaxial wafer | |
| US4252576A (en) | Epitaxial wafer for use in production of light emitting diode | |
| US5445897A (en) | Epitaxial wafer and process for producing the same | |
| JP3143040B2 (en) | Epitaxial wafer and method for manufacturing the same | |
| US4218270A (en) | Method of fabricating electroluminescent element utilizing multi-stage epitaxial deposition and substrate removal techniques | |
| JP3146874B2 (en) | Light emitting diode | |
| KR100210758B1 (en) | Epitaxial wafer and process for producing the same | |
| JPH0465036B2 (en) | ||
| JPS61106497A (en) | Method for growing epitaxial film of gallium phosphide and arsenide | |
| JP4024965B2 (en) | Epitaxial wafer and light emitting diode | |
| JP3111644B2 (en) | Gallium arsenide arsenide epitaxial wafer | |
| JPH04328878A (en) | Manufacture of light emitting diode epitaxial wafer | |
| USRE29648E (en) | Process for the preparation of electroluminescent III-V materials containing isoelectronic impurities | |
| JPS5843898B2 (en) | Vapor phase growth method for compound semiconductor single crystal thin films | |
| JPS58115818A (en) | Growing method of silicon carbide epitaxial film | |
| JPH0719747B2 (en) | Epitaxy wafer | |
| JPH0219619B2 (en) | ||
| JPH079883B2 (en) | Method of manufacturing epitaxial wafer | |
| JPS6012794B2 (en) | Method for producing electroluminescent material | |
| JP2001036133A (en) | Epitaxial wafer and light emitting diode | |
| JPS6158971B2 (en) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |