JPH0468653B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is a method of drawing a figure or the like on a tablet board by sequentially detecting the position of the stylus on the tablet board. The present invention relates to a position detection device suitable for use as a component of a portion including a tablet board and a stylus in a graphic display device, graphic creation device, etc. that is capable of obtaining data.

BACKGROUND TECHNOLOGY AND PROBLEMS The above-mentioned position detection device has a position detection plate constituting a tablet plate and a stylus whose position on the position detection plate is detected. It has been proposed that the position of the stylus is detected using an electrostatic method.

In such a position detection device, for example, the position detection plate constituting the tablet board is made up of a plurality of strip conductors arranged at regular intervals, and the strip conductors are connected at regular intervals. A constant voltage is supplied sequentially in the order of the array, and the stylus
It consists of a voltage detection means that generates an output signal according to the position of the strip conductor to which voltage is applied, and the output signal of the voltage detection means that makes up the stylus is used to detect the position of the voltage detection means that makes up the tablet board. The positions of the plurality of strip conductors on the plate in the arrangement direction are detected.

Specifically, the voltage detection means is constructed with an electrode grounded through a fixed capacitor, and the magnitude of the voltage detected by this electrode is determined by the voltage detection means of the strip conductor to which the voltage is applied. When a constant voltage is sequentially supplied to a plurality of strip conductors in the order of their arrangement at constant time intervals as a function of their position, the detected output signal from the voltage detection means is When the voltage is applied to the strip conductor closest to the voltage detection means, the voltage changes stepwise and takes the maximum level, and the overall level goes from zero to a certain positive value, for example, and this positive value It will return to zero again. Then, from the point in time when voltage is first supplied to a reference strip conductor placed at one end, the level of the output signal obtained when the detection output signal of this voltage detection means passes through a predetermined bandpass filter is determined. When a certain level is reached, or
The time required to cross a specific level thereafter corresponds to the position of the plurality of strip conductors on the position detection plate of the voltage detection means in the arrangement direction. Therefore, the detection output signal from this voltage detection means is processed appropriately to form a position detection signal corresponding to the above-mentioned required time, and based on this position detection signal, the position detection of the voltage detection means is performed. The positions of the plurality of strip conductors on the plate in the arrangement direction are detected.

In such a position detecting device, a plurality of strip conductors on the position detecting plate, for example,
The voltage detecting means is arranged in the X direction and the Y direction, respectively, and the position in the X direction and the position in the Y direction on the position detection plate of the voltage detection means are sequentially detected. Therefore, when the voltage detection means on the position detection plate is located, for example, at the terminal end in the X direction and the start end in the Y direction, an output signal corresponding to the position in the X direction can be obtained from the bandpass filter. After that, an output signal corresponding to the position in the Y direction is obtained in a very short time, and as a result, the
The ringing component of the output signal corresponding to the position in the direction affects the next output signal corresponding to the position in the Y direction, resulting in a state where the position detection accuracy is likely to decrease.
Therefore, even in the above-mentioned situation, in order to prevent any inconvenience caused by the ringing component of the output signal from the bandpass filter, the Y
The position measurement interval in each direction is set to obtain an output signal according to the position in the direction, but in this case, the number of measurement points detected as a result of position measurement in both the X and Y directions within a predetermined time can be set In order to increase the sampling rate in position measurement as much as possible, the position measurement interval in each direction is set such that the above-mentioned ringing component does not cause problems.
And it is made to be as short as possible.

With the position measurement interval set in this way,
The position of the voltage detecting means on the position detecting plate is detected. For example, when detecting the position, the voltage detecting means is brought into forceful contact with the position detecting plate and receives a shock, or the voltage detecting means is If static electricity charged on the position detection plate is discharged while moving on the detection plate, noise will occur in the detection output signal from the voltage detection means, and as a result, the bandpass filter will The resulting output signal is accompanied by a noise component in the form of a ringing component with a relatively large amplitude that continues for a relatively long time, and this noise component acts on the output signal from the subsequent bandpass filter, There is a possibility that an appropriate position detection signal cannot be obtained. For example, an output signal corresponding to the position in the X direction obtained from a bandpass filter during the measurement period of the position in the X direction is accompanied by a noise component in the form of a ringing component that continues with a relatively large amplitude, and The output signal corresponding to the position in the Y direction obtained during the measurement period of the position will be affected by this noise component and will not become a regular output signal, making it impossible to perform proper position detection in the Y direction. be.

Purpose of the Invention In view of the above, the present invention provides the following advantages: When a constant voltage is sequentially supplied to the plurality of strip conductors of the position detection plate,
When the voltage of each strip conductor is detected by the voltage detection means and a detection output signal is obtained from the voltage detection means, and a position detection output is obtained based on this detection output signal, the sampling rate in position detection is reduced. To provide a position detection device capable of preventing an incorrect position detection output from being obtained due to the influence of noise when noise occurs in a detection output signal from a voltage detection means without causing any interference. purpose.

Summary of the Invention A position detection device according to the present invention includes a position detection plate in which a plurality of strip conductors are arranged in parallel at predetermined intervals, and a predetermined voltage is sequentially supplied to these strip conductors at predetermined time intervals. a voltage detecting means that generates a detection output signal corresponding to the position of one of the plurality of strip conductors to which a voltage is applied when placed on the position detection plate; A signal extraction means having a bandpass filter characteristic for extracting a signal component, and a point in time when the output signal of the signal extraction means reaches a predetermined level from a reference point in relation to the voltage supply to the plurality of strip conductors, or after a specific point in time. A count circuit that counts the time up to the point when the level is crossed, and position data generation that obtains a position detection output that represents the position on the position detection plate of the voltage detection means based on the time data counted by this count circuit. In addition to having a department,
A noise detection period corresponding to the bandpass filter characteristics of the signal extraction means is set immediately before the above-mentioned reference time, and when the level of the noise component included in the output signal of the signal extraction means is equal to or higher than a predetermined level during this noise detection period. is provided with a control means for preventing the position detection output from being obtained from the position data generating section.

In this way, a noise detection period corresponding to the bandpass filter characteristics of the signal extraction means is set immediately before the period in which the count circuit performs counting to obtain the data that is the source of the position detection output, and during this noise detection period, Since the position detection output is obtained only when the level of the noise component in the output signal of the signal extraction means does not reach a predetermined level and does not substantially cause any inconvenience,
The position detection output obtained is always appropriate,
Correct position detection can be performed without reducing the sampling rate.

Embodiment FIG. 1 shows an example of a position detection device according to the present invention, in which a position detection plate 10 constituting a tablet board has strip conductors Y ₁ , Y ₂ , . . . on an insulating layer 11.
Y _n are arranged in parallel at regular intervals, and
On the insulating layer 12 deposited on this insulating layer 11, strip conductors X ₁ , X ₂ , . . . perpendicular to the strip conductors Y ₁ to _{Y n} are formed.
The structure is such that X _o are arranged in parallel at regular intervals, and an insulating layer is further deposited on the insulating layer 12 (not shown).

_{Switches 32 1 , 32 2 ,}
...32 _o and switches 34 ₁ , 34 ₂ , ...34 _n
is provided. Then, within a certain period, the output terminals N ₁ ,
Pulse signals are sequentially supplied from N ₂ , ...N _o to the switches 32 ₁ to 32 _o at fixed time intervals, and the switches 32 ₁ to 32 _o sequentially switch from the terminal A side to the terminal B side at fixed time intervals. As a result, the power terminals 3 are sequentially connected to the strip conductors X ₁ to _{X o} at regular intervals.
A constant positive voltage +Vcc of 5 is applied. In addition, within another fixed period, similarly, output terminals M ₁ , M ₂ , . . . M _n of the shift register 33 are connected to switches 34 ₁ to ₃₄
The switches 34 ₁ to 34 _n are sequentially switched from the terminal A side to the terminal B side at a certain time interval by sequentially supplying pulse signals to the strip conductors Y ₁ to _{Y n} at regular time intervals. A constant positive voltage +Vcc is sequentially applied from the power supply terminal 35 at constant time intervals.

On the other hand, a basic clock pulse Co of, for example, 2400 kHz is obtained from the clock pulse generation circuit 41, and this clock pulse Co is supplied to a frequency dividing circuit 42 where the frequency is divided.
A clock pulse Cs as shown in the figure is obtained,
This clock pulse Cs is supplied to shift register 31 and shift register 33 as respective shift pulses.

Further, as shown in FIG. 2, a reference synchronization signal Hbs whose pulse width is equal to one cycle of the clock pulse Cs obtained from the frequency dividing circuit 42 at a constant period is supplied to the delay circuit 48 through the terminal 43, and the delay circuit 48, the reference synchronization signal as shown in FIG.
Synchronous signal obtained by delaying Hbs by time T ₁
Hs is sent. This synchronizing signal Hs is supplied to the data terminal D of the D flip-flop circuit 44, and the clock pulse obtained from the frequency dividing circuit 42 is
Cs is supplied to the clock terminal CK of the D flip-flop circuit 44, and as shown in FIG. A signal St that falls at the rising edge immediately after the trailing edge of the synchronizing signal Hs is obtained. Furthermore, the synchronizing signal Hs from the delay circuit 48 is supplied to the T flip-flop circuit 45, and as shown in FIG. A signal Sx that becomes high level and becomes low level in every other remaining period Ty, and a signal Sy that is inverted with respect to the signal Sx are obtained.

Then, the signal St obtained from the D flip-flop circuit 44 and the signal Sx obtained from the T flip-flop circuit 45 are supplied to an AND gate circuit 46, and the signal St in the period Tx is taken out. The extracted signal Stx as shown in FIG. 2 is supplied to the shift register 31 as its start pulse. Similarly, the signal St obtained from the D flip-flop circuit 44 and the signal Sy obtained from the T flip-flop circuit 45
is supplied to the AND gate circuit 47, and the signal St
The one in period Ty is extracted, and the extracted signal Sty as shown in FIG. 2 is supplied to the shift register 33 as its start pulse.

Therefore, in every other period Tx, as _shown in _FIG . Pulse signals Px ₁ , Px ₂ , . . . Px _o having pulse widths are obtained sequentially at a time interval of one period of the clock pulse Cs,
These pulse signals Px ₁ to Px _o are applied to the switches 32 ₁ , to 3
2 _o , and the strip conductors X ₁ to
The voltage +Vcc from the power supply terminal 35 is sequentially applied to X _o . In addition, in the remaining every other period Ty, pulse signals P y1 to P _y1 to M n are similarly applied to the output terminals M ₁ to _{M n} of the shift register 33 as shown in FIG.
Py _n is obtained sequentially, and the pulse signals P _y1 to Py _n are supplied to the switches 34 ₁ to 34 _n , so that the voltage +Vcc from the power supply terminal 35 is sequentially applied to the strip conductors Y ₁ to _{Y n} as described above. Given.

Voltage detection means 2 constituting a stylus for drawing figures etc. on a position detection plate 10 constituting a tablet board
0 is equipped with a detection electrode 20', and the detection electrode 20' is placed on the position detection plate 10 with its head facing the outside of the grounded shield case 21. It is grounded via a capacitor C _L that is fixed inside or formed between it and the shield case 21 .
Further, the detection electrode 20' is connected to the gate of a field effect transistor 22 inside the shield case 21, and a bias resistor Rr is connected between the gate of the transistor 22 and ground.

And the strip conductor X ₁ ~ _{X o} or the strip conductor Y ₁ ~
A voltage +Vcc is sequentially applied to Y _n at fixed time intervals, and the capacitance formed between the strip conductor to which this voltage +Vcc is applied and the detection electrode 20' changes sequentially at fixed time intervals. Accordingly, the detection electrode 2
The level of the signal voltage Vo obtained at 0' changes, and the voltage +Vcc is applied to the strip conductor X ₁ to X _o or the strip conductor Y ₁ to _{Y n} which is closest to the position of the detection electrode 20'.
is given, the level of the signal voltage Vo becomes maximum. The signal voltage Vo obtained at the detection electrode 20' is impedance-converted by the field effect transistor 22, and the tuning frequency forming the bandpass filter, that is, the center frequency of the passband, is
For example, it is supplied to a 7.5kHz tuned amplifier circuit 51.

Here, the detection electrode 20' is brought close to the position detection plate 10, and the signal voltage obtained therefrom is
When Vo is not mixed with noise of a predetermined level or higher, the tuned amplifier circuit 51 outputs signals from the tuned amplifier circuit 51 at two predetermined time points later than the time when the signal voltage Vo reaches its maximum, as shown in FIG. , a signal that has a large level peak and changes so as to cross the ground level from positive to negative is obtained as Scx in period Tx and as Scy in period Ty. These signals Scx and Scy are supplied to a Schmitt trigger circuit 52, and as shown in FIG. 2, the signals Scx and Scy go from high to low level when they exceed a certain positive voltage threshold Vs. then the signal Scx and
A signal that rises from low level to high level when Scy crosses the ground level from positive to negative
Sz is obtained.

Then, the reference synchronization signal Hbs through terminal 43 is
Set terminal S of RS flip-flop circuit 53
The signal Sz obtained from the Schmitt trigger circuit 52 is supplied to the RS flip-flop circuit 5.
It is supplied to the reset terminal R of No. 3, and rises from the RS flip-flop circuit 53 at the rising edge of the reference synchronization signal Hbs, and thereafter, for each period Tx.
Or, at Ty, the point in time when the signal Scx or Scy from the tuned amplifier circuit 51 first crosses the ground level from positive to negative after exceeding the voltage threshold Vs
A signal Gc is obtained, as shown in FIG. 2, which falls at the first rising edge of the signal Sz, which is tx or ty, as indicated by the upward arrow.

On the other hand, the pulse signal P _x2 obtained from the output terminal N ₂ of the shift register 31 or the pulse signal obtained from the output terminal M ₂ of the shift register 33
_Py2 is supplied to the set terminal S of the RS flip-flop circuit 58 via the OR gate circuit 60, and the pulse signal Pxn obtained from the output terminal Nn of the shift register 31 or the output terminal Mm of the shift register 33 is supplied to the set terminal S of the RS flip-flop circuit 58. A pulse signal Pym obtained from Pym is supplied to a delay circuit 62 via an OR gate circuit 61, and is delayed by a time _T2 to obtain a pulse signal Se as shown in FIG.
is supplied to the reset terminal R of the OR gate circuit 58. Here, the delay time in the delay circuit 62 is
T ₂ is the pulse signal Pxn in one period Tx
The signal Gc obtained when the detection electrode 20' is on the strip conductor Xn of the position detection plate 10 from the point of the leading edge of
or from the time from the rise of the pulse signal Pym to the fall of the signal Gc obtained when the detection electrode 20' is on the strip conductor Ym in one period Ty. It is made to be large and also each period
At Tx or Ty, the falling point of the pulse signal Se is set before the leading edge of the reference synchronization signal Hbs. As a result, the RS flip-flop circuit 58 outputs pulse signals P _x2 ,
Alternatively, a signal Gb as shown in FIG. 2 can be obtained, which rises at the trailing edge of P _y2 and falls at the rise of the pulse signal Se.

Then, the 2400kHz clock pulse Co obtained from the clock pulse generation circuit 41 and the signals Gc and RS obtained from the RS flip-flop circuit 53
Signal obtained from flip-flop circuit 58
Gb is supplied to the AND gate circuit 54,
A period in which both the signal Gc and the signal Gb are at high level, that is, from the time t2x of the trailing edge of the pulse signal P _x2 in the period Tx to the time tx, or the period
In the period from time t2y of the trailing edge of pulse signal P _y2 to time ty, the clock pulse
Co is extracted. Then, the synchronizing signal Hs is supplied to the clear terminal CLR of the counter 55, the counter 55 is cleared at the leading edge of the synchronizing signal Hs, and the signals Gc and RS flip-flop obtained from the RS flip-flop circuit 53 after being cleared are - During the period when both signals Gb obtained from the flop circuit 58 are at high level, the clock pulse Cc obtained from the AND gate circuit 54 is supplied to the clock terminal CK of the counter 55 and counted. As a result, the counter 55 calculates the period
In Tx, the time from time t2x to time tx is counted, and output data corresponding to this time is obtained, and in period Tx, the time from time t2y to time ty is counted, and output data corresponding to this time is obtained. Data is obtained.

Here, time t2x and time t2y are, respectively,
strip conductors X ₂ and Y ₂ in period Tx and period Ty,
That is, the voltage supply to the second of the strip conductors X ₁ to _{X o} arranged in the X direction and the second one of the strip conductors Y ₁ to _{Y n} arranged in the Y direction is terminated. , and is the reference point in time associated with the voltage supply to the strip conductors X ₁ -X _o and Y ₁ -Y _n in the period Tx and the period Ty. Then, the fall time tx of the signal Gc obtained in one period Tx when the detection electrode 20' is placed on the strip conductor _X1 is after the time t2x, and the detection electrode 2
One period when 0' is placed on the strip conductor Y ₁
Falling point ty of signal Gc obtained at Ty
is set to occur after time t2y.

Therefore, the time from time t2x to time tx in period Tx, and therefore the output data of the counter 55 corresponding to this time, is determined by the strip conductor arranged in the X direction on the position detection plate 10 of the detection electrode 20'. It depends on the distance from the reference one (first strip conductor _{X 1 )} among X ₁ to X o, that is, the position in the , Therefore, the output data of the counter 55 corresponding to this time is the reference _one ( _first distance from the strip conductor Y ₁ ), i.e.
It depends on the position in the Y direction. As a result, the counter 55 counts every other period Tx
In the period from the falling edge of the signal Gc obtained from the RS flip-flop circuit 53 in the middle of The output data indicating the content is retained, and the remaining 1
From the fall of the signal Gc obtained from the RS flip-flop circuit 53 during the second period Ty,
During the subsequent period up to the leading edge of the synchronization signal Hs, Y on the position detection plate 10 of the detection electrode 20' at that time is
Output data indicating the directional position will be held.

Also, the pulse signal Se from the delay circuit 62 is RS
The signal Sz supplied to the reset terminal R of the flip-flop circuit 56 and obtained from the Schmitt trigger circuit 52 is applied to the RS flip-flop circuit 56.
During the period in which the output data of the counter 55 is supplied to the set terminal S of the RS flip-flop circuit 56 and indicates the position of the detection electrode 20' on the position detection plate 10 in the X direction or the Y direction. A signal Da that is at a high level is obtained from time tx to ty until the fall of the signal Se.

Then, the period Tx during which the position in the X direction is detected is obtained from the T flip-flop circuit 45.
The output data of the counter 55, which is obtained from the RS flip-flop circuit 56, and the signals Sx to Sy for distinguishing the period Ty during which the position detection in the Y direction is performed, the output data of the counter 55, and the output data of the counter 55 obtained from the RS flip-flop circuit 56 are transmitted to the detection electrode 2.
A signal Da indicating a period in which the content indicates the position in the X direction or Y direction on the position detection plate 10 of 0'
is supplied to the data processing circuit 57, and the data processing circuit 57 detects the position detection plate 1 of the detection electrode 20'.
A position data output indicating the position in the X and Y directions on 0 is obtained.

In the above, the counter 55 receives the signal from the AND gate circuit 54 at the falling point of the pulse signal P _x2 or P _y2 in each period Tx or Ty determined based on the synchronization signal Hs obtained from the delay circuit 48. The period _T3 from the leading edge of the reference synchronization signal Hbs immediately before the time t2x or t2y when counting the clock pulse Cc starts is one cycle of the fundamental wave component in the signal Scx or Scy from the tuned amplifier circuit 51, that is, the tuning The delay circuit T ₁ of the delay circuit 48 is selected so as to be longer than the period corresponding to the pass band center frequency of the band pass filter characteristic of the amplifier circuit 51 .

Next, for example, during a certain period Tx, the detection electrode 20' is forcefully brought into contact with the position detection plate 10 and receives a shock, and noise of a predetermined level or higher is generated in the signal voltage Vo obtained from the detection electrode 20'. In this case, this noise causes the tuning amplifier circuit 51 to
As shown by the broken line in FIG. 2, the signal Scx from the signal Scx includes a noise component Sn appearing in the form of a ringing component with a relatively large amplitude. Then, this noise component Sn continues for a period Ty
Even when the signal Scy is obtained from the tuned amplifier circuit 51, a problem will occur if the signal Scy continues with a relatively large amplitude. Reference synchronization signal immediately before time t2y to start counting clock pulses Cc from
A noise component Sn with a relatively large amplitude exists in the period T ₃ from the leading edge of Hbs. In such a case, the noise component Sn in the period Tx is
For example, as shown in FIG. 3, the voltage threshold Vs is exceeded at time t3 within period _T3 , and the ground level is crossed from positive to negative at time t4. The signal Sz obtained _from
The signal falls from high level to low level at time t4, and then rises from low level to high level at time t4. Here, the period T ₃ is selected to be longer than the period corresponding to the passband center frequency of the bandpass filter characteristic of the tuned amplifier circuit 51, as described above.
It is longer than one period of the noise component Sn, and therefore,
Noise component Sn, regardless of its phase state,
Within period T ₃ , there is a point in time when the voltage threshold Vs is exceeded and the ground level is crossed from positive to negative. Therefore, signal Sz rises from low level to high level within period T ₃ . will have.

In this way, if there is a noise component Sn as described above in the period Tx, the signal Sz _is
Therefore, the signal Gc from the RS flip-flop circuit 53 that rises from low level to high level at the leading edge of the reference synchronization signal Hbs, that is, at the beginning of period _T3 , is shown in FIG. As shown, the signal Sz falls from a high level to a low level at time t4 when it first rises within the period _T3 , and thereafter remains at a low level until the reference synchronization signal Hbs arrives again. Therefore, the signal Gb from the RS flip-flop circuit 58, which rises from low level to high level at time _t2y at the end of period _T3 ,
When the signal Gc remains at a high level after that, the signal Gc becomes a low level, and in the period Ty following this period Tx, there is no period in which both the signals Gc and Gb are at a high level.

Therefore, in this period Ty, the counter 5
5 is not supplied with the clock pulse Cc from the AND gate circuit 54, the counter 55 does not perform a counting operation, and no output data from the counter 55 can be obtained. Therefore, in this case, the counter 55 performs a counting operation based on the signal Scy obtained during the confused period Ty due to the influence of the noise component Sn, and sends out incorrect output data. Therefore, obtaining an incorrect position data output from the data processing circuit 57 is prevented.

In the above example, the signal Scx from the tuned amplifier circuit 51 includes the noise component Sn in the period Tx, but the signal Scy from the tuned amplifier circuit 51 includes the noise component Sn in the period Ty. Even when this occurs, the counter 55 is similarly prevented from performing a counting operation during the following period Tx.

In this way, in the position detecting device according to the present invention shown in FIG. The above-mentioned period T ₃ is set as the noise detection period, and if there is a relatively large noise component Sn exceeding the voltage threshold Vs within this noise detection period T ₃ , this noise Component Sn is detected, and the position data output from the data processing circuit 57 based on the data output from the counter 55 in the period following the period _T3 is prevented from being obtained, thereby eliminating an inappropriate position detection output. It will be done. The above-mentioned RS flip-flop circuit 58 operates during the noise detection period.
If a noise component Sn exists within T ₃ , the signal Gc to be sent falls from high level to low level within period T ₃ , and then the reference synchronization signal
Until Hbs arrives, it plays the role of preventing the position data output from being obtained by keeping the low level, and therefore prevents the noise contained in the output of the tuned amplifier circuit 51 during the period _T3 which is the noise detection period. When the level of the component Sn exceeds a predetermined level, specifically, exceeds the voltage threshold Vs, a control means is formed to detect this and prevent position data output from the data processing circuit 57 from being obtained. There will be.

Furthermore, in the above case, when the noise component Sn is included in the output of the tuned amplifier circuit 51, the periods Tx and Ty are not extended to wait for the attenuation of the noise component Sn, but can be made relatively short. There is no risk that the sampling rate in position detection will be reduced.

In the above example, if a noise component of a level equal to or higher than a predetermined level is present in the output of the tuned amplifier circuit 51 within the period _T3 which is the noise detection period, the counting operation of the counter 55 is blocked. This prevents an inappropriate position detection output from being obtained, but in addition to preventing the counting operation of the counter 55 in this way, the position detection device according to the present invention also prevents noise detection. When a noise component at a level higher than a predetermined level is detected in the output of the tuned amplifier circuit 51 within the period _T3 , the data processing circuit 57 is controlled based on this detection output, and the position data output is It is possible to adopt various control modes, such as separately providing means for preventing this from occurring.

Effects of the Invention As is clear from the above description, according to the position detection device according to the present invention, when voltage is sequentially supplied to the strip conductors of the position detection plate, the position detection device detects the voltage of each strip conductor. When a signal component of a predetermined frequency extracted from a detection output signal from a voltage detection means arranged on the board includes a noise component of a predetermined level or higher, it is detected that the level of the noise component is a predetermined level or higher, Under such circumstances, the position detection output is not obtained, so the influence of noise on the position detection operation is avoided, and only the position detection output that correctly indicates the position of the voltage detection means on the position detection plate is always output. Obtainable. In particular, when the position detecting means is forcefully brought into contact with the position detecting plate and receives an impact, or when the position detecting means is moving on the position detecting plate, discharge of static electricity charged on the position detecting plate is caused. As a result, in cases where noise occurs in the detection output signal from the position detection means, the influence of noise can be avoided very effectively.

Moreover, since the detection interval of the position of the voltage detection means on the position detection plate is not extended in anticipation of attenuation of the noise component, the sampling rate in position detection can be kept sufficiently high.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration diagram showing an example of a position detection device according to the present invention, and FIGS.
FIG. 3 is a waveform diagram used to explain the operation of the example shown in the figure. In the figure, 10 is a position detection plate, 20 is a voltage detection means, 20' is a detection electrode, 31 and 33 are shift registers, 32 ₁ to 32 _o and 34 ₁ to 34 _n are switches, 48 and 62 are delay circuits, and 51 is a tuned amplifier circuit, 52 is a Schmitt trigger circuit, 53,5
6 and 58 are RS flip-flop circuits, 54
is an AND gate circuit, 55 is a counter, 57 is a data processing circuit, and X ₁ to X _o and Y ₁ to _{Y n} are strip conductors.

Claims (1)

[Claims] 1. A position detection plate in which a plurality of strip conductors are arranged in parallel at predetermined intervals, and a predetermined voltage is applied to the plurality of strip conductors in the order in which they are arranged at predetermined time intervals. a voltage detection means that, when placed on the position detection plate, generates a detection output signal according to the position of the one of the plurality of strip conductors to which the predetermined voltage is supplied; a signal extraction means having a bandpass filter characteristic for extracting a signal component of a predetermined frequency from the detection output signal; a count circuit that counts the time until the level is reached or the point when the voltage crosses a specific level; and based on the time data counted by the count circuit, a position data generating unit that obtains a position detection output representing the position of the plurality of strip conductors in the arrangement direction; and immediately before the reference time point, a noise detection period corresponding to the bandpass filter characteristics of the signal extraction means is set. and a control means for preventing a position detection output from the position data generation section from being obtained if the level of a noise component included in the output signal of the signal extraction means is higher than a predetermined level during the noise detection period. A position detection device comprising: and. 2. The position detection device according to claim 1, wherein the noise detection period is selected to be longer than the period corresponding to the passband center frequency in the bandpass filter characteristics.