JPH0469393B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a liquid crystal display device.

A liquid crystal display (hereinafter referred to as LCD) is a display device that uses a material that has both the fluidity of a liquid and the electrical and optical anisotropy of a crystal. Unlike displays that emit their own light, such as fluorescent display tubes and light-emitting diodes, LCDs are light-receiving displays that do not emit their own light, so they are less tiring to the eyes, easy to see even in bright outdoor conditions, and () thin. It has features such as (2) low voltage and low power consumption, and is suitable for microcomputers and peripheral circuits.
The use of LCDs is increasing as a display device that is most suitable for CMOS (reinforced MOS transistor) technology.

However, when driving an LCD, DC driving degrades the characteristics, so AC driving, which does not include a DC component, is generally used. In addition, time-division driving is necessary to increase the amount of display information with a limited number of terminals, and time-division driving
It is well known that a voltage averaging driving method using multiple driving voltages is used because crosstalk occurs due to the structure and characteristics of the display, reducing the contrast between the display state and non-display state, and deteriorating the display quality. It is as follows.

Therefore, since driving an LCD is more complex than driving a fluorescent display tube or a light emitting diode, a dedicated circuit for driving an LCD is used. In response to the recent remarkable trend of increasing display information, multiple dedicated LCD drive circuits are used to drive large LCD panels.
LCD drive dedicated circuit (hereinafter referred to as LCD driver)
controllability is an important point. Also,
As a recent trend, the display pixels of LCDs are changing from a Japanese character shape to a dot shape capable of displaying letters and figures such as alphanumeric characters, and the number of display pixels is also increasing significantly. The display dots of the display panel are arranged in an orderly manner in the vertical and horizontal directions, and are driven by a Y driver that drives the vertical columns and an X driver that drives the horizontal columns. The Y driver generates a time division drive timing signal, and the X driver is driven based on display data that determines whether the display dots are in a display state or a non-display state. FIG. 1 is a block diagram of an example of a conventional LCD driving circuit. In FIG. 1, 40 is a dot type LCD panel, 20 is a Y driver that sequentially outputs a signal for selecting the vertical direction of the LCD panel 40 according to time division driving, 30-1 and 30-
2 is an X driver that drives the horizontal LCD drive terminal of the LCD panel 40 according to display data; 10 is a Y driver;
Driver 20 and X driver 30-1 and 30-2
100 is a signal outputted by the controller 10, which is a signal for sequentially switching the selection signal in the vertical direction for the Y driver 20.
For the X drivers 30-1 and 30-2, this serves as a strobe signal that simultaneously outputs horizontal display data at each timing in the vertical direction to the drive terminal of the LCD. 50 is an X driver selection circuit that generates a signal to select one of the plurality of X drivers included in the controller 10, and 200 is a signal output from the X driver selection circuit 50, which is equal to the number of X drivers. Number of signals 201 and 20
Consists of 2. 300 is a write timing signal for writing display data to each X driver. 400 is X
This is a display data signal for drivers 30-1 and 30-2.

FIGS. 2a to 2f are timing diagrams of signals during operation of the LCD driving circuit shown in FIG. 1.

The number of LCD drive terminals of the Y driver 20 is 32, that is, 32 time division drives, and the X drivers 30-1 and 30
The operation of this circuit will be described in the case where the number of LCD drive terminals of -2 is 40 and the number of bits of the display data transmission path 400 is 8.

Signal 100 output from controller 10
(FIG. 2c) is a signal for generating 32 time-division timing, and this signal 100 causes the Y driver 20 to generate an LCD drive signal. Figure 2a shows one of the 32 vertical LCD drive signals.
The 32 vertical LCD drive terminal signals have respective timings t ₀ , t ₁ , t ₂ , which are equal to one pulse period of the signal 100.
..., t ₃₁ . The signal shown in FIG. 2a is a signal that is active for a period t ₀ , and the other 31 signals are similarly active at one timing among t ₁ , t ₂ , . . . , t ₃₁ and are sequentially scanned. FIG. 2b shows the signal waveform of one LCD drive terminal of the X drivers 30-1 and 30-2. Each timing period (t ₀ ,
t ₁ , ..., t ₃₁ ), the X drivers 30-1 and 30-
2 writes display data to all horizontal LCD drive terminals. FIG. 2d shows the selection signal 201, and FIG. 2e
indicates the selection signal 202. Selection signals 201, 20
2 are both output from the X driver selection circuit 50. Period when the signal 201 is at high level X driver 3
0-1 is selected, the 8-bit display data 400 output by the controller 10 is written, and the 40-bit display data is transferred to the
Write to -1. Similarly, 40-bit display data is written to the X driver 30-2 during the period when the signal 202 is at a high level. At the rising edge of signal 100, the written 80-bit display data is simultaneously output to the LCD drive terminal. Thereafter, similar processing is performed at each of 32 timings of the signal 100, one cycle of display is completed, and this is repeated to perform dynamic display.

The display information can be increased by adding an X driver.
In that case, the same number of selection signals 200 as the number of X drivers to be used are required, and the number of X drivers, that is, the display information is limited due to the limit on the number of terminals of the controller 10. In addition, if the number of terminals to drive the X driver is insufficient, the X driver selection signal is encoded and a circuit for decoding it, that is, an X driver selection circuit is added externally. Terminals are required, controller overhead increases as the controller encodes the selection signal,
Due to the planar structural characteristics of LCD panels, the LCD driver is often arranged in a module configuration on the back side of the LCD panel, so there are many selection signals when connecting the controller and driver. However, there were disadvantages in terms of performance, reliability, economy, and physical space.

The present invention eliminates the above-mentioned drawbacks and enables a plurality of LCD drive circuits to be controlled with fewer control lines, thereby reducing the physical space and therefore the cost, while maintaining a high degree of reliability in a liquid crystal display device. It provides:

A liquid crystal display device according to the present invention includes a controller that generates a drive signal for sequentially driving common electrodes of a liquid crystal display panel and a write timing signal that instructs writing of display data at a cycle shorter than the drive signal; a first driver that sequentially drives the common electrode of the liquid crystal display panel in response to the write timing signal; and a plurality of second drivers that commonly receive the write timing signal, when the selection signal supplied to each driver is at an active level. a plurality of second drivers that capture display data in synchronization with the write timing signal generated by the controller and drive individual electrodes of the liquid crystal display panel in response to the data; A selection circuit that supplies the selection signal to each of the plurality of second drivers, the selection circuit counting the write timing signal and sequentially setting the plurality of selection signals to an active level according to the counted value. There is.

Next, embodiments of the present invention will be described using the drawings.

FIG. 3 is a block diagram of one embodiment of the present invention.

In this embodiment, a Y driver 2 is used as a first driver for driving a common electrode of a liquid crystal display panel 40.
1, and X drivers 30, 30-1, 30-2 as a plurality of second drivers that drive the individual electrodes.
...30-n, a controller 11 that controls each of the X and Y drivers, and an X driver 30-1 based on the time division drive signal 100 and display data write signal 300 output from this controller.
30-n. In this embodiment, the selection circuit 50 is built into the Y driver 21.

Signal 100 is a signal for sequentially switching the vertical selection signal for Y driver 21, and
Horizontal display data at each vertical timing for 0-1 and 30-2 is displayed simultaneously on the LCD.
This becomes the strobe signal output to the drive terminal. 20
0 is a signal output by the X driver selection circuit 50, and is a signal for selecting one of a plurality of X drivers. The signal 200 consists of a signal 201 for selecting the X driver 30-1 and a signal 202 for selecting the X driver 30-2. The signal 300 serves as a write timing signal for writing display data to each X driver, and at the same time serves as an input signal to a frequency divider in the X driver selection circuit 50 built in the Y driver 21. Signal 400 is connected to X drivers 30-1 and 30
This is a display data signal sent to -2.

Next, the operation of this embodiment will be explained.

As in the conventional example, the controller 11 sends a signal 100 that generates 32 time division timing to the Y driver 21, and from the Y driver 21 the vertical LCD
A drive timing signal (Fig. 2a) is output. At the same time, at each timing of signal 100, X driver 3
It becomes a strobe signal that outputs display data to the LCD drive terminals 0-1 and 30-2 all at once. As in the conventional example, during one pulse period of the signal 100,
In order to send 80-bit data to the driver's LCD drive terminals via the 8-bit signal line 400, it is necessary to perform ten write operations. For the first five writes, a signal 201 for selecting the X driver 30-1 is output from the Y driver 21, and the X driver 30-1
It is done for. In the subsequent five writes, the signal 202 is similarly output from the Y driver 21 and is performed to the X driver 30-2.

As explained above, the controller 11 differs from the conventional one in that it does not output the signal 200 for selecting the X driver.

As described above, the LCD panel 40 has a planar shape, and an LCD driver is installed on the back side of the panel in order to make effective use of space. Therefore, in today's world where the number of LCDX drivers used is increasing rapidly as the amount of display information increases, reducing the number of control lines output from the controller makes it possible to realize a liquid crystal display device that is highly economical and reliable. mean something

FIG. 4 is a block diagram of the X driver selection circuit shown in FIG. 3.

The frequency dividing circuit 1 receives the display data write timing signal 300 output from the controller 11 as input, and outputs one pulse signal 600 for each write pulse number for one X driver. counter 2
is reset at the rise of the time division generation timing signal 100, and is countered by the output signal 600 of the frequency divider circuit 1. The output signal 700 of the counter 2 is input to the decoder circuit 3, and the selection signal 200 of the X driver is output. The counter 2 is cleared by the time division generation timing signal 100, and each signal 201 in the X driver selection signal 200, 202, . . . are sequentially output, thereby writing display data to the selected X driver one after another. This operation is repeated and displayed for each pulse of the time division generation timing signal 100.

As explained above, the controller 11 does not need to output the signal 200 for selecting an X driver at all, and does not affect the number of X drivers in the controller 10 at all even when the number of X drivers is increased due to an increase in display information. The display information can be easily increased by increasing the capacity of the counter 2 and the decoder 3, which are constructed of simple circuits, and the increase in the number of circuits is small.

In the above embodiment, the X driver selection circuit 50 is built into the Y driver 21, but even if the X driver selection circuit is made independent of the Y driver, the number of control lines between the controller and the driver can be reduced. .

In addition, most liquid crystal display panels are modular types that are built in together with the driver, and by building the driver selection circuit into the Y driver or into the module, the control lines between the controller and the display module can be significantly reduced. Since the amount of liquid crystal display can be reduced to , it is possible to obtain a liquid crystal display device with excellent economical efficiency and reliability.

As explained in detail above, according to the present invention,
This is highly effective because it is possible to control the driving of a large liquid crystal panel with a small number of control lines, and a liquid crystal display device with excellent economic efficiency and reliability can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an example of a conventional LCD drive circuit, FIGS. 2 a to f are timing diagrams of signals during operation of the LCD drive circuit shown in FIG. 1, and FIG. 3 is a block diagram of an example of a conventional LCD drive circuit. Block diagram, Figure 4 is the 3rd
FIG. 3 is a block diagram of the X driver selection circuit shown in the figure. 1... Frequency divider circuit, 2... Counter, 3... Decoder, 10, 11... Controller, 20, 21
...Y driver, 30-1, 30-2...X driver, 40...LCD panel, 50...X driver selection circuit, 100...time division timing signal,
200 (201, 202)...X driver selection signal, 300...Write timing signal, 400...
...Display data signal, 600...Divider circuit output, 7
00...Counter output.

Claims (1)

[Claims] 1. A controller that generates a drive signal for sequentially driving common electrodes of a liquid crystal display panel and a write timing signal that instructs writing of display data at a cycle shorter than the drive signal; a first driver that sequentially drives common electrodes of the panel; and a plurality of second drivers that commonly receive the write timing signal, the write signal being generated when the selection signal supplied to each driver is at an active level. a plurality of second drivers that capture display data in synchronization with a timing signal and drive individual electrodes of the liquid crystal display panel in response to the data; and a plurality of second drivers that are provided separately from the controller. A liquid crystal display device comprising: a selection circuit that supplies the selection signal to each of the plurality of selection signals, the selection circuit counting the write timing signal and sequentially setting the plurality of selection signals to an active level according to the counted value.