JPH047130B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to integrated circuits using Josephson devices. In particular, it relates to the connection of a DC drive circuit that does not require capacitance C as a circuit component and can drive a resistive load.

Conventionally, the first circuit that can be driven by a DC power supply is
A HUFFLE (abbreviation for hybrid unlatching flip-flop logic element) shown in FIG. 2 was known. These haphazard circuits are generally used as flip-flops or latches in logic circuits, and are known to also have logic functions such as OR and AND.

In a full circuit, two equivalent switching devices J1 and J2 are generally used as a pair, and when one device enters a voltage state, the other device automatically returns to a zero voltage state. .

First, in the circuit shown in FIG. 1, J1, J2 and capacitance C are connected in a ring, and the connection point between J1 and J2 is grounded. A positive DC current source (current source) is connected to the connection point J1, and a negative DC current source (current sink source) is connected to the connection point J2. Further, a series circuit including an inductance L' and a resistor r is connected between each of these connection points and the ground. In the circuit shown in FIG. 2, J1 and J2 and two resistors R ₁ ' and R ₂ ' are connected in a ring, and the connection point of R' ₁ and R ₂ ' is grounded through an inductance L''.
In both Fig. 1 and Fig. 2, the input terminal S
Wirings connected to J1 and S2 are magnetically coupled to J1 and J2, respectively.

In the circuit of FIG. 1 or 2, when a signal input is applied to the input terminals S1 and S2, if the signal remains in that state for a sufficient period of time, the circuit reaches a certain stable state. At this time, there are two stable states of the full circuit as follows.

(A) J1 is in a zero voltage state and J2 is in a voltage state, and the power supply current necessarily flows through J1, but only a small amount is shunted to J2.

(B) J1 is in a voltage state and J2 is in a zero voltage state, and the power supply current necessarily flows through J2, but only a small amount is shunted to J1.

Note that the reason why a power supply current always flows through a device in a zero voltage state is because this part is in a superconducting state. Also, the reason why only a small amount of current flows through a device in a voltage state is because this part has a finite resistance. In addition to the above two stable states, the following two stable states may exist in principle.

(C) Both J1 and J2 are in a zero voltage state, and the power supply current always flows through J1 and J2.

(D) Both J1 and J2 are in a voltage state, and the power supply current can flow through paths other than J1 and J2.

For example, the state (C) above is the signal input terminal S1,
This occurs when no current flows into S2. This corresponds to the case where the circuit is in a standby state, and S1,
When there is an input to S2, it is possible to transition to the normal state (A) or (B). However, as described below, the state (D) above corresponds to a "malfunction state" of the circuit, and the circuit state does not change at all no matter what input signal is input to the circuit. This state (D) occurs, for example, when input signal currents in the same direction are simultaneously applied to both signal input terminals S1 and S2. In this way device J
The phenomenon in which voltages 1 and J2 enter the voltage state at the same time is called a "hang-up phenomenon." Once a hang-up phenomenon occurs, due to the fundamental nature of the Josephson device, the only way to return the circuit to state (A), (B), or (C) is to completely reduce the power supply current to zero. That is, when the power connected to I1 and I2 is turned off, the voltage applied to J1 and J2 becomes completely zero. Therefore, when you connect the power again,
If there is no input current to S1 and S2, both J1 and J2 become superconducting (zero voltage state) and can return to state (C). Furthermore, if a specific input signal is flowing to either S1 or S2, the state in (A) or (B) can be restored by connecting the power again.

However, in general, in DC power supply driven logic circuits,
Since the power is not turned off in the middle of calculation, it is necessary to devise another means to avoid the hang-up state in (D).

Conventionally known Hatsuful circuits (Figs. 1 and 2)
Figure 1), the two switching devices J1 and J2 included in the circuit can be coupled by a capacitor C (Figure 1) or by two equal resistors R' (Figure 1).
(Fig.). In the configuration in which devices J1 and J2 are coupled, a "circuit output section" in which an inductance L' and an output resistor r are connected in series is connected in parallel to each device J1 and J2 (FIG. 1).
At this time, in the stable state of (A) or (B) described above,
Output current flows only through circuit outputs connected to devices that are in a voltage state. That is, if J1 is in a voltage state, the output current flows in a positive direction, and if J2 is in a voltage state, the output current flows in a negative direction.
This makes the power supply I1 associated with J1 a positive current source,
This is the result of using the power supply I2 related to J2 as a negative current source. The reason for reversing the directions of the currents of the two power supplies in this way is to enable transition from state (A) to state (B) or vice versa. To create the C-coupled circuit shown in Figure 1, it is necessary to provide a capacitance C that occupies a certain area in the integrated circuit, and complex design calculations are required to design the size of C. It had drawbacks. The object of the invention is to reduce the capacitance C
It is an object of the present invention to provide a DC power supply drive circuit that can drive a resistive load without requiring a circuit component as a circuit component.

In the conventionally known full circuit, the two switching devices J1 and J2 in the circuit are
In the configuration in which the resistors R′ are connected, the two resistors
The circuit output current is obtained by connecting an inductance L'' between the midpoint of R' and the ground point (Figure 2).At this time, in the stable state of (A), the output inductance is
The output current flows in the negative direction in L'', and in the stable state of (B), the output current flows in the positive direction.However, in this connection, the superconducting inductance
There was a drawback that an output could only be obtained from L'' and a resistive load could not be driven.Another object of the present invention is to provide a DC power drive circuit that can drive a resistive load. There is a particular thing.

Below, the circuit connection of the present invention will be described in detail along with examples.

First, the operating principles and operating conditions of the basic components of the circuit of the present invention will be described. The basic part of the invention consists of two Josephson devices J1, J2 and a single resistor R connected in a ring as shown in FIG. It differs from the conventional known haphazard circuit (FIGS. 1 and 2) in that it couples the two devices by only one resistor R. At both ends of this resistor, power supply terminals I1 and I2 are provided at points connected to each device, and generally positive and negative constant current power supplies are connected. Each device J1,
J2 enables magnetic flux coupling type input and provides signal input lines S1 and S2 for controlling the device state. In FIG. 3, as an example, the terminal of the device to which the resistor R is not connected is grounded. However, even if the grounding point is changed and one of the power supply terminals I2 or I1 is grounded, the basic wiring configuration of the present invention does not change. In this case, only one current source needs to be connected only to the ungrounded power source end.

The basic wiring portion shown in FIG. 3 can assume the four circuit states (A), (B), (C), and (D) described above.
Among these four states, the state (C) in which both devices J1 and J2 are in a zero voltage state is the state where the magnitude of the power supply current I _G
is the maximum allowable superconducting tunneling current of the device
It is always realized if it is smaller than I _n . At this time, there is no signal input and it is assumed that I _G ≦I _n . (The magnitude of the positive and negative power supply currents is ± _IG .) When a signal input of a certain magnitude is applied to either device, states (A) and (B) can occur. Note that state (D) will not occur unless input is applied to both devices at the same time, so we will not consider state (D) for a moment here.

In order for this basic wiring part to operate as a circuit using a DC power supply, it must be possible to transition from state (A) to state (B) and from state (B) to (A) depending on the signal input. No. Assume now that the circuit of FIG. 3 is in state (A) and device J1 is in a zero voltage state. Assume that device J2 is producing a voltage of −V ₀ that is negative and of finite magnitude. The magnitude of this V ₀ is
It takes a value that is equal to or slightly smaller than the gap voltage V _g of the junction included in the device. That is, V ₀ ≦V _g
It is. The reason why V ₀ is smaller than V _g in this way is generally due to the following two reasons.

() If the wiring is as shown in Figure 3, a resistor R is connected in parallel to J2. The operating point of a device with R as a load is generally V ₀ ≦V _g
satisfies the relationship.

() As described below, other resistances and inductances are connected to the basic wiring portion in FIG. 3, and another load is connected in parallel to device J2. Therefore, the value of V ₀ becomes even smaller than in the case of ().

At this time, it is assumed that a signal input current is applied to the input signal line S1 of the device J1 to suddenly transition the device J1 to a voltage state. At this time, there is generally a momentary gap voltage across device J1.
A transient voltage pulse of magnitude equal to V _g is generated. The direction of this transient voltage is positive because I1 is a positive current source. This positive voltage is applied via resistor R to device J2, which has a negative steady-state voltage -V ₀ . The magnitude of the positive transient voltage applied to device J2 is the value divided by resistor R _J and resistor R at the time of the device's minute voltage, and is equal to V _g × R _J / (R + R _J ) . Suppose now that the following condition is satisfied: V ₀ ≦V _g · R _J / (R + R _J ) (1). At this time, the voltage applied to device J2 is −V ₀ to −V ₀ +V _g R _J /(R
+R _J ). This value is positive or zero if conditional expression (1) is satisfied. That is, device J
2 is under the influence of positive transient voltage, negative voltage -
V can go from ₀ to zero voltage. At this time, if the input signal magnetic flux applied to device J2 is reduced, device J2 can return to the zero voltage state. That is, the circuit state can be transferred from (A) to (B) without any inconvenience. Conditional expression (1) is a necessary condition for this transition to occur. In exactly the same way, from circuit state (B)
It is also clear that it is possible to shift to (A). During these transient phenomena of circuit state transition, a positive (or negative) transient voltage is superimposed on a negative (or positive) steady voltage. This effect is referred to here as "voltage anticoupling"
It is called. In other words, the basic wiring section shown in Figure 3 is the wiring of a DC drive circuit that enables voltage decoupling by the resistor R, does not require the capacitance C as a circuit component, and can drive a resistive load. be.

FIG. 4 shows the wiring of one embodiment in which the circuit output is obtained using the basic wiring described above. In other words, one device J1 has an inductance
A "circuit output section" in which L' and a resistor r ₁ are connected in series is connected in parallel, and a "circuit output section" in which an inductance L' and a resistor r ₂ are connected in series is connected in parallel to the other device J2. The grounding point is a resistor as shown in the figure.
Take r ₁ and r ₂ at one end. In this connection, the following two conditions are necessary for the circuit to operate.

() Due to the aforementioned transient phenomenon in which one device switches to a voltage state and another device returns from a voltage state to a zero voltage state,
Regarding the inductance L', L'/r ₁ , L'/r ₂ ≫R _NN C _J (2) is required. The right side of the above equation is the time required for the switching described above to occur, where R _NN is the equivalent normal resistance of junction devices J1 and J2, and C _J is the capacitance of that junction device. If formula (2) is satisfied, the circuit output section including the inductance L' is irrelevant to the transient phenomenon during the time when the aforementioned transient phenomenon occurs, and only the equivalent circuit shown in FIG. 3 needs to be considered. Note that designing R ₁ = r ₂ causes no problem in terms of circuit operation.

() Now suppose that one device J2 is in a zero voltage state and the other device J1 is in a voltage state producing a positive voltage V ₀ across it.
In this case, a resistor r1 and a resistor R are connected in parallel to the device J1. The combined resistance is Rr ₁ / (R + r ₁ ), and it is generally known that if Rr ₁ / (R + r ₁ ) < 2R _NN (3), then the voltage V ₀ at the device operating point will be V ₀ < V _g . There is. At this time, device J
The I-V (current vs. voltage) characteristic of No. 1 can be approximated by I=V/R _J , where R _J is one resistance value. At this time, the value of V ₀ can be easily determined and is equal to V ₀ = I _G / (R _J ^-1 + R ^-1 + r ₁ ^-1 ) (4). It is assumed here that I _G is the absolute value of the power supply current supplied from the terminals I1 and I2. V _g /RI _G ≧r ₁ (R+R _J )/RR _J +Rr ₁ +r ₁ R _J (5) is necessary for these voltage anti-coupling mechanisms to occur correctly (Equation (1)).

In other words, the conditional expression for the circuit in Figure 4 to operate is
It turns out that (1) and (2) are necessary. Under the approximation of terms (), (1) can be replaced by equation (5).

If we normalize and display the resistances r ₁ , R, and R _J included in Fig. 4 by the equivalent normal resistance R _NN of the device, and set K=V _g /R _NN I _G (6), we get Equation (5) can be solved analytically for R/R _NN : 0<R/R _NN ≦ 1/2 [√{ _{J NN} −(1+ _J )} ² +4
It can be rewritten as _{J NN} −{R _J /R _NN −K (1+R _J /r)}] (7). That is, the circuit resistance R
must be selected so as to satisfy equation (7).

In the circuit shown in Fig. 4 described above, the above-mentioned
The circuit condition (D) (hang-up phenomenon) may occur. In general, as a way to avoid this, 1.
A bias current (constant DC value) is supplied from terminal B2 of the bias control line of one device J2 to maintain J2 in a voltage state when no signal is input. It is not necessarily necessary to flow a bias current to the terminal B1 of the bias control line of the other device J1. Furthermore, the signal input terminals S1 and S2 of the two devices are directly connected so that they are driven by a common input current (see the dotted line in Figure 4), so that the direction of the input current and the bias current flowing through terminal B2 are opposite. join to. According to this invention, the circuit shown in FIG. 4 can be used as a logic circuit without hang-up. Figure 1,
In the full circuit of FIG. 2, as already explained, the hang-up phenomenon in which both devices J1 and J2 are in a voltage state (state (D)) cannot be avoided in principle. The present inventors came up with the idea that the hang-up phenomenon can be completely eliminated in principle by connecting an inductance L in parallel to only one device of the basic configuration circuit of the present invention (FIG. 3).

Unlike the above-mentioned hustle circuit, a so-called latch circuit that can be driven by a DC power source and does not cause hang-up is used in Applied Physics Letters No. 38.
Volume, No. 11, pages 936-938. This latch circuit uses a single resistor connected in parallel with a small resistor.
Two Josephson devices are used as a path for the current to escape. However, when this device is momentarily energized, the voltage is applied only to a small resistor rather than to another device. However, in this latch circuit, the output is obtained through a superconducting inductance. It does not have an output form that directly drives a resistive load. The drawback was that the output could only be obtained through another AC power supply driven detector. However, in the circuit of FIG. 4, when there is no signal input, current (output) flows through resistor r2, and no current (output) flows through resistor r1. Further, when there is a signal input, only J1 is in a voltage state, so no current (output) flows through the resistor r2, but a current (output) is obtained through the resistor r1. That is, the circuit of FIG. 4 has a feature that complementary outputs are always obtained from the circuit itself at the resistors r1 and r2. However, it is necessary to use it with care that the output current of the resistor r1 is always positive, and the output current of resistor r2 is always negative.

In the previous embodiment (FIG. 4), a hang-up phenomenon essentially occurred, and this could be avoided only by devising a connection between the input signal line and the bias control line. However, in the example described below,
The hang-up phenomenon can essentially be avoided without any such measures. That is, as shown in FIG. 5, a circuit output section having an inductance L' and a resistor r connected in series is connected in parallel to one device J1, while only an inductance L is connected in parallel to the other device J2. (Although the input signal line and bias control line are not shown in Figure 5 for simplicity, it is assumed that they are connected to each device as in Figure 4.) In this connection, the inductance L does not take out the circuit output, but forms part of device J2 and constitutes one "switching device." It is assumed that one of the power terminals I1 is connected to a positive DC current source, and the other power terminal I2 is connected to a negative DC current source. Regarding the grounding point, as in FIG. 4, one end of the resistor r is connected to ground.

First, the voltage between device terminals in a stable state in this embodiment (FIG. 5) will be described. First, when device J1 is in a voltage state, if the input current from I1 is I _G , the voltage value V ₀₁ across J1 is
Similar to equation (4), V ₀₁ = I _G / (R _J ^-1 + R ^-1 + r ^-1 ) (8). At this time, device J2 was assumed to be in a zero voltage state. Conversely, when device J1 is in a zero voltage state, the voltage V ₀₂ across device J2 is clearly V ₀₂ =0 (9). This is because device J2 is short-circuited by superconducting inductance L.

Next, the switching operation of the circuit of this embodiment (FIG. 5) will be explained. First, it is assumed that the device J1 is in a voltage state and generates a voltage V ₀₁ according to equation (8). At this time, it is assumed that a signal input is input to device J2, and device J2 suddenly becomes a voltage state. Let the instantaneous peak voltage at this time be −V _P. Over time, this voltage approaches zero as it is short-circuited by the inductance L, but at the moment device J2 switches on, it produces a voltage of finite magnitude and the absolute value of the transient voltage pulse is V _P And so. By the same idea as deriving equation (1), V _P
is divided by resistor R and device resistor R _J and applied to device J1. The magnitude of the voltage applied to device J1 is equal to V _P ×R _J /(R+R _J ). Therefore, if the condition of V ₀₁ ≦V _P R _J /(R+R _J ) (10) is satisfied, the voltage across device J1 can be made zero by switching device J2. Therefore, by substituting equation (8) into equation (10), V _P /RI _G ≧r (R + R _J ) / RR _J + R _r + r R _J (11) is a necessary condition for the voltage anti-coupling mechanism to occur correctly. be. At this time, device J1 returns to the zero voltage state, so the output current flowing through resistor r becomes zero. Conversely, assume that device J1 is in a zero voltage state and device J2 is also in a zero voltage state with V ₀₂ =0. At this time, it is assumed that a signal input is input to the device J1 and the device J1 suddenly becomes a voltage state. The magnitude of the transient voltage pulse that occurs across this device J1 is V _g . Assuming that the device J2 was originally in a zero voltage state, this voltage is applied to both ends of the resistor R. Since device J1 remains in the voltage state,
The output current flowing through the resistor r of the circuit output section has a certain finite value. Note that at least L'/
It takes r time.

As shown in FIG. 5, in a configuration in which a superconducting inductance L is connected in parallel to one side of the device, the device always returns to a zero voltage state in a stable state. Note that the inductance L
It does not depart from the spirit of the invention to insert a very small resistance in the path containing the voltage, as long as the device can return to the zero voltage state. That is, in this embodiment, the above-mentioned circuit state (D) does not exist, and the hang-up phenomenon (malfunction) of the circuit does not substantially occur, so that "stable operation" can be performed. In addition,
In the example shown in FIG. 5, unlike the case shown in FIG. 4, the output is obtained from only one location. It is clear that this circuit can be provided with bias control lines and signal input lines similar to those shown in FIG. 4 to perform NOR theoretical operation and OR theoretical operation by driving with a DC power supply. This is device J
This is because it is possible to provide two or more signal input lines to 1 and J2.

In this embodiment of the circuit, it is more preferable to use a plurality of Josephson devices connected in series in place of device J2. At this time, the value of V _P used in equation (10) can be increased in proportion to the number of devices.

In the previous example (Figure 5), the positive and negative 2
Two DC power sources were required. However, in the embodiment described below, by changing the grounding point, only one
Only one current source is needed. That is, as shown in FIG. 6, although the connection is exactly the same as that in FIG. 5, one power supply terminal I2 may be grounded, and a power supply may be connected only to the other power supply terminal I1. In this case, in the figure, one end of device J2 with inductance L connected in parallel is grounded, but conversely, device J1
A power source may be connected to one end I1 of the terminal I1 and the other power terminal I2. In this case, the output current is device J1
is obtained from a path including an inductance L' and a resistor r connected in parallel to the inductance L'. In addition, in this circuit connection,
Since one end of the resistor R is grounded, the current flowing through this resistor can be used as the output current. The circuit operation of this connection is exactly the same as that in FIG.

In the previous example (Fig. 6), a device in which the inductance L' and the resistor r were connected in series was connected in parallel to both ends of the device J1 to maintain the voltage of the device J1. . However, this circuit requires at least a time corresponding to the time constant of L'/r for the circuit to perform a switching operation and enter a stable state. However, in the embodiment described below, by removing this inductance L' and resistance r (this is equivalent to setting L'/r to zero), the speed of the circuit can be increased. . In other words, as shown in FIG. 7, a device J1 and a device J2 having an inductance L connected in parallel are connected in series, a resistor R is connected in parallel to these, one end is grounded, and the other end is the power supply terminal I1. Take. In this case, it is more preferable to use a plurality of parallel connections of L and the device connected in series instead of devices J2 and L connected in parallel. Alternatively, it is also possible to use a device in which a plurality of devices are connected in series and one L is connected in parallel to the entire device. In these circuit connections, in order to generate a constant voltage in the device in a stable state with no signal input, connect a bias control line (its control input terminal is designated as B1) to the device where the inductance is not connected in parallel. It is good to have one. Here, it is assumed that each device has an input signal line having signal input terminals S1 and S2, respectively.

First, the voltage between device terminals in this embodiment (FIG. 7) will be described. First, when device J1 is in a voltage state, if the input current from I1 is _IG , the voltage value _V00 across it is _V00 = _IG /( _RJ ^-1 +R ^-1 ) (12). Here, the I-V characteristics of device J1 are:
It is assumed that R _J can be approximated by I=V/R _J with one resistance value.

Next, the switching operation of this embodiment (FIG. 7) will be explained. First, it is assumed that the device J1 is in a voltage state and generates the voltage V ₀₀ of equation (12). At this time, a signal input is input to device J2,
Consider that device J2 suddenly goes into a voltage state.
The peak value of the transient voltage pulse generated in device J2 at this time is defined as V _P . This V _P is divided by the resistor R and the resistor R _J of the device J1 and applied to the device J1. The magnitude of the voltage applied to device J1 is equal to V _P ×R _J /(R+R _J ). Therefore, if the condition of V ₀₀ ≦V _P R _J /(R+R _J ) (13) is satisfied, the voltage across device J1 can be made zero by switching device J2. If a plurality of Josephson devices are used in the device J2 portion as described above, the value of V _P in equation (13) can be increased in proportion to the number of devices. Therefore, the stable state voltage V ₀₀ can be increased. By substituting equation (12) into equation (13), RI _G ≦V _P (14) is a necessary condition for the voltage anti-bonding mechanism to occur correctly. At this time, since device J1 returns to the zero voltage state, the output current flowing through load resistor R becomes zero. The operation of this circuit is basically the same as the previous embodiment.

In this embodiment (FIG. 7), no current flows to the terminal B1 of the bias control line, and each device J
The operation in the case where input signal lines having input signal terminals S1 and S2 are provided separately for 1 and J2 will be described.
At this time, when there is no input to both S1 and S2, the voltage across the resistor R is zero and no output current flows. Once input is applied to S1, device J1 generates a voltage, so a voltage of V ₀₀ appears across resistor R. Since this voltage can be maintained even after the input of S1 is turned off, this circuit can be used as a kind of latch. To release the latch, it is sufficient to apply an input to the input terminal S2. In this way, the voltage across the resistor R becomes zero, and this state can be maintained even after the input to S2 is turned off. If there is no input to S1 and only input to S2, a transient voltage will be generated across the resistor R, but zero voltage will be output in a stable state. If input is applied to both devices at the same time, a voltage V ₀₀ will be output across the resistor R in a stable state. Therefore, this embodiment provides a stable latch circuit that can be driven by a DC power supply and has its own output terminal. A feature of this circuit is that it never hangs up. It goes without saying that in this circuit, even if the ground terminal and power supply terminal are replaced, the circuit operation will not change at all.

In the previous embodiment (Fig. 7), the input signal lines (terminals S1 and S2) of the two devices J1 and J2 were considered to be independent.However, in this circuit connection, as shown in Fig. 8, , it is possible to effectively function as a theoretical gate by directly connecting two input signal lines and supplying a common input signal at the same time.In other words, as shown in Fig. A bias control line (terminal B2) that can generate magnetic flux in the opposite direction is provided, and a bias current (DC) is constantly flowing.In the example in Figure 8, there is an output when there is no input signal, and there is an output when there is an input signal. A NOT circuit with zero output can be constructed.It is clear that a NOR circuit can be constructed if multiple input signal lines are provided instead of one.In the figure, the inductance L biases the device J2 that is not connected in parallel. Although an example in which a control line is provided has been shown, a bias control line may be provided in the device J1 to which the inductance L is connected in parallel.In this case, an OR circuit can be configured if there are multiple input signal lines. A feature of logic gates is that they never cause hang-ups, and as a result, logic gates with OR or NOR functions can be constructed using DC power supply.

Looking at Figure 8, if we ignore the devices with inductance L connected in parallel, device J2
It is the same as a switching gate (so-called JTL gate) consisting of and a resistor R. That is, this embodiment can be regarded as a circuit in which a switch gate in which L is connected in parallel to the JTL gate is added to perform a non-latching operation using a DC power supply. Traditionally known as JTL
The gate had the disadvantage that it could only perform a latching operation and could only be driven with an AC pulse power supply, but this circuit has an excellent circuit configuration that allows it to be driven with a DC power supply.

In the embodiment described above (FIG. 8), the output of the logic gate can be taken out as a potential applied across the resistor R or as a current flowing through a path including the resistor R. In this circuit connection, if the input signal transmission line TR is connected to the contact point between the load resistor R and the circuit power supply as shown in FIG. 9, transmission line driving becomes possible. It is best to insert a matching resistor RO (resistance value R ₀ ) at the end of this transmission line (strip line) and ground it. The resistor R in the circuit is for enabling voltage decoupling of the two devices J1 and J2, and it is not preferable to remove the load resistor R in this embodiment in order to speed up the circuit. However, in principle, even if the resistor R is removed, the sum of the characteristic impedance Z ₀ of the transmission line TR and the terminating resistor R ₀ can take over its role. In this case, in an actual Josephson integrated circuit, inductance is introduced into the path that includes the transmission line TR and the resistor RO, so the circuit response becomes slightly slower. That is, as shown in FIG. 9, the contact between the load resistor R and the circuit power supply is regarded as an output terminal, and a signal transmission line is connected to this output terminal, which is a preferred embodiment for a transmission line driven logic gate.

In the above explanation, we did not discuss the magnetic flux coupling input type device in detail, but we can use simple Josephson junction, SQUID consisting of two junctions,
It is clear that a so-called 1-2-1 Josephson interferometer consisting of a junction or four junctions can be used. Furthermore, it is optional to further connect a damping resistor in parallel to the device in which the inductance L is connected in parallel.

As described above, according to the present invention, a new circuit connection for Josephson integrated circuits based on the basic principle of voltage anticoupling driven by a DC power source can be provided. In particular, it is possible to configure a DC power supply drive logic circuit that can drive a resistive load without requiring a capacitance C as a circuit component, which requires complicated design calculations.

[Brief explanation of drawings]

Figures 1 and 2 are circuit diagrams showing conventional circuits, Figure 3 is a wiring diagram showing the basic principle of the present invention, Figures 4, 5, 6, 7, and 8.
9 and 9 are circuit diagrams showing wiring connections in an embodiment of the present invention, respectively. I1, I2...Circuit power supply terminal, J1, J2...
Magnetic flux coupling Josephson device, C...coupling capacitance, S1, S2...input terminal of input signal line, L'...circuit output inductance, r...
...Circuit output section resistance, R'...Coupling resistance, L''...Circuit output section inductance, R...Circuit resistance, B
1, B2...Bias control line input terminal, r1,
r2...Circuit output section resistance, L...device parallel inductance, TR...transmission line, RO...transmission line termination resistance.

Claims (1)

[Scope of Claims] 1 It has first and second Josephson devices and a resistor, the first and second Josephson devices and the resistor are connected in a ring, and the resistor and the resistor are connected in a ring. A DC power supply is connected to two contacts with the first and second Josephson devices, and the connection method of the DC power supply is a positive DC power supply connected to one of the contacts and a negative DC power supply connected to the other of the contacts. A two-power system consisting of a DC power source or a one-power system in which one DC power source is connected between the two contacts, and the first and second Josephson devices or only the first Josephson device. A voltage anti-coupling Josephson circuit characterized by having a circuit output resistor in parallel with. 2. In claim 1, the circuit output section is a voltage source characterized in that an inductance and a resistor are connected in series to both ends of the first and second Josephson devices, and are connected in parallel. Anti-coupling Josephson circuit. 3 In claim 1, the above first,
A voltage inverter characterized in that it has an inductance connected in parallel to one of the second Josephson devices or a series circuit of said inductance and a resistor of a value that allows said one Josephson device to return to a zero voltage state. Combined Josephson circuit. 4 Characteristics In claim 1, the above-mentioned first,
A voltage anticoupling Josephson circuit characterized in that it has a series circuit of an inductance and a resistor connected in parallel to the other of the second Josephson device. 5. The voltage anti-coupling type Josephson circuit according to claim 1, wherein only one of the first and second Josephson devices has a structure in which only one of the first and second Josephson devices switches from a superconducting state to a voltage state.