JPH0475691B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an improvement in a selective calling receiver that performs error correction using, for example, a BCH code.

[Technical background of the invention and its problems]

Conventionally, as shown in FIG. 1, this type of selective call receiver receives and demodulates a selective call signal arriving from a base station via an antenna 1 in a receiving circuit 2, and sends the demodulated output to an error correction calculation circuit. After performing calculation and error correction in step 3, the verification circuit 4
When the two numbers match, a display signal is generated to make the speaker 6 sound through the amplifier 6a, and the message information is sent to the liquid crystal display 7 by the drive circuit 7a. There is something that is displayed.

Incidentally, in such a receiver, the above-mentioned error correction calculation is performed as follows. That is, the received BCH code is first subjected to syndrome calculation using a parity check matrix for each received bit to calculate the syndrome. After calculating the syndromes for all bits of the selective calling signal, corrected bits are detected from these syndromes according to a standard form decoding method, and then the detected corrected bits are corrected. According to this method, for example, the second
As shown in the figure, the information bits consist of an 11-bit individual number code and a 33-bit message code (consisting of 3-bit type bit A and 30-bit content bit B), and this information bit consists of 18-bit When using a 62.44 BCH code with check bits added, it is actually possible to correct at least one bit of error.

However, in such a conventional configuration, even if the incoming selective call signal is for itself,
Even if this is not the case, error correction calculations are performed uniformly. Here, this error correction operation is itself very complicated and time-consuming, and since subsequent codes are being received one after another during the above operation, it is performed in parallel with this reception control operation. There must be. Therefore, the circuit that performs the above-mentioned calculations and control is always in operation, and therefore, in the case of conventional receivers, even if the selective call signal is other than its own, the circuit that performs the above-mentioned complicated calculations etc. This has the drawback of significantly increasing power consumption. This drawback is extremely undesirable in a selective call receiver that uses a battery as a power source because it shortens the life of the battery.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a selective call receiver that reduces wasteful power consumption and extends battery life, thereby making it possible to use a small battery and downsizing the receiver itself. .

[Summary of the invention]

In order to achieve the above object, the present invention provides a circuit that compares the received selective call signals with its own individual number code in the order of reception and counts the number of mismatched bits, and this circuit checks the number of mismatched bits when the number of mismatched bits exceeds a predetermined bit. When it is detected that the signal has been lost, it is assumed that the signal is a selective call signal other than the self or a signal that cannot be corrected, and at least the error correction operation is stopped.

[Embodiments of the invention]

FIG. 3 is a block diagram of a selective calling receiver according to an embodiment of the present invention, and the same parts as in FIG.

A feature of the receiver of this embodiment is that a second collation circuit 10 is provided in parallel to the error correction calculation circuit 3 and the collation circuit 4. This second verification circuit 1
0 includes a collation unit which introduces the selective call signal obtained by the receiving circuit 2 and compares the individual number code therein with its own individual number code stored in the ROM 5 bit by bit in the order of reception; A counting section that counts the number of mismatched bits from the matching results of the matching section and issues a mismatch detection signal when the number of mismatched bits reaches a predetermined value, and a counter that stops operation when the mismatch detection signal is issued from this counting section. It is comprised of a stop control section that generates a signal and supplies it to the receiving circuit 2, error correction calculation circuit 3, and collation circuit 4, and stops the operation of these circuits. Here, the number of mismatching bits when the counting section issues the mismatch detection signal is set to a number exceeding the number of bits that can be corrected by the error correction calculation circuit 3, for example, 6.
In the case of this embodiment using the 2,44BCH code,
In practice, it is possible to correct errors up to 1 bit, so the number of mismatched bits is set to 2 bits.

With such a configuration, the selective paging signal arriving from the base station is received by the receiving circuit 2 and then subjected to error correction calculation in the error correction calculation circuit 3, and is also sent to the second collation circuit 10. Supplied. Then, in this second collation circuit 10, the received bits are collated with their own individual number codes in order, and the number of mismatched bits is counted.

Assuming that a selective call signal to itself now arrives, if the number of error bits above is within 1 bit that can be corrected, the second collation circuit 10 will not generate an operation stop signal. The error correction calculation circuit 3 then executes the error correction calculation up to the final bit, and the corrected selective call signal is provided for verification in the verification circuit 4. And ROM5
When the number matches the own individual number code stored in , the matching circuit 4 issues a matching signal and the speaker 6 sounds, thereby making a call. At this time, the message information in the selective call signal is decoded by the matching circuit 4 and displayed on the display 7.

On the other hand, when a selective call signal other than the self is received, an operation stop signal is issued from the second matching circuit when the number of mismatched bits reaches 2 bits. Therefore, even if the error correction arithmetic circuit 3 is in operation, it stops its arithmetic operation when the operation stop signal arrives, and becomes inactive. Further, at this time, the receiving circuit 2 and the collation circuit 4 also transition to a non-operating state.

Also, even if it is a selective call code to self,
Even if two or more bit errors occur due to the state of the transmission path, each circuit goes into a non-operating state, as in the case of the arrival of a signal other than itself.

It should be noted that even if the selective calling signal is a signal other than the own, if the Hamming distance from the own individual number code is 1 bit, the second matching circuit 10 will not generate an operation stop signal. Therefore, in consideration of this point, it is preferable to set the Hamming distance between each individual number code to 2 bits or more.

As described above, in this embodiment, if the arriving selective call signal is from a source other than the one's own, or even if it is the one's own but has many bit errors, the error is detected as soon as this is detected. Since the operations of the correction calculation circuit 3, the reception circuit 2, and the collation circuit 4 are stopped, unnecessary calculation operations and the like are reduced, and as a result, power consumption can be suppressed. Therefore, the life of the battery can be extended and the battery can be made smaller, so the receiver can be made even smaller and lighter.

Note that the present invention is not limited to the above embodiments. For example, in the above embodiment, not only the operation of the error correction calculation circuit but also the reception circuit and the collation circuit are stopped, but it is also possible to stop only the correction calculation circuit, or conversely, stop the other circuits. You may also do so. Further, the error correction calculation circuit, the collation circuit, and the second collation circuit may be replaced with a circuit equipped with a microprocessor, and the processing may be performed by software. Furthermore, the code format does not include message information, such as 7,4BCH code or 31,16BCH code.
The same applies even when BCH codes are used. In addition, the code matching method, error correction calculation method, etc. can be modified in various ways without departing from the gist of the present invention.

〔Effect of the invention〕

As described in detail above, the present invention provides a circuit that compares a received selective call signal with its own individual number code in the order of received bits and counts the number of mismatched bits in parallel with an error correction calculation circuit. When it is detected that the number of mismatched bits has exceeded a predetermined number of bits, it is assumed that this is a selective call signal other than the self, or a signal that cannot be error corrected, and at least an error correction operation is performed. It was designed to stop it.

Therefore, according to the present invention, there is provided a selective call receiver that can reduce wasteful power consumption and extend battery life, thereby making it possible to use a small battery and reducing the size and weight of the receiver itself. can do.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional selective call receiver, FIG. 2 is a diagram showing an example of the code structure of a selective call signal, and FIG. 3 is a block diagram of a selective call receiver according to an embodiment of the present invention. It is. 1...Antenna, 2...Receiving circuit, 3...Error correction calculation circuit, 4...Verification circuit, 5...
ROM, 6...Speaker, 7...Display, 10...
...Second matching circuit.

Claims (1)

[Scope of Claims] 1. A selective call receiver that performs error correction by performing n-bit error correction calculations on the received selective call signal, then compares it with its own individual number code, and displays a call when the two match. At , the individual number code of the received selective call signal is received and compared with its own individual number code in bit order to count the number of mismatched bits, and when the number of mismatched bits is n+1 bits or more, at least the above-mentioned error correction operation is performed. A selective call receiver, characterized in that it is provided with a control means for stopping the. 2. The selective calling receiver according to claim 1, wherein the control means stops the receiving operation together with the error correction operation when the number of mismatched bits exceeds n+1 bits.