JPH0476190B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a frequency detection circuit for detecting side lock of an APC circuit used in a signal processing circuit of a video recording/reproducing device, such as a video disc player, which records video signals on a rotating recording medium. It is related to.

Conventional structure and its problems In recent years, images and images have been recorded on rotating recording media such as video disks.
Various types of recording and reproducing devices for recording audio or data have been developed. In the playback device,
Signals read by a pickup or a laser have time axis fluctuations that are synchronized with rotation due to surface runout, eccentricity, etc. of the disk. There is an APC (Automatic Phase Control) circuit in order to make such a reproduced signal have a constant frequency and phase relationship with respect to a reference signal. Here, we will discuss the conventional configuration and its problems, focusing on the frequency detection section of the APC circuit, using the signal processing circuit of a VHD video disk as an example.

FIG. 1 is a block diagram showing a frequency detection circuit used in a VHD video disc. 1st
In the figure, 1 is a motor that drives the turntable, 2 is a disk rotated by the turntable, and 3 is a pickup, which takes out signals from the disk and supplies them to an FM demodulator 4. The FM demodulator demodulates the FM signal, extracts a demodulated video signal, and sends it to the luminance/chrominance signal separation circuit 5. The luminance/chrominance signal separation circuit separates the luminance signal and chrominance signal from the demodulated video signal by adding and subtracting signals delayed by one horizontal period. The brightness signal is the brightness signal
To the color signal adder 6, the color signal is sent to a balanced modulator 7. In the balanced modulator, the 2.56MHz chroma signal, which has been frequency-converted to a low frequency and recorded, is terodyned to the frequency of the voltage controlled oscillator 12 (hereinafter referred to as VCO). Then, the difference frequency component 3.58MHz chroma signal is extracted by the bandpass wave generator 8. The burst signal included in the 3.58 MHz chroma signal is extracted by the burst gate circuit 9, and its phase is compared with the 3.579545 MHz output of the oscillator 11 by the phase comparator 10, and the phase error signal is given to the VCO 12. The VCO 12 oscillates at a frequency corresponding to the phase error signal and is applied to the balanced modulator 7 as a carrier signal. Further, the 3.58MHz chroma signal from the bandpass filter 8 is sent to the luminance/color signal adder 6, where it is added to the luminance signal to form a video signal and output from the output terminal 19. That is, by balanced modulator, bandpass waver, burst gate circuit, phase comparator, and VCO.
The APC circuit is configured, and the burst signal included in the reproduced chroma signal is matched in frequency and phase with the oscillator output (3.579545MHz) with no time axis fluctuation. However, when the variable range of the VCO is wide, there is a phenomenon in which the APC circuit locks at a frequency that is ±Nf _H (N=1, 2, 3, . . . ; f _H =horizontal synchronization frequency) away from the frequency to which it should originally lock. Hereinafter, this phenomenon will be referred to as the sidelock phenomenon. FIG. 2 shows the spectrum of the burst signal extracted by the burst gate circuit. It can be seen that the center frequency (denoted as _fO ) is 3.579545MHz, and the spectrum is lined up at intervals of _fH from that frequency. That is, if the variable frequency range of the VCO is wider than f _O ±f _H , this APC circuit may lock to frequencies other than the center spectrum, such as f _O −f _H and f _O +f _H. For this purpose, the frequency detection section of the APC circuit described below is required. The frequency detection section is the reference signal generator 1
7 and a gate pulse generator 16, a first gate circuit,
It is composed of a second gate circuit and a counter.
A count interval pulse and an output interval pulse are generated by the gate pulse generator 16 using a certain frequency generated by the reference signal generator 17 as a reference. For example, the gate pulse generator output uses an HD signal (frequency = 15.734264kHz) as the reference signal generator output a as shown in Figure 3, and outputs a count period pulse b of 8H period and an output period pulse c of 2H period. It shall be. VCO12 oscillation signal
If the signal d obtained by counting for 8H period is less than 3114 counts, the APC circuit will output f _O −Mf _H (M=1, 2, 3
...), and applies a positive polarity pulse to the VCO input for a 2H period, working to shift the VCO's oscillation frequency by + _fH .

Also, the count number of signal d obtained in 8H period is 3126
If this is the case, the APC circuit determines that it has locked to f _O +Mf _H , applies a pulse of negative polarity to the 2H interval VCO input, and works to shift the oscillation frequency of the VCO by -f _H. By repeating such frequency detection and frequency shifting, the APC circuit locks to the original center frequency.

However, the conventional method of detecting sidelock in the APC circuit shown in FIG. 1 has the following disadvantages. When reading a signal from a disk-shaped recording medium, the read signal has time axis fluctuations synchronized with rotation due to surface runout, eccentricity, etc. of the disk.

In other words, the VCO output of the APC circuit locked to a burst signal with time axis fluctuations also has similar time axis fluctuations (FIG. 4f). Also, the period is very short, 8 hours per rotation of the disk (Fig. 4h)
In sidelock detection by VCO output count, the sidelock detection point is 3114 count points (VCO center oscillation frequency 6.13636MHz - 11.8kHz)
and 3126 count points (VCO center oscillation frequency
6.13636MHz + 11.8kHz) has a similar time axis fluctuation (Fig. 4 e, g), and in fact, Fig. 4 i
Due to the time axis fluctuations synchronized with the rotation, the detection range becomes narrower, and the effective tracking range at the time of APC lock decreases. Furthermore, this disk with large time axis fluctuations, that is, surface runout,
When playing back a disk with large eccentricity, the frequency detection section will mistakenly judge it as a side lock at the point where the time axis fluctuation is the greatest, which will sharpen the frequency and cause color stripes on the screen, resulting in a significant deterioration in image quality. This will cause

OBJECTS OF THE INVENTION The present invention aims to eliminate the above-mentioned drawbacks, and provides a frequency detection circuit in which the frequency detection point does not malfunction due to time axis fluctuations synchronized with disk rotation.

Structure of the Invention In order to achieve this object, the present invention replaces the output of a reference signal generator with an FG signal that generates a signal synchronized with the rotation of the motor, and divides the frequency of the FG signal. Rotation pulse (N = integer)
The configuration is such that the oscillation frequency of the VCO is counted over N rotation intervals. In other words, since the side lock of the APC circuit is determined using the VCO oscillation frequency averaged over N rotation intervals, the influence of time axis fluctuations synchronized with rotation can be removed, accurate lock determination can be performed, and the effective effectiveness of the APC circuit can be eliminated. There is no need to narrow the tracking range.

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 5 shows a block diagram of a frequency detection circuit in one embodiment of the present invention. Fifth
In the figure, numerals 1 to 16 have the same structure as the conventional example shown in FIG. Reference numeral 18 denotes an FG signal generator, which generates a signal having a frequency equal to the number of rotations of the motor, and is inputted to the gate pulse generator 16 as a reference signal.
By dividing the frequency of the FG signal, a count period pulse is generated for N rotation periods of the motor (N is an integer), and an output period pulse is generated for a certain period after counting and judgment.

In other words, even if there is a time axis fluctuation synchronized with the rotation, N
Since the oscillation frequency of the VCO 12 during the rotation period is counted, when averaging N rotations, the time axis fluctuation in synchronization with the rotation becomes O. As a result, the frequency detection point becomes accurate, and the desired tracking range when the APC circuit is locked can be secured.

In addition, in Figure 5, the FG signal is used as the reference signal and N
Although the rotation period pulses are accurately generated, a reference signal generator may be used to generate N rotation periods of N/15 seconds.

Furthermore, although the present invention has been explained by taking the frequency detection circuit in the APC circuit as an example, the present invention can easily be applied to the frequency detection circuit used in the AFC circuit.

Effects of the Invention As described above, the present invention provides a rotating recording medium reproducing device for N rotation periods (N=1, 2, 3,...).
The present invention provides a frequency detection circuit that can accurately detect frequencies by counting the frequency of the VCO to eliminate the influence of time axis fluctuations synchronized with rotation. When the frequency detection circuit of the present invention is applied to the APC circuit, it is possible to eliminate the drop in the effective tracking range when the APC circuit is locked, and the side lock detection point malfunctions due to large eccentricity or vibration of the rotating recording medium, causing color streaks on the screen. As a result, there is no longer any major deterioration in image quality, and the practical effect is great.

[Brief explanation of drawings]

Figure 1 is a block diagram of a disk reproduction signal processing circuit with a conventional frequency detection circuit, Figure 2 is a spectrum diagram of a burst signal included in a chroma signal,
FIG. 3 is a diagram showing the operation of each part of the gate pulse generator, FIG. 4 is a diagram showing the frequency detection range, and FIG. It is a block diagram. 1...Motor, 2...Disk, 3...Pickup, 4...FM demodulator, 5...Brightness/color signal separation circuit, 6...Brightness/color signal adder, 7...Balanced modulator, 8 ... Band reactor, 9 ... Burst gate, 10 ... Phase comparator, 11 ... Oscillator, 1
2... Voltage controlled oscillator, 13... First gate,
14...Counter, 15...Second gate, 16
... Gate pulse generator, 17 ... Reference signal generator, 18 ... FG generator, 19 ... Output terminal.

Claims (1)

[Claims] 1. A pulse generator that generates a pulse having a pulse width of N rotation periods (N is an integer) of a motor that rotates a rotating recording medium; a gate circuit that gates a signal under test whose frequency is to be detected with the pulse; A frequency detection circuit comprising a counter circuit that counts the signal under measurement that has been gated for the N rotation period by a gate circuit.