JPH0477976B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a playback mode determination circuit for a VTR.

Conventional VTRs have standard play (SP), which runs the videotape at normal speed and plays it back.
long play (LP), in which the videotape is played back by running it at 1/3 times the speed, for example.
There are some that have both methods. like this
With a VTR, it is necessary to determine which playback mode the video is in before playing. Some systems have made it easier to perform playback operations by automatically performing this discrimination, but conventional playback mode discrimination circuits do not distinguish between video signal tracks 2, 2, . . . on a videotape 1, as shown in FIG. Correspondingly, control signals S1, S1, . Some motors are equipped with a detection coil 7 that generates an FG signal S2 corresponding to the rotational speed using the magnetic flux from 6. This reproduction mode discrimination circuit outputs, for example, a low level signal in response to the large number of FG signals S2 when in the standard play mode, and outputs a low level signal in response to the large number of FG signals S2 in the long play mode. Correspondingly, a high level signal is output, and in synchronization with the control signal S1, the long play playback mode or the standard play playback mode is automatically determined depending on whether the signal level is low level or high level. However, even in the same playback mode, for example, long play playback mode, when switching from normal playback mode to special playback mode such as reverse playback or still image playback, the control signal S1 may become irregular during the transition period. This tends to cause noise signals to be superimposed, which can easily cause misjudgment of the playback mode.

SUMMARY OF THE INVENTION An object of the present invention is to ensure that noise signals are removed from a reproduction mode determination signal so that the reproduction mode can be accurately determined.

Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings. FIG. 2 is a circuit diagram of this embodiment. This example applies to both VHS and Beta format VTRs (video tape recorders).
also applies. The reproduction mode discrimination circuit of this embodiment has an input terminal D, an output terminal Q, and an inverted output terminal.
First and second D flip-flops 10 and 20 having a clock terminal C and a clock terminal C are provided. The output terminal Q of the first D flip-flop 10 is connected to the input terminal D of the second D flip-flop 20 and one input terminal of the first AND circuit 30. The inverting output terminal Q' of the first D flip-flop 10 is connected to one input terminal of the second AND circuit 40. The output terminal Q of the second D flip-flop 20 is connected to the other input terminal of the first AND circuit 30, and the inverted output terminal Q' of the second D flip-flop 20 is connected to the other input terminal of the second AND circuit 40.
Further, the output section of the inverter 60 is commonly connected to the clock terminal C of each of the first and second D flip-flops. Here, at the input section of the inverter 60, a control track corresponding to the video signal track on the video chip as shown in FIG. A control signal S1 is introduced. Each output terminal of the AND circuits 30 and 40 is connected to a set input terminal S and a reset input terminal R of an RS flip-flop 50, respectively.

A first reproduction mode determination signal S3 shown in FIG. 3B is applied to the input terminal D of the first D flip-flop 10. This first playback mode discrimination signal S3 is generated by the magnetic flux from the NS magnetic pole 6 provided in order to detect the rotational speed of the motor 5 of the capstan 4 that drives the videotape 1 in the same way as shown in FIG. A detection coil 7 is provided that generates an FG signal S2 corresponding to the rotational speed, and in the standard play mode, the signal becomes, for example, a low level in response to the large number of FG signals S2, and in the long play mode. When , the signal becomes high level corresponding to the small number of FG signals S2. In this embodiment, the clock terminals C of both D flip-flops 10 and 20 are connected to the output section of the inverter 60.
The control signal S1 applied to the input section of the inverter 60 and inverted by the inverter 60 is applied to the clock terminal C, and as a result,
At the clock terminals C of both D flip-flops 10 and 20, when the playback mode of the VTR is switched, the pulse width of the first playback mode discrimination signal S3 shown in FIG. 3B is indicated by a plurality of cycles of the control signal S1. The control signal S, which has a pulse width equivalent to one cycle of the control signal S1 and before the inversion, is used as a noise signal on the front or rear side of the pulse that should become the original first reproduction mode discrimination signal.
The inverted control signal S1 from the inverter 60 is given at a timing delayed by half a week of the control signal S1 from the leading edge (rising part) of the pulse synchronized with the leading edge of the pulse.

A first reproduction mode determination signal S3 corresponding to the rotational speed of the capstan 4 is applied to the input terminal D of the first flip-flop 10. When the rotation speed is low, for example, in the long play mode, the first reproduction mode discrimination signal S3 becomes a high level as shown in FIG. 3b, whereas when the rotation speed is high in the standard play mode, the first reproduction The mode discrimination signal S3 also becomes low level as shown in FIG. 3b. As shown in Figure 3b, this first
At times t1 and t2 in the reproduction mode discrimination signal S3
, a noise signal is superimposed between times t3 and t4, and when the first reproduction mode discrimination signal S3 is between times t5 and t6, the output of the RS flip-flop 50 in the circuit of the embodiment is At the terminal Q, only the second reproduction mode discrimination signal S3' from which the noise signal has been removed appears. This applies the output from the output terminal Q of the first flip-flop 10 and the output from the output terminal Q of the second flip-flop 20 to both input terminals of the first AND circuit 30, and
The output from the inverting output terminal Q' of the flip-flop 10 and the inverting output terminal of the second flip-flop 20
Since the output from Q' is applied to the second AND circuit 40, the control signal S1 is applied to each of the clock terminals C and C of the first and second flip-flops 10 and 20 as a clock signal.
This is because the noise signal corresponding to one cycle of does not appear at the output terminal of the first AND circuit 30. Therefore, only the first reproduction mode discrimination signal S3 between times t5 and t7 in FIG. 3b is shown in FIG. 3c.
The second reproduction mode determination signal S3' between times t6 and t8 appears at the output terminal Q of the RS flip-flop 50, and the VTR switches from the normal reproduction mode to the special reproduction mode, and the control signal S1 Even when the reproduction mode becomes irregular as described above, an accurate second reproduction mode discrimination signal S3' can be obtained. As a result, in this embodiment, both the long play mode and the standard play mode can be accurately discriminated without being affected by noise signals.

The second reproduction mode determination signal obtained in this way allows the information recorded on the videotape to be reproduced at an appropriate speed.

As described above, in the present invention, the first reproduction mode determination signal consisting of a high level signal portion and a low level signal portion according to the reproduction mode is applied to the input terminal of the first D flip-flop, while the clock terminals of both D flip-flops are Since the control signal on the video tape of the VTR can be given at a timing that is positioned between the leading edge and the trailing edge of the noise signal superimposed on the first playback mode discrimination signal, the noise signal can be used to determine the first playback mode. Even if the noise signal is superimposed on the signal, the noise signal is reliably removed from the second reproduction mode discrimination signal, so that the reproduction mode can be accurately determined.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a VTR videotape and a capstan that drives the videotape;
Fig. 2 is a circuit diagram of an embodiment of the present invention, and Fig. 3 is a circuit diagram of an embodiment of the present invention.
3 is a time chart of signals for explaining the operation of the circuit shown in the figure. 1...Video tape, 4...Capstan, 1
0, 20...first flip-flop, second flip-flop, 30,40...first AND circuit, second AND circuit, 50...RS flip-flop,
S1...Control signal, S3...First reproduction mode determination signal, S3'...Second reproduction mode determination signal.

Claims (1)

[Claims] 1. Comprising a first and second D flip-flop, a first and second AND circuit, and an RS flip-flop, the output terminal of the first D flip-flop is connected to one of the input terminal of the second D flip-flop and the first AND circuit. the inverting output terminal of the first D flip-flop is connected to one input terminal of the second AND circuit; the output terminal of the second D flip-flop is connected to the other input terminal of the first AND circuit; Further, the inverting output terminal of the second D flip-flop is connected to the other input terminal of the second AND circuit, each output part of both said AND circuits is connected to the set input terminal and reset input terminal of the RS flip-flop, respectively, and the second D flip-flop is connected to the other input terminal of the second AND circuit. A first playback mode determination signal consisting of a high-level signal portion and a low-level signal portion corresponding to the playback mode of the VTR is applied to the input terminal of the VTR, and the clock input terminal of each of the first and second D flip-flops receives a signal on the video tape. When the playback mode of the VTR is switched by introducing a control signal having a pulse width shorter than the period from a control track corresponding to the video signal track at regular intervals with a delay from the leading edge of the first playback mode determination signal. 1st to
When a noise signal having a pulse width of one period of the control signal is superimposed on the front or rear side of the reproduction mode discrimination signal, the second reproduction mode discrimination signal from which the noise signal has been removed is output from the output terminal of the RS flip-flop. A reproduction mode determination circuit for a VTR, characterized in that the output is output.