JPH0482080B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a multilayer wiring board on which elements such as LSI are mounted, and more particularly to a method for manufacturing a multilayer wiring board suitable for increasing the speed of electrical signal transmission within the board. .

[Background of the invention]

BACKGROUND ART In multilayer wiring boards for information processing equipment, with demands for higher speed and higher functionality of electrical signal transmission, it is essential to use insulating base materials with a low dielectric constant and high-density wiring.

On the other hand, conventional multilayer wiring boards use copper-clad laminates mainly based on thermosetting resins such as epoxy resins and polyimide resins to form predetermined conductor wiring boards to form multiple layers. There is a method in which a high-melting point metal paste is formed on an alumina green sheet by a thick film printing method, multilayered, and sintered.

Organic polymer materials such as epoxy resins and alumina insulating base materials have dielectric constants of 3 to 5 and 8 to 10, respectively.
Since the signal propagation speed decreases in proportion to the square root of the dielectric constant, there is a limit to how high the signal propagation speed can be increased with the wiring board using the above-mentioned insulating base material.

On the other hand, Japanese Patent Publication No. 57-39559 and Japanese Patent Publication No. 58-11117 disclose a method of providing gas insulation such as air between inner layer substrates as a multilayer wiring board that achieves high-speed signal propagation.

In the above multilayer wiring board, the inner layer and outer layer conductors are connected by through-hole processing and through-hole copper (chemical copper plating-electroplating), which are normal printed wiring board manufacturing methods, so fine through holes, etc. are formed. This makes it difficult to apply this method to high-density wiring boards on which devices such as LSIs are directly mounted.

[Purpose of the invention]

An object of the present invention is to eliminate the above-mentioned problems of the prior art and to provide a rational connection method that creates a space between a predetermined signal conductor layer and a ground layer and enables simultaneous multi-layer construction.

Another object of the present invention is to provide a method for manufacturing a high-density multilayer wiring board that enables high-speed electrical signal propagation within the wiring board.

[Summary of the invention]

As a result of various studies for the above purpose, the invention was achieved with the following features. That is, the present invention involves forming a Ti metal film on one side of a low-resistance metal plate, forming a polyimide resin film with a connection window on one side, etching a predetermined portion of the Ti metal film, and
A step of exposing copper and forming a land portion, a step of forming a resist pattern for forming a low melting point metal on the Ti metal film other than the land portion and its vicinity, and a polyimide resin film other than the connection window and its vicinity; a process of forming solder bumps on and in the vicinity thereof, a connection window and the vicinity thereof, a process of removing the resist pattern for forming the low melting point metal, a process of removing the resist pattern for forming the low melting point metal,
a step of etching the Ti metal film and the exposed copper plate to form a two-dimensional conductor wiring board; heating the plurality of two-dimensional conductor wiring boards to melt the solder bumps;
This is a method for manufacturing a multilayer wiring board characterized by comprising steps of stacking and connecting and integrating.

A plating method, a vapor deposition method, etc. can be used to selectively form a bump-shaped low melting point metal on the land pattern and the ground layer. The materials include Pb, Sn or their alloys (solder), Au-Sn, and Au-Si.
Although Au alloys can be used, lead and tin alloys (solder) are preferable from the viewpoint of cost and operating temperature.

As the selective formation method, a selective resist masking method using photoetching or printing is used. In the photoetching method, commercially available peel-off type positive, screw type liquid or dry film type photosensitive resists can be easily used. Furthermore, as printing inks, release type inks or anti-sticking liquid inks can also be used.

The wiring board constituting the conductor pattern, that is, the signal pattern, land pattern, or ground pattern of the present invention is made of low-resistance Cu,
Ag, Pd, Au, Al, Mo, W, Pt, Ni, etc. can be used, but Cu is suitable in terms of cost and workability.
Further, the wiring pattern of the conductor can be easily formed using a plate-shaped conductor made of the above-mentioned material by a conventional photoetching method. As the photoresist in this case, a peelable photosensitive resist of positive type or negative type can be used.

One feature of the present invention is that it incorporates an organic insulating layer that supports and reinforces the wiring pattern. This organic insulating layer can be formed using a permanent resist type photosensitive resist. In particular, the use of photosensitive polyimide is effective and suitable from the viewpoint of heat-resistant insulation.

Another feature of the present invention is that rigid substrates are newly provided to sandwich the upper and lower surfaces to further support the hollow multilayer wiring board block with the conductor pattern.
Examples of the rigid substrate include oxide-based inorganic material substrates such as alumina, stellide, forsterite, mullite, and glass.

[Embodiments of the invention]

Embodiments of the present invention will be described in detail below with reference to the drawings.

Example 1 FIG. 1a shows a plate-shaped conductor in which a Ti metal film 2 with a thickness of about 0.1 μm is formed on one side of a copper foil 1 with a thickness of 18 μm using a normal vacuum deposition method.

A photosensitive polyimide resin solution having the following composition was applied with a spinner onto the exposed copper surface of this conductor.

Polyamic acid...30g (N,N-dimethylamino) Ethyl methacrylate...3g 2.6-di(4'-azidobenzal)-4-hydroxycyclohexane...3g Then, it was dried at 70°C for 30 minutes to form a film with a thickness of about 10μm. A polyimide resin film 3 is formed, then a glass photomask (not shown) having a connection land pattern is closely attached to a predetermined position, and a 500W Xe-Hg lamp is used for 30 minutes to form the polyimide resin film 3.
Exposure to UV light for seconds. Then, N-methyl-2-
After developing with a mixed solution of 4 volumes of pyrrolidone and 1 volume of ethanol, post-baking was performed in a nitrogen atmosphere at 350° C. for 60 minutes to form a polyimide resin having connection windows 4 (FIG. 1b).

Next, a negative photosensitive resist OMR-83 (Tokyo Ohka) was applied on both sides of the conductor using a spinner, and 70
After drying at ℃ for 30 minutes (film thickness approximately 3 μm), a glass photomask (not shown) with a connection land pattern at a predetermined position was tightly attached to the Ti metal film surface, and a 500W Xe
- Both sides were exposed to ultraviolet light for 10 seconds using a Hg lamp. After exposure, develop with OMR-83 special developer, wash with special rinse solution, and create etching resist pattern 5.
was formed (Fig. 1c).

Next, after removing the exposed Ti metal parts by etching with a 50% sulfuric acid aqueous solution (solution temperature: 50°C) (Fig. 1 d), the etching resist film 5 on both sides was removed using a special stripping solution for OMR-83 at 50°C. Removed. Figure 1 e
1 shows a plate-shaped conductor having a connection land pattern after the etching resist is removed.

Next, a negative photosensitive resist OMR-83 was applied on both sides of the conductor using a spinner, dried at 70°C for 30 minutes (film thickness approximately 3 μm), and then a glass photomask (not shown) was applied to form a low melting point metal at a predetermined position. figure)
was adhered to both sides, exposed to ultraviolet light for 10 seconds using a 500 W Xe-Hg lamp, and treated with an OMR developer and a rinsing solution to form a resist pattern 6 for forming a low melting point metal as shown in FIG. 1(f).

The plate-shaped conductor obtained in Figure 1 f was subjected to plating pre-treatments such as degreasing with NeutraClean-68 (room temperature, 3 minutes), water washing (room temperature, 1 minute), and 5% hydrochloric acid washing (room temperature, 1 minute). ), after washing with water (room temperature, 1 minute),
A low melting point metal 7 having a thickness of approximately 10 μm was formed at a predetermined position by soldering (FIG. 1g). The composition and conditions of the fermentation liquid used are as follows.

Tin borofluoride (45%)...5g1 Lead borofluoride (45%)...100g1 Boric acid...100g1 Boric acid...10g1 Gelatin...3g1 Temperature: 25℃, Current density: 2A/ ^dm2 , After plating Sn/
The Pb alloy ratio was approximately 5/95.

Next, the above-mentioned plate-shaped conductor is immersed in OMR-83 exclusive stripping solution (50°C) for 5 minutes, the resist 6 for forming the low melting point metal is peeled off, and solder bumps for connection are placed in the predetermined positions as shown in Figure 1h. A plate-shaped conductor having 7 formed thereon was obtained.

Next, as shown in FIG.
Apply OMR-83 with a spinner and dry (film thickness approx. 3μ)
m) to form an etching resist. After that, a glass photomask for signal wiring (not shown) having the desired pad and line pattern was applied to the Ti.
Only the metal film surface was adhered and both surfaces were exposed to ultraviolet rays using a 500WXe-Hg lamp to form an etching resist 8 for forming a conductor pattern as shown in FIG. 1J. after that,
50% sulfuric acid water (liquid temperature 50℃) solution and ammonium persulfate: 250g1, ammonium chloride: 30g1
The exposed parts are sequentially immersed in an etching solution consisting of
The Ti metal film 2 and the copper foil 1 are removed by etching.

Etching resist 8 is OMR-83 in Figure 1 k.
The wiring substrate is shown with conductor lines, connection pads, and solder bumps of low melting point metal formed on the pads after being stripped and removed using a special stripping solution.

Next, the above wiring body is put into a furnace at about 300° C. for about 15 minutes to melt (wet-back) the low melting point metal bumps 7 for connection, thereby producing a signal wiring body having spherical low melting point metal bumps 7' as shown in FIG. I got it.

Next, the ground layer conductor shown in FIG. 2 was formed by the same method as in Example FIGS. 1 a to 1.

Multiple signal wiring bodies (X-direction wiring, Y-direction wiring) formed by the above method and multiplexing of ground layer conductors at positions sandwiching the signal wiring bodies,
Furthermore, after stacking the alumina ceramic wiring board 9 with conductor wiring formed on the outermost layer (both sides),
The spherical low-melting metal bumps were placed in a furnace for 15 minutes to melt them, and as shown in Figure 3, each signal wiring layer, ground layer, and alumina ceramic board were connected only by solder pillars, and each layer was hollow. In other words, an air-insulated multilayer wiring board was obtained.

〔Effect of the invention〕

As explained above, in the present invention, it is difficult to wet solder bumps on one side of a low-resistance metal plate.
The reason is that a Ti metal film is formed and a polyimide resin film with a connection window on one side is formed. Therefore, in the process of forming solder bumps, the Ti metal film on one side of the low-resistance metal plate and the polyimide resin film on the other side both act as dams to prevent solder flow and greatly improve positioning accuracy. Furthermore, since the Ti metal film and the polyimide resin film increase the rigidity of the low-resistance metal plate, mechanical and physical strength can be ensured, and a highly reliable multilayer wiring board can be obtained.

[Brief explanation of drawings]

1, 2, and 3 are cross-sectional views of the manufacturing process of the multilayer wiring board of the present invention. 1... Copper foil, 2... Ti metal film, 3... Polyimide resin, 4... Connection window, 5... Etching resist, 6
...Resist for forming low melting point metal, 7...Low melting point metal bump, 7'...Spherical low melting point metal bump, 8...Etching resist for forming conductor pattern, 9...Alumina ceramic wiring board.

Claims (1)

[Claims] 1 Forming a Ti metal film on one side of a low-resistance metal plate,
A step of forming a polyimide resin film with a connection window on one side, a step of etching a predetermined portion of the Ti metal film to expose copper, and forming a land portion, a step of forming a connection on the Ti metal film other than the land portion and its vicinity. A step of forming a resist pattern for forming a low melting point metal on the polyimide resin film other than the window and its vicinity, a step of forming a solder bump at the land portion and its vicinity, a connection window and its vicinity, and a step for forming the low melting point metal. a step of removing the resist pattern, a step of etching a predetermined portion of the Ti metal film and the exposed copper plate to form a two-dimensional conductor wiring board, heating a plurality of the two-dimensional conductor wiring boards to melt the solder bumps, A method for manufacturing a multilayer wiring board, characterized by comprising a process of stacking and connecting and integrating.