JPH0511441B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention is directed to digital automatic frequency control (hereinafter also referred to as AFC) which removes frequency deviations of a received signal by digital control using a reception reference signal in a receiving device in wireless communication. related to certain) devices.

[Overview of conventional technology and its problems]

In a wireless communication receiving device, in a digital automatic frequency controller that digitally removes the frequency deviation of a received signal using a reception reference signal, the sampling frequency is at least 2 in the pull-in range.
However, if the pull-in range becomes wider than a certain value, the sampling frequency cannot be doubled or more due to the processing speed of the device. In other words, there is a limit to the retraction range.

[Object of the present invention]

Therefore, the object of the present invention is to
In an AFC device, the limit of the pull-in frequency range is made as large as possible, and more specifically, the pull-in frequency range is wider than the sampling frequency, which depends on the performance of the device. This is an attempt to obtain an AFC device.

[Structure of the Invention] In order to eliminate the limit on the pull-in range, the present invention basically expands the pull-in range by providing an arbitrary number of band-pass filters with different center frequencies in parallel with a low-pass filter. It was designed to do so.

That is, according to the invention, the received reference signal at radio frequency and the output of the voltage controlled oscillator are mixed.
A mixer for AFC, a phase detector that compares the phase of the output of the local reference oscillator and the phase of the AFC signal, a low-pass filter that filters the output of the phase detector, and an output of the low-pass filter are supplied. an analog-to-digital converter for digitizing the sample-and-hold circuit output; a digital-to-analog converter for providing a pass filter output to the voltage controlled oscillator; and a clock generator for providing a sampling clock to the sample and hold circuit and digital low pass filter. In the frequency control device, the clock generator uses, as an input, the signal phase-compared by the phase detector, has different center frequencies including the center frequency of the low-pass filter, and has a pass band width. an arbitrary number of bandpass filters configured to cover a desired pull-in range in the entire passband including the low-pass filter;
A parallel circuit of a reception reference signal detector and a ±determiner is provided connected to each output of this bandpass filter, and a band corresponding to the parallel circuit corresponds to the information obtained from this parallel circuit. A digital automatic frequency control device is provided, comprising: a controller that sets initial data in the data storage device for causing the voltage controlled oscillator to oscillate at a frequency corresponding to a pass band of a pass filter. It will be done.

[Details of conventional technology]

FIG. 3 is a diagram showing an example of the configuration of a conventional digital automatic frequency control device. In FIG. 3, the reception reference signal input from the input terminal 1 passes through the AFC mixer 2 and is divided by the distributor 3 into an output signal and an AFC signal to the secondary system, and the AFC signal is sent to the phase comparator 4. The phase is compared with the output of the local reference oscillator 5. The output of the phase comparator 4 passes through a low-pass filter 6 and then enters a sample-and-hold circuit 7, and then an analog-to-digital converter (A-D converter).
8 into a digital signal. This digital signal is passed through the next digital low pass filter 9.
After passing through, the signal enters a digital-to-analog converter (DA converter) 10, where it is converted into an analog signal and input to a voltage-controlled oscillator 11. The output of the voltage controlled oscillator 11 is input to the AFC mixer 2,
Automatic frequency control is performed here. On the other hand, a clock generator 12 outputs sampling clocks a and b to a sample hold 7 and a digital low pass filter 9.
supply each.

FIG. 4 is a diagram showing details of the digital low-pass filter 9 described above. The digital signal output from the A/D converter 8 is multiplied by the accumulated data of coefficient accumulators 103 and 104 by multipliers 101 and 102, respectively, and then input to adders 105 and 106, respectively. Adder 105 adds the data to data accumulator 107, and this output is added to adder 1.
06 and also data storage 10
It is stored in 7.

However, the pull-in range of this circuit depends on the frequencies of the sampling clocks a and b; Since there is a limit to the processing speed, there is also a limit to the pull-in range. Note that the digital low-pass filter 9 replaces the loop filter of the analog low-pass filter with a digital filter, so its operation is a complete integral system, so although there is no steady phase error, it is similar to the analog low-pass filter. The operation is exactly the same as that of a low-pass filter.

[Embodiments of the invention]

FIG. 1 is a diagram showing the configuration of an embodiment of the present invention. Components with the same numbers as those in FIG. 3 indicate the same functions. The reception reference signal (frequency ₁ ) inputted from the input terminal 1 passes through the AFC mixer 2 and the distributor 3, and then is phase-compared with the local reference oscillator 5 output (frequency ₂ ) in the phase comparator 4.

FIG. 5 is a diagram showing the configuration of the phase comparator 4.
The local reference signal (frequency ₂ ) which is the output of the local reference oscillator 5 is phase-shifted by a π/2 phase shifter 41 on the one hand, and complex multiplied by the AFC signal from the distributor 3.
Outputs frequency and phase error signals as baseband with cos and sine components. Then, the sine component is sent to the low-pass filter 6, and the clock generator 20
Both the sine component and the cosine component are sent to the bandpass filters 17-1 to 17-N.

Among the several filters mentioned above, the bandwidth of the low-pass filter 6 is 2 times the sampling frequency of this circuit.
Set it to 1/1 or less. Then, the remaining pull-in range obtained by subtracting the bandwidth of the low-pass filter 6 from the pull-in range is divided into N equal parts, and set as band-pass filters 17-1 to 17-N each having a center frequency. When the output of the phase detector 4 is input, the low-pass filter 6 and the band-pass filter 17-1 are first input.
A reception reference signal appears at any one of 17-N to 17-N. If it appears in the low-pass filter 6, the second
Digital AFC as shown in the figure.
It takes. Also, if the bandpass filter 17-1~
17-N, the reception reference signal detector 18 (18-1 to 18-1) connected to it is detected.
8-N) as the reception reference frequency _1
The absolute value | ₁ − ₂ | of the difference between
Check the phase relationship of the sine component. For example, if the cos component is ahead of the sine component in phase, the frequency of the received reference signal is higher than the local reference frequency (positive side).
If there is a delay, it is determined whether the deviation is downward (to the negative side), and this signal is passed to the controller 16.

The controller 16 generates sampling locks a and b as in the conventional device, and also generates a reception signal generator 18.
Based on the information from the and ± determiner 19, the data accumulator 10 corresponding to the data setting control signal 15 is
7 (see FIG. 4 for details). Data accumulator 107 by controller 16
When the initial data setting is performed, the out-of-band of the low-pass filter 6, that is, the band filters 17-1 to 17-N
The reference signal received at will appear within the band of the low-pass filter 6, thereby pulling it in in a manner similar to conventional digital automatic frequency control devices.

Here, we will specifically explain how to determine the above initial data and its subsequent handling using numerical values.
For example, a reception reference signal (more precisely, a reception reference signal of frequency | ₁ - ₂ | frequency-converted by the mixer 2 and phase detector 4) appears in the reception reference signal detector 18-1, and the reception reference signal appears in the ±determiner 19-1. When a signal indicating ± appears,
The controller 16 controls the oscillation frequency of the voltage controlled oscillator 11.
₃ to ₂ (oscillation frequency of local reference oscillator 5) + 0.7kHz
(The center of the pass band of the band pass filter 17-1, see FIG. 2).
Give to 07. At this time, the value from A/D converter 8 is 0.
(When a reception reference signal with a frequency of | ₁ − ₂ | appears at the output of the bandpass filter 17, the low-pass filter 6
The output of will be 0. ), this initial value supplies the D/A converter 10 to the voltage controlled oscillator 1.
Sent to 1. As a result, the voltage controlled oscillator 11 has an oscillation frequency of ₂ +0.7kHz. Then, the output of the phase detector 4 is within the band of the low-pass filter 6,
Thereafter, the operation is similar to that of the prior art until an output appears in the bandpass filter 17.

FIG. 2 is a diagram illustrating an example in which specific numerical values are given for the overall operation of the apparatus shown in FIG. 1. Now, set the sampling frequency to 1kHz, the bandwidth of low-pass filter 6 to 500Hz, and the pull-in frequency range to ±40k.
Hz, the number N of bandpass filters 17 is
80 pieces, their center frequency is 0.75kHz, 1.25k
Hz, . . . are sequentially increased by 500 Hz, and each passband width is set to 500 Hz. FIG. 2 shows the above relationship. As can be seen from this figure, filters 6, 17
The pass band widths from -1 to 17-N are such that the entire range just covers the pull-in range.

If the reference frequency is currently shifted by +39.75kHz, the received reference signal detector 18-79 detects that the reference signal appears in the bandpass filter 17-79, and the ± determiner 19 detects that the reference signal appears in the local The low-pass filter 6 is controlled by the controller 16 by detecting whether it is shifted upward or downward with respect to the reference signal. The process is as described above, but as a result, the signal appearing in the bandpass filter 17-79 now appears within the passband of the lowpass filter 6. This means that sampling at 1kHz is sufficient.

〔Effect of the invention〕

As described above, with the digital automatic frequency control device of the present invention, it is possible to pull in at a sampling frequency lower than the pull-in range, and moreover, it is possible to pull in at high speed.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of a digital automatic frequency control device that is an embodiment of the present invention, and FIG.
3 is a diagram showing the configuration of a conventional device; FIG. 4 is a diagram showing details of the configuration of the digital low-pass filter of the device in FIG. 3; FIG. 5 is a diagram showing the configuration of the phase detector. Symbol explanation: 2 is AFC mixer, 3 is distributor,
4 is a phase detector, 5 is a local reference oscillator, 6 is a low-pass filter, 7 is a sample hold, 8 is an analog-to-digital converter, 9 is a digital low-pass filter, and 10 is a digital-to-analog converter. vessel, 1
1 is a voltage controlled oscillator, 12 is a clock generator, 1
6 is a controller, 17-1 to 17-N are band pass filters with different center frequencies, 18-1 to 18-N are reception reference signal detectors, and 19-1 to 19-N are ± determiners, respectively. express.

Claims (1)

[Claims] 1. An AFC mixer that mixes a received reference signal at a radio frequency and the output of a voltage controlled oscillator, a phase detector that compares the phase of the output of a local reference oscillator and the phase of the AFC signal, and a phase It has a low-pass filter that filters the detector output, a sample-and-hold circuit to which the low-pass filter output is supplied, an A-D converter that digitizes the sample-and-hold circuit output, and a data accumulator. , a digital low-pass filter to which an A-to-D converter output is supplied, and a D-to-A converter for providing a digital low-pass filter output to the voltage controlled oscillator; a clock generator that provides a sampling clock to a digital low-pass filter; and a clock generator that provides a sampling clock to a digital low-pass filter; are different from each other including the center frequency of the low-pass filter, and the passband width is configured such that the entire passband including the low-pass filter covers a desired pull-in range. A band-pass filter, a parallel circuit of a receiving reference signal detector and a ±determiner connected to each output of the band-pass filter, and a parallel circuit of a reception reference signal detector and a ±determiner connected to each output of the band-pass filter, and a parallel circuit that corresponds to the information obtained from this parallel circuit. and a controller for setting, in the data accumulator, initial data for causing the voltage controlled oscillator to oscillate at a frequency corresponding to a passband of a bandpass filter corresponding to the parallel circuit. Digital automatic frequency control device.