JPH051240B2 - - Google Patents

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention is directed to the production of semi-insulating dislocation-free bulk crystals for InP substrates used in epitaxial crystal growth for integrated circuits using semiconductor lasers for communications, etc. It is about how to grow.

(Problems to be solved by the conventional technology and the invention) In recent years, communication semiconductor lasers with InGaAsP as the active layer in the long wavelength range (1.3 to 1.5 μm) have become very popular in relation to the lossless wavelength range of optical fibers. We have made progress. As is well known, the composition of InGaAsP, which has an emission wavelength in the long wavelength range, is grown epitaxially using InP as a substrate, which is convenient in terms of lattice matching.
On the other hand, it is known that the reliability of devices that utilize recombination of electrons and holes, such as semiconductor lasers, is sensitive to crystal lattice defects. In other words, the energy emitted from the excited state is not only emitted as laser light, but is also relaxed into lattice defects, such as dislocations, as part of a non-emission process, and contributes to the multiplication of lattice defects through the multiphonon process. It is known to do. This phenomenon is unlikely to occur unless there is a nucleus where non-luminescent energy is concentrated. In other words, the dislocations that already existed before energization become nuclei, and the dislocations themselves multiply. Therefore, device manufacturers are seeking not only to avoid introducing dislocations during epitaxial growth, but also to avoid introducing dislocations during processes such as electrode attachment, and above all to create a dislocation-free substrate. Conventionally, dislocation-free InP substrate crystals have been achieved by doping >5×10 ¹⁸ cm ^-3 or more with impurities such as Si, S, etc. for n-type substrates, and Zn, etc. for P-type substrates. This dislocation-free mechanism will be described later.

The trend in semiconductor devices over the past 10 years has been marked by the shift towards integrated circuits. Optical devices are no exception, and in recent years there has been significant development toward the realization of optoelectronic integrated circuits (OEICs) that combine optical devices and their control systems. The most important condition for integrated circuits is uniformity within the wafer surface, that is, the operating thresholds of each component are the same.Also, the most important condition for integrated circuits is uniformity within the wafer surface, that is, the same operating threshold of each component. There is a need for stable semi-insulating substrates. Recently, FET (Field Effet)
It has become clear that the variation in current between the source and drain of integrated circuits (Transistor) is closely related to the dislocation density within the wafer. (Japanese Journal of Applied Physics, Vol. 22, 1983, p. L54). Therefore, stable
To realize OEIC, dislocation-free and semi-insulating
An InP board is required.

In order to use InP as a substrate for OEIC, it is essential that it be dislocation-free and semi-insulating as described above, but semi-insulating cannot be obtained with conventional high-concentration doping of Si, S, and Zn. Furthermore, doping with impurities such as Cr and Fe that form a deep order as in the case of GaAs substrates does not satisfy the requirement of stability against heat treatment. It is an object of the present invention to provide a crystal growth method that satisfies these requirements.

(Means for solving the problem) The quantum of the present invention transposes B, Al, Ga, etc., which are cognate with In, which is a group element of InP, or N, As, Sb, etc., which are cognate with P, which is a group V element. By adding at least 5×10 ¹⁸ cm ^-3 as a generation-inhibiting dopant, it is possible to obtain a dislocation-free bulk crystal for a semi-insulating substrate. By using sufficiently purified raw materials, it is easy to obtain a high resistance substrate of approximately 10 ⁸ ohmcm, but it is necessary to further add Cr or Fe impurities of approximately 10 ¹⁵ cm ^-3 to an extent that does not affect thermal transformation. In some cases, it is also possible to obtain a high resistance substrate with good reproducibility.

(Function) Here, we will discuss the dislocation-free mechanism when high-concentration impurities are added to group compound semiconductors. According to the research conducted by the present inventors (Journal of Applied Physics, Vol. 50, 1979, p. 3312), the dislocation suppression effect of impurity addition is not only due to the pinning effect of the impurity, but is inevitable when doped at a high concentration. It has been pointed out that the occurrence of point defects caused by stoichiometry deviations is important. That is, a large amount of interstitial host atoms and vacancies generated in the ingot interact with slip dislocations due to thermal stress generated around the ingot, causing upward movement of the dislocations. Since the dislocations that have performed upward movement deviate from the {111} plane, which is the easy slip plane of the face-centered cubic lattice, they can no longer easily penetrate into the inside of the ingot. Recently, large amounts of In have been doped to make GaAs high in resistance and dislocation-free, and this phenomenon can be understood by a similar mechanism.

In the present invention, similar results could be obtained by doping InP with isoelectronic coordination impurities.

(Example) Next, an example of the present invention will be described together with a manufacturing method thereof. Here, we will discuss the InP:Ga system, which most easily achieved the above objectives.

The crystal growth method used was the liquid-confined pulling method used to grow conventional semi-insulating GaAs.
That is, pyrophoric boron nitride is used as the crucible material, and the raw material melt is produced by direct synthesis of In and metal P. At that time, Ga was doped to about 5×10 ¹⁸ cm ⁻³ . These were pulled up and grown in N ₂ at about 35 atmospheres while preventing the volatilization of P using a B ₂ O ₃ sealant. The crystals obtained through this crystal growth exhibit a high specific resistance of approximately 10 ⁸ Ωcm over the entire ingot.
The dislocation density is also less than 10 ³ pieces/cm ² over the entire area,
From etching observation, no minute defects were observed. Therefore, the uniformity of the electrical characteristics within the wafer surface, for example, the variation in threshold voltage when FETs were manufactured, was also within the permissible range. This example is
Although shown only for InP:Ga, the invention naturally applies to other isoelectronic coordination impurities, such as B, Al, N, As, Sb, etc.

Doping InP to investigate the effect of the present invention
Figure 1 shows experimental data for observing changes in dislocation density when changing the amount of Ga. The Ga concentration on the horizontal axis is obtained by examining the crystal after growth using optical emission spectroscopy, and the dislocation density on the vertical axis is counted after exposing dislocation pits by chemical etching.

This figure shows that a concentration of ~5×10 ¹⁸ cm ^-3 is sufficient to eliminate dislocations with the minimum amount of Ga.

(Effects of the Invention) As described above, according to the present invention, an InP single crystal can be made dislocation-free.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the change in dislocation density when the amount of Ga doped into InP is changed.

Claims (1)

[Claims] 1. A method for growing a compound semiconductor crystal, which comprises doping an InP single crystal with at least 5×10 ¹⁸ cm ^-3 of group or group element impurities.