JPH0514446B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a PLL frequency synthesizer type tuning circuit having an AFT circuit.

BACKGROUND TECHNOLOGY AND PROBLEMS A unique PLL frequency synthesizer-based tuning circuit with an AFT (automatic fine tuning) circuit has been proposed, as shown in Figure 1.

In FIG. 1, 1 is an antenna, and a signal from this antenna is supplied to a tuner 2. The intermediate frequency signal _SIF from the tuner 2 is supplied to the video detection circuit 4 through the intermediate frequency amplifier 3. The video signal S _V from the detection circuit 4 is supplied to the picture tube 6 through the video amplification circuit 5 .

Furthermore, the local oscillation signal S _L in the tuner 2 is supplied to a phase comparator 9 through a pre-frequency divider 7 and a programmable frequency divider 8 . A reference signal S _B is supplied from a reference signal oscillator 10 to the phase comparator 9 to perform phase comparison. This comparison error signal is supplied to the tuner 2 through a low-pass filter 11 as a tuning voltage Et. Here, frequency dividers 7, 8,
The phase comparator 9 and low pass filter 11 constitute a PLL (phase, lock, loop) circuit. In this case, the tuning voltage Et is changed by changing the frequency division ratio 1/N of the frequency divider 8, and the local oscillation signal
Tuning is performed by changing the frequency of S _L , that is, the local oscillation frequency _L.

In addition, 12 constitutes a microcomputer.
A CPU (central processing unit), 13 a ROM (read only memory), 14 a RAM (random access memory), 15 and 16 an address bus and a data bus, respectively, and 17, 18 and 19 an interface, respectively.

In addition, 20 indicates a channel selection section consisting of a keyboard or the like, in which channel data S _CH specifying a predetermined channel, for example, is generated by a user's operation.
This is the CPU 12 through the interface 17.
supplied to

Further, 21 indicates an AFT circuit, to which the intermediate frequency signal _SIF from the intermediate frequency amplifier 3 is supplied. this
The AFT circuit 21 outputs an AFT signal that increases the local oscillation frequency f _L according to the deviation of the frequency of the intermediate frequency signal S _IF from the normal frequency _IF (for example, 58.75 MHz).
An up signal S _UP and an AFT down signal S _DOWN for lowering the local oscillation frequency _L are generated. In this case, the up signal S _UP is obtained when the frequency of the intermediate frequency signal S _IF is below the normal frequency _IF , for example within 1.5 MHz, while the down signal
S _DOWN is obtained when the intermediate frequency signal S _IF is within, for example, 0.7 MHz above the normal frequency _IF . In other words, the original AFT pull-in range is 1.5MHz above the local oscillation frequency _L , and 1.5MHz below the local oscillation frequency L.
It is assumed to be 0.7MHz.

The up signal S _UP and down signal S _DOWN from this AFT circuit 21 are transmitted through the interface 18.
It is supplied to the CPU 12. Further, the channel selection data S _DATA is supplied to the frequency divider 8 through the interface 19, and the frequency division ratio 1/N of the frequency divider 8 is changed based on this channel selection data S _DATA .

Further, this example operates according to the flowchart shown in FIG. 2 under the control of the CPU 12.

First, the channel selection unit 20 is operated by the user.
The operation starts when channel data S _CH is supplied to the CPU 12 . Then, this channel data S _CH is written into the RAM 14, for example. In other words, the local oscillation _frequency is
Since the normal frequency _O of _L is determined, the normal frequency _O is set.

Next, based on the channel data S _CH , channel selection data S _DATA such that the local oscillation frequency _L is _O −0.2 MHz is read out from the ROM 13, for example, and is supplied to the frequency divider 8 through the interface 19. Then, the frequency division ratio 1/N of this frequency divider 8 is changed based on this channel selection data S _DATA , and the local oscillation frequency _L is changed to _O -0.2MHz (the third
(see figure). In this case, the AFT retraction range is the fourth
As shown in the figure, the range is _O -0.9MHz to _O +1.3MHz.
In this case, when the AFT circuit 21 supplies the up signal S _UP or the down signal S _DOWN to the CPU 12 through the interface 18, the AFT operation 22 starts.

In addition, when it is not supplied, the next channel selection data S _DATA that makes the local oscillation frequency _L become _O + 1MHz
Similarly, the local oscillation frequency _L is _O + 1M based on
Hz (see Figure 3). At this time, AFT
The pull-in range is _O +0.3M as shown in Figure 4.
Hz ~ _O +2.5MHz. In this case, AFT circuit 21
When an up signal S _UP or a down signal S _DOWN is supplied to the CPU 12 through the interface 18, the AFT operation 22 begins.

In addition, if it is not supplied, the next channel selection data such that the local oscillation frequency _L becomes _O −1.0MHz
Similarly, based on S _DATA , the local oscillation frequency _L is
_O -1.0MHz (see Figure 3). At this time, the AFT pull-in range is as shown in Figure 4.
_O −1.7MHz to _O +0.5MHz. in this case,
An up signal S _UP or a down signal S _DOWN is sent from the AFT circuit 21 to the CPU via the interface 18.
12, the AFT operation 22 begins.

Moreover, when it is not supplied, the channel selection operation is ended.

The AFT operation 22 is controlled as follows.

First, it is determined whether the AFT signal is the _up signal SUP. If the up signal S is not _UP , it is determined whether the down signal S _DOWN is present. Then, if the down signal S _DOWN is not present, the AFT operation is stopped.

At this time, if the down signal S _DOWN (5th
Based on this, the tuning data S _DATA supplied to the frequency divider 8 is sequentially changed, the frequency division ratio 1/N is sequentially changed, and the local oscillation frequency _L is sequentially lowered. , the frequency of the intermediate frequency signal _SIF is successively lowered (arrow P). In FIG. 5, _IE is a regular intermediate frequency, and E _UP and E _DOWN indicate regions where an up signal S _UP and a down signal S _DOWN are obtained, respectively. In a state where the frequency of the intermediate frequency signal _SIF is successively lowered, it is determined whether or not there is an _up signal SUP. If this up signal S _UP is not present, the same state continues. and up signal
If there is S _UP (as shown in Figure 5B), then the tuning data supplied to the frequency divider 8 based on this
S _DATA is sequentially changed, the frequency division ratio 1/N is sequentially changed, the local oscillation frequency _L is sequentially increased, and the frequency of the intermediate frequency signal _SIF is sequentially increased (arrow Q). In this state, it is determined whether there is an up signal S _UP . If this up signal S _UP is present, the same state continues. And up signal S _UP
If there is no one (as shown in FIG. 5C), the AFT operation is stopped.

Furthermore, when it is first determined whether or not the AFT signal is the _up signal SUP, if it is the _up signal SUP, an operation similar to the AFT operation for the down signal S _DOWN described above is performed. Note that this detailed explanation will be omitted.

The example in Fig. 1 is configured as described above, and after the local oscillation frequency _L is set to the normal frequency _O based on the channel data S _CH , the local oscillation frequency _L is set to _O - 0.2MHz as shown in Fig. 3. , _O +
The AFT signal is detected by moving discontinuously to four points: 1.0 MHz, _O -1.4 MHz, and _O -1.0 MHz.
In this case, the original AFT pull range is
_O -0.7MHz to _O +1.5MHz, but as shown in Figure 4, when the local oscillation frequency _L is _O -0.2MHz, the AFT pull-in range is _O -0.9MHz to _O +
1.3MHz, local oscillation frequency _L is _O +1.0MHz
Then, the AFT pull-in range is _O +0.3MHz ~
_O +2.5MHz, local oscillation frequency _L becomes _O −
When set to 1.4MHz, the pull-in range of AFT is _O −
2.1MHz ~ _O +0.1MHz, local oscillation frequency _L
When _O −1.0MHz, the AFT pull-in range is
Since the range is _O -1.7MHz to _O +0.5MHz, the AFT pull-in range is substantially expanded to _O -2.1MHz to _O +2.5MHz. Therefore, it is suitable for application to a television receiver in a system (CATV) in which television signals are distributed to viewers via a transmission line such as a coaxial cable. In other words, CATV converts the broadcast channel and retransmits it over a transmission line, and the carrier frequency may deviate from the normal value, so it is possible to receive so-called frequency-offset signals that are outside the original AFT acquisition range. This is because there is a need to draw in people as well.

By the way, if there is noise such as intermodulation distortion or spurious, the down signal will be reduced as shown in Figure 6A, for example.
In an area E _UP ' (shown with diagonal lines) within the area E _DOWN where S _DOWN is obtained, an up signal S _UP may be temporarily obtained instead of the down signal S _DOWN . In such a case, there is a problem that the AFT operation (22 in FIG. 2) in the example of FIG. 1 may malfunction.

That is, in the case shown in FIG. 6A, first, the local oscillation frequency is sequentially lowered based on the down signal S _DOWN , and the frequency of the intermediate frequency signal S _IF is sequentially lowered (arrow P). In this state, it is determined whether or not there is an up signal S _UP , and as shown in FIG. 6B, an up signal S _UP due to noise is obtained in the region E _UP '. Therefore, based on this, the local oscillation frequency is sequentially increased, and the frequency of the intermediate frequency signal _SIF is sequentially increased (arrow Q). In this state, the up signal
It is determined whether there is S _UP , but in the 6th
As shown in FIG. C, when the signal goes out of the region E _UP ', the up signal S _UP disappears and the AFT operation is stopped. However, if the AFT operation stops at the position shown in FIG. 6C, the AFT operation will be incomplete and sufficient channel selection will not be performed.

Purpose of the Invention The present invention has been made in view of the above points, and
This is to prevent malfunctions due to noise as described above in AFT operation.

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a PLL frequency synthesizer type tuning circuit having an AFT circuit, in which when an AFT up signal and an AFT down signal are supplied almost simultaneously, the one that is supplied earlier in time is the one that is supplied earlier. This feature is characterized in that priority is given to the signals of

The present invention is configured in this way and is not affected by the up signal S _UP and down signal S _DOWN caused by noise.
Correct AFT operation can be performed using the original AFT signal.

Embodiment Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

In this example, the AFT operation 22' is controlled as shown in FIG.

First, it is determined whether the AFT signal is the _up signal SUP. If the up signal S is not _UP ,
It is determined whether the down signal S is _DOWN . Then, if the down signal S _DOWN is not present, the AFT operation is stopped.

At this time, if the down signal S is _DOWN (as shown in FIG. 5A), the tuning data S _DATA supplied to the frequency divider 8 is sequentially changed based on this, and the frequency division ratio 1/N is sequentially changed. The local oscillation frequency _L is sequentially lowered, and the frequency of the intermediate frequency signal _SIF is sequentially lowered (arrow P). In a state where the frequency of the intermediate frequency signal _SIF is successively lowered, it is determined whether or not there is an _up signal SUP. If there is no up signal S _UP , the same state continues. If there is an up signal S _UP , it is then determined whether there is a down signal S _DOWN . If there is a down signal S _DOWN (it is possible that the up signal S _UP is due to noise), the frequency of the intermediate frequency signal S _IF continues to be successively lowered. When there is no down signal S _DOWN (as shown in FIG. 5B), the tuning data S _DATA supplied to the frequency divider 8 is sequentially changed, the local oscillation frequency _L is sequentially increased, and the intermediate frequency signal S The frequency of _IF is increased sequentially (arrow P). In this state, it is determined whether there is an up signal S _UP .
If this up signal S _UP is present, the same state continues. If there is no up signal S _UP (as shown in FIG. 5C), the AFT operation is stopped.

Furthermore, when it is first determined whether or not the AFT signal is the _up signal SUP, if it is the _up signal SUP, an operation similar to the AFT operation for the down signal S _DOWN described above is performed.

The rest of the structure is the same as the example shown in FIG. Here, for example, as shown in FIG. 8A, the down signal
Area where S _DOWN can be obtained E _UP ′ within E _DOWN (shown with diagonal lines)
Consider the case where an up signal S _UP due to noise is obtained at the same time as a down signal S _DOWN .

In this case, first, the local oscillation frequency is sequentially lowered based on the down signal S _DOWN to generate an intermediate frequency signal.
The frequency of S _IF is successively lowered (arrow P). In this state, it is determined whether there is an up signal S _UP , and as shown in FIG. 8B, an up signal S _UP due to noise is obtained in the area E _UP '. 1st
AFT operation in the example (22 in Figure 2)
In this case, reverse direction control is performed based on this, but in this example, the down signal is also
It is determined whether there is S _DOWN . In this case, since the down signal S _DOWN is obtained, the state in which the frequency of the intermediate frequency signal S _IF is successively lowered continues as shown in FIG. 8C. In this state, it is determined whether there is any further up signal S _UP , and the correct up signal S _UP is obtained as shown in FIG. 8D. In this case, the down signal S _DOWN cannot be obtained, so
Based on this, the local oscillation frequency is sequentially increased, and the frequency of the intermediate frequency signal _SIF is sequentially increased (arrow Q). In this state, it is determined whether or not there is an up signal S _UP , and when the up signal S _UP disappears as shown in FIG. 8E, the AFT operation is stopped.

The same applies to the case where the down signal S _DOWN is temporarily obtained instead of the up signal S _UP in the region E _UP where the up signal S UP _is obtained.

Also, when it is outside the AFT pull-in range,
Even if an up signal and a down signal are output almost simultaneously due to the influence of noise, the CPU 12 determines that the channel is out of the pull-in range based on the channel selection state, and does not perform the AFT operation.

In this way, according to this example, erroneous errors caused by noise can be prevented.
Even if an AFT signal is obtained, it will not be affected by this,
AFT operation is performed without malfunction. Therefore, correct channel selection is performed.

Effects of the Invention According to the present invention described above, when the AFT up signal and the AFT down signal are supplied almost simultaneously, priority is given to the signal supplied earlier in time. The influence of erroneous AFT signals is prevented and
AFT operation is performed without malfunction. Therefore, correct channel selection can be performed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a PLL frequency synthesizer type tuning circuit, FIGS. 2 to 6 are diagrams explaining the example in FIG. 1, and FIG. 7 shows an example of the present invention. The diagram shown in FIG. 8 is a diagram used to explain the present invention. 2 is a tuner, 3 is an intermediate frequency amplifier, 8 is a programmable frequency divider, 9 is a phase comparator, 12 is a central processing unit, 20 is a tuning section, 21 is an AFT circuit, 2
2' is an AFT operation.

Claims (1)

[Claims] 1. A PLL frequency synthesizer that generates a tuning voltage, and when there is a received signal within the tuning range, an AFT up signal or an AFT down signal corresponding to the upper or lower of the specified tuning frequency and the received frequency. In the tuning device, the tuning device includes an AFT circuit that outputs an AFT up signal or an AFT down signal from the AFT circuit, and a control section that finely adjusts the tuning voltage based on an AFT up signal or an AFT down signal from the AFT circuit. A channel selection system characterized in that when either the signal or the AFT down signal is being output and the other signal is output at the same time, the other signal is ignored and fine adjustment is made. Device.