JPH0518317B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an image signal encoding/decoding device that encodes and decodes an image signal such as a television signal.

[Prior art]

In image signal encoding/decoding apparatuses used for video conferences and the like, there are cases where it is necessary to send high-resolution still images such as calligraphy and drawings in addition to moving images. Conventionally, in this case, still images have been transmitted using an encoding/decoding apparatus exclusively for still images, separate from an encoding/decoding apparatus for moving images.

[Purpose of the invention]

Therefore, an object of the present invention is to provide an image signal encoding/decoding device that can also transmit high-resolution still images such as documents and pictures in addition to moving images.

[Structure of the invention]

The image signal encoding/decoding device according to the present invention receives an input image signal consisting of an image signal and a still image signal, and a moving image/still image discrimination signal indicating the type of the input image signal, and predictively encodes the input image signal. An image signal encoding/decoding device comprising a predictive encoding unit that outputs an encoded image signal, and a predictive decoding unit that decodes the encoded image signal and outputs a decoded image signal consisting of a moving image signal and a still image signal. In the predictive encoding unit, an A/D conversion means performs analog-to-digital conversion (A/D conversion) on an input image signal and outputs it as a digital image signal, and a filter receives the digital image signal and performs predetermined filtering. receiving the digital image signal at one input terminal and the output signal of the filter means at the other input terminal, selecting one of them in accordance with a first control signal, and outputting the selected image signal as a first selected image signal. The first switch means delays the first selected image signal by one frame of the input image signal;
a first memory means for outputting a delayed image signal as a delayed image signal;
a second switch means for outputting either one as a second selected image signal according to a control signal; predictive encoding means for multiplexing a moving image/still image discrimination signal corresponding to the converted second selected image signal and outputting the same as an encoded image signal; the predictive decoding unit includes a demultiplexer that separates a video/still image discrimination signal from the encoded image signal; and a prediction function corresponding to the fourth control signal. predictive decoding means for predictively decoding the encoded image signal from which the moving image/still image discrimination signal has been separated and outputting the encoded image signal as a predictively decoded image signal;
a second memory means for delaying by a frame and outputting it as a second delayed image signal; a third switch means for outputting one of the selected image signals as a third selected image signal according to the control signal; and digital-to-analog conversion (D/A conversion) of the third selected image signal and output as a decoded image signal. and a control signal generating means for generating fourth and fifth control signals from the moving image/still image discrimination signal output from the demultiplexing means.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an image signal encoding/decoding apparatus according to an embodiment of the present invention. In this embodiment, the sampling frequency when converting the television signal from analog to digital is four times the frequency _SC of the subcarrier of the NTSC standard color television signal.

The predictive encoding unit 100 encodes a video television signal.
An input terminal Ta to which the signal Sa is input, an input terminal Tb to which the still image television signal Sb is input, an A/D converter 11, a filter circuit 12, and a still image memory that stores one frame of the still image television signal Sb. A delay circuit 13 and a frame memory 1 constitute the
4, 15, and an interframe differential encoding circuit 16,
variable length encoding circuit 17 and buffer memory 18
and line interface circuit and switch SW ₁ ,
SW ₂ , SW ₃ , SW ₃ ′, SW ₄ , SW ₅ and input terminal Tc
Control for switching switches SW ₁ , SW ₂ , SW ₃ (SW ₃ ′), SW ₄ , and SW ₅ by external control signal Sc (“high” if the television signal is a moving image, “low” if it is a still image) from the The signals S ₁ , S ₂ , S ₃ , S ₄ , S ₅ and the control signal Sd for switching the encoding mode in the interframe differential encoding circuit 16 are multiplexed with the television signal and currently encoded in the variable length encoding circuit 17. The control signal generation circuit 31 outputs a control signal Se indicating that the television signal being displayed is a still image.

The predictive decoding unit 200 includes a line interface circuit 21, a buffer memory 22, a variable length decoding circuit 23, and an interframe difference decoding circuit 24.
and frame memories 25 and 2 constituting a still image memory that stores one frame of a decoded still image.
6. Multiplexing on the television signal in the delay circuit 27, the D/A converter 28, the switches SW ₆ , SW ₇ , SW ₈ , SW ₉ , SW ₁₀ and the variable length encoding circuit 17 of the interframe encoding circuit 200 encoded control signal
Se is detected in the variable length decoding circuit 23, and a control signal Sf for switching the encoding mode in the interframe difference decoding circuit 24 and switches SW ₆ , SW ₇ ,
Control signals S ₆ , S ₇ , which switch SW ₈ , SW ₉ , SW ₁₀ ,
It consists of a control signal generation circuit 32 that outputs S ₈ , S ₉ , and S ₁₀ , respectively, and an output terminal Td that outputs a television signal that has been decoded and converted into an analog signal.

Next, the operation of the image signal encoding/decoding apparatus of this embodiment having the above configuration will be explained with reference to the time chart of FIG. 2.

Now, while transmitting the video television signal Sa, the time t ₀
When the external control signal Sc changes from “high” to “low”
Assume that the switch has been switched to . This allows the control signal
S ₁ and S ₂ change from “high” to “low” at time t ₁
Switches SW ₁ and SW ₂ are then switched, and the still picture television signal Sb is selected. This still picture television signal Sb is converted into 4 by the A/D converter 11.
After being converted into a digital signal at a sampling frequency of _xfsc , it is sent to a still image memory consisting of a delay circuit 13 and frame memories 14 and 15, bypassing the filter circuit 12. In this embodiment, video processing is performed in a time slot of (2×f _sc ) ^-1 , but still images are processed using A/D in order to obtain high resolution.
The output of the converter 11, a television signal digitized at a sampling frequency of (4×f _sc ), is sent as is. For this purpose, the delay circuit 13 for one time slot is required for the time slot of (4× _fsc ) ^-1 .
A two-phase expansion is performed using (2×f _sc ) ⁻¹ , and the television signal is divided into two phases, a first phase and a second phase, at a time slot of (2×f sc ) −1. The still image television signal divided into two phases in this way is converted into a control signal at time _t2 .
Switches SW ₃ and SW ₃ ' are switched by S ₃ ,
The first frame of the still image television signal.
The first phase is written into the frame memory 15 and the second phase is written into the frame memory 14 at the same time. As for the written still image television signal, first, at time _t3 , the switch _SW2 is switched by the control signal _S4 , and the frames of the first phase are outputted from the frame memory 14, and all the frames of the first phase are outputted. time t ₄
The switch SW ₄ is switched by the control signal S ₄ to output the second phase frame from the frame memory 15, and one still image television signal is output. The switch SW ₅ is switched by the control signal S ₅ at time t ₃ , and one frame of still picture television signal output from the frame memories 14 and 15 is input to the interframe differential encoding circuit 16 . The inter-frame differential encoding circuit 16 receives a control signal at time _t4 .
The encoding mode is switched to intraframe encoding mode by Sd (until time _t7 ), and the still picture television signal is intraframe encoded. The intra-frame encoded still picture television signal is sent to the variable length encoding circuit 17 where it is variable length encoded, and a control signal Se indicating that the television signal currently being encoded is a still picture is sent to the variable length encoding circuit 17. After being multiplexed, it is sent to a buffer memory 18 where it is smoothed over time, and then sent to a line interface circuit 19.
parallel/serial conversion is performed.
Sent to external line.

Next, the operation of predictive decoding section 200 will be explained. An encoded still image television signal input through an external line is first serial/parallel converted by a line interface circuit 21 and output to a buffer memory 22 where it is temporally smoothed and then sent to a variable length decoding circuit 23. is output to.
The control signal Se described above is detected by the control signal generation circuit 32 at time _t8 from the still picture television signal input to the variable length decoding circuit 23, and the still picture television signal is decoded into an equal length code. , are output to the interframe difference decoding circuit 24. In the interframe difference decoding circuit 24, the decoding mode is switched to the intraframe difference decoding mode by the control signal Sf from the control signal generation circuit 32, and decoding is performed. At time t ₈ , the switches SW ₆ and SW ₇ are switched to the frame memory 25 side by the control signals S ₆ and S ₇ , respectively, and the still image television of the first phase frame output from the interframe difference decoding circuit 24 is switched. At time _t9 , switches SW ₆ and SW ₈ are switched to the frame memory 26 side by control signals S ₆ and S ₈ , respectively, and the signal is output from the interframe difference decoding circuit 24. The still picture television signal of the second phase frame is written into the frame memory 26. The still image television signal written in these two frame memories 25 and 26 and subjected to two-phase expansion is switched to the switch SW ₉ by the control signal S ₉ from time t ₁₀ onwards.
is switched at a period of (4×f _sc ) ^-1 ,
A still picture television signal Sb sampled at a frequency of 4×f _sc ) ^-1 is reproduced. Next, the switch SW ₁₀ is switched for each frame by the control signal S ₁₀ , and the delay circuit 27 for two time slots is turned on/off at the (4×f _sc ) ^-1 time slot.
It is turned off and the subcarrier phase between frames is compensated. Finally, the output of the delay circuit 27 is digital/analog converted by the D/A converter 28, and the still picture television signal Sb is obtained at the output terminal Tc.
Note that the external control signal Se changes from "low" to "high" at time _t6 , and the video television signal Sa is again input to the predictive encoding unit 100.

〔Effect of the invention〕

As explained above, according to the present invention, a single still image encoding/decoding device is not provided separately.
This has the advantage that still picture television signals and moving picture television signals can be transmitted using only one picture signal encoding/decoding device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an image signal encoding/decoding apparatus according to an embodiment of the present invention, and FIGS. 2, 1 and 2 are time charts showing an example of its operation. In FIG. 1, 13...delay circuit, 14,1
5...Frame memory, 16...Inter-frame differential encoding circuit, 17...Variable length encoding circuit, 23...
...Variable length decoding circuit, 24...Inter-frame difference decoding circuit, 25, 26...Frame memory, 27
... Delay circuit, 31, 32 ... Control signal generation circuit, SW ₁ to _{SW 10} ... Switch, Sa ... Video television signal, Sb ... Still image television signal,
Sc...External control signal, _S1 , _S2 to _S10 , Sd, Se, Sf
……Control signal.

Claims (1)

[Claims] 1. An input image signal consisting of a moving image signal and a still image signal and a moving image/still image discrimination signal indicating the type of the input image signal are received, and the input image signal is predictively encoded to generate a coded image. An image signal encoding/decoding device comprising a predictive encoding unit that outputs a signal, and a predictive decoding unit that decodes the encoded image signal and outputs a decoded image signal consisting of a moving image signal and a still image signal, The predictive encoding unit includes: an A/D conversion unit that performs analog-to-digital conversion (A/D conversion) on an input image signal and outputs it as a digital image signal; and a filter that receives the digital image signal and performs predetermined filtering. means for transmitting the digital image signal to one input terminal;
a first switch means that receives the output signal of the filter means at the other input terminal, selects one of the signals according to a first control signal, and outputs the selected image signal as a first selection image signal; and the first selection. a first memory means for delaying the image signal by one frame of the input image signal and outputting the delayed image signal as a first delayed image signal; and receiving the first selected image signal at one input terminal;
The first delayed image signal is received at the other input terminal, and either one is input to the second input terminal according to the second control signal.
a second switch means for outputting the selected image signal as a selected image signal; and a second switch means for predictively encoding the second selected image signal using a prediction function according to a third control signal, and corresponding to the encoded second selected image signal. predictive encoding means for multiplexing the moving image/still image discrimination signal and outputting the same as the encoded image signal; and a first predictive encoding means for generating the first to third control signals from the moving image/still image discrimination signal. a control signal generating means, the predictive decoding unit comprising: a demultiplexing means for separating the moving image/still image discrimination signal from the encoded image signal; and a prediction function according to the fourth control signal. movie/
Predictive decoding means for predictively decoding the encoded image signal from which the still image discrimination signal has been separated and outputting it as a predictively decoded image signal, and delaying the predictively decoded image signal by one frame to generate a second delayed image a second memory means for outputting the predictive decoded image signal as a signal;
The second delayed image signal is received at the other input terminal, and either one is input to the third input terminal according to the fifth control signal.
a third switch means for outputting the selected image signal as the selected image signal; a D/A conversion means for performing digital-to-analog conversion (D/A conversion) on the third selected image signal and outputting it as the decoded image signal; An image signal encoding/decoding device comprising control signal generating means for generating the fourth and fifth control signals from the moving image/still image discrimination signal output from the demultiplexing means.