JPH052153B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a cursor display method in a display device such as a cathode ray tube (CRT) display device.

[Conventional technology]

As is well known, when displaying characters on a display screen in a CRT display device, the character code of the displayed character is stored at that display position in a refresh memory that has an address in one-to-one correspondence with each character display position on the display screen. Write to the corresponding address, read the character code written to the refresh memory using the address signal that specifies the character position in the row direction (vertical direction) and column direction (horizontal direction), and then use this character code to generate a character. The font data of characters stored in advance in the character generator is read out, and the font data is converted into a serial video signal and inputted as a brightness modulation signal to the display section.

In this case, the character codes in the refresh memory are sequentially written in by a processor such as a microcomputer that controls the operation of the entire display device in response to operations on a keyboard or the like. Also,
Typically, a cursor symbol is arranged to be displayed along with the character to indicate the current position or the next position of the displayed character.

Incidentally, in a display device that displays such a cursor symbol together with characters, there are many cases where a series of data processing results or data transferred from the outside are continuously displayed at high speed as characters on the display section.

[Problem that the invention seeks to solve]

However, in the past, even when characters are displayed continuously at high speed as described above, the cursor symbol is displayed while moving in synchronization with the character display, so the cursor symbol display becomes distracting and makes the display screen difficult to see. There was a problem. In particular, a block cursor symbol in which the cursor symbol is displayed in such a way that the background color of the displayed character and the color of the character pattern are different from the other parts has the problem that the screen becomes very difficult to see.

[Means and actions for solving problems]

SUMMARY OF THE INVENTION The present invention aims to solve the above-mentioned problems by providing a monitoring means for monitoring the write cycle of character codes in a memory that stores character codes, and when the write cycle of character codes is shorter than a predetermined cycle, the cursor This prohibits the display of symbols.

〔Example〕

Hereinafter, the present invention will be explained in detail based on examples.

FIG. 1 is a block diagram showing an embodiment of the present invention, in which a refresh memory 1 has a memory address that corresponds one-to-one with the characters to be displayed on the display section 15 in one display frame period and is equal to the maximum number of display characters. When displaying characters at display position y _i in the row direction (vertical direction) and display position x _i in the column direction (horizontal direction) of the display section 15, the address indicated by y _i and x _i The character code of the displayed character is written to. In this case, the refresh memory 1 is located within the memory address space of the entire display device, where y _i =
The address range is assigned to k to p (k<p) and x _i =j to g (j<g).

The refresh counter 3 counts clock signals synchronized with the raster scan, and displays the clock signals on the display section 15.
An address signal indicating the display position of the display character in the row direction and column direction is output. The address range that can be specified by this address signal output from the refresh counter 3 is set to the above address range y _i = k to p, x _i = j to g, and the decoder 3 Address range is decoded. The signal resulting from the decoding is selected by the multiplexer 4 and input as a chip select signal to the refresh memory 1 in an effective display period excluding the horizontal scanning period and the vertical scanning period. As a result, the refresh memory 1 enters an enabled state where it can be read and written only in the address range y _i = k to p, x _i = j to g, and the refresh counter 2 input via the second multiplexer 5 Each address is sequentially designated by an address signal from the address signal, and a character code is read or written at this address.

The character code read from the refresh memory 1 is input to the address input of the character generator 6.

The character generator 6 is composed of a memory element such as a read-only memory or a random access memory,
Font data of displayable characters is stored in advance, and when a character code is input from the refresh memory 1, font data corresponding to this character code is output. The font data output from the character generator 6 is converted into serial pixel data in a parallel/serial converter (P/S/C) 7 in units of data for each horizontal scanning line, and is converted into serial pixel data by an OR gate 8.
After calculating the logical sum with the cursor symbol display signal, the signal is inputted as a brightness modulation signal to the display section 15.

As a result, the character code previously stored in the refresh memory 1 is displayed at the display position of the display unit 15 corresponding to the storage address. At this time, the last display character or the next display character is displayed with a cursor symbol added to it.

On the other hand, the processor 9, which serves as a means for writing character codes into the refresh memory 1, uses addresses y _i = k to p, x _i =
An address signal in the range of j to g and corresponding to the display position of the character is outputted and supplied to the address input of the refresh memory 1 via the multiplexer 5. The address signal at this time is decoded by the decoder 10, becomes a chip select signal CS, and is supplied to the chip select input of the refresh memory 1 via the first multiplexer 4. The processor 9 outputs a character code write command signal MW in synchronization with the transmission of the address signal, supplies it to the read/write control input of the refresh memory 1 via the third multiplexer 11, and also outputs the character code to be written. is supplied to the data input/output terminal of the refresh memory 1.

Figure 2a shows the address signal output by the processor 9, Figure 2b shows the chip select signal output by the decoder 10, Figure 2c shows the write command signal MW, Figure 2d
It shows the output timing of the character code to be written to.

Note that the multiplexers 4, 5, and 11 are switched to the processor 9 side during the horizontal retrace period and the vertical retrace period.

As a result, the character code output from the processor 9 is written to the address of the refresh memory 1 designated by the write address signal.
Then, within a new display frame period, the data is read out by the address signal output from the refresh counter 2 and displayed as characters on the display section 15.

By the way, while the processor 9 is writing a character code, the chip select CS signal output from the decoder 10 and the write command signal WW output from the processor 9 are connected to the AND gate 1.
In 2, the logical product is calculated. A retriggerable multivibrator 13 is triggered by the AND signal.

The multivibrator 13 has its unstable time
T _n is set slightly longer than the time corresponding to the maximum writing speed of the character code, and the AND gate 1
_When triggered by the output signal of
supply to. A serial signal CSI for displaying a cursor symbol is input to the AND gate 14, and when the output signal of the multivibrator 13 is at "H" level, this serial signal CSL is output as is, and the display character is input to the OR gate 8. The logical OR with the serial signal is calculated and output to the display section 15.

However, when the output signal of the multivibrator 13 is at "L" level, the AND gate 14 does not output the serial signal CSL for displaying the cursor symbol.

Therefore, the character code is multivibrator 13.
When writing is being performed at a speed shorter than the unstable time T _n of , the output signal of the multivibrator 13 is continuously at the "L" level, and the serial signal CSL for cursor symbol display is no longer input to the OR gate 8. No cursor symbol is displayed.

FIG. 2e shows the output signal of the multivibrator 13, FIG. 2f shows a serial signal for displaying a cursor symbol, and FIG. 2g shows the output signal of the AND gate 14.

〔Effect of the invention〕

As described above, in the present invention, if the writing cycle of the character code becomes shorter than a predetermined value, the signal for displaying the cursor symbol is prohibited from being input to the logical sum circuit that calculates the logical sum with the signal for displaying characters. Therefore, the cursor symbol will not be displayed. As a result, it is possible to eliminate the difficulty in viewing the display screen.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention;
FIG. 2 is a time chart of various signals in FIG. 1. 1... Refresh memory, 2... Refresh counter, 8... OR gate, 9... Processor, 13... Multivibrator, 14... AND gate.

Claims (1)

[Scope of Claims] 1. It has a memory for storing character codes of characters to be displayed, sequentially reads out the stored character codes from a character code writing means to this memory, and further writes font data corresponding to the character codes. is generated from a character generator, the logical sum of this font data and a cursor symbol display signal representing the current position or the next display position of the displayed character is determined by an OR circuit, and the logical sum signal is inputted to the display section, In a display device that displays a cursor symbol along with characters, a monitoring means is provided to monitor the writing cycle of the character code by the writing means, and if the writing cycle is within a predetermined value, input of the cursor symbol display signal to the logical sum circuit is prohibited. , a cursor display method for a display device characterized by not displaying a cursor symbol.