JPH0522875B2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a battery capacity meter that can detect the electrical energy capacity (hereinafter referred to as remaining capacity) remaining in a battery mounted on an electric vehicle, battery lift truck, etc. It is.

Prior Art Vehicles with a normal engine are equipped with a fuel gauge, which indicates the remaining fuel capacity, but electric vehicles, battery lift trucks, etc. are also required to display the remaining capacity of the battery. . The battery capacity meter disclosed in JP-A-58-117470 focuses on the fact that the voltage across the battery terminals under no load (hereinafter referred to as open circuit voltage) is almost proportional to the specific gravity of the electrolyte. A capacitor is connected in parallel with the battery through a diode (unidirectional current-carrying element), the capacitor is charged with the battery voltage, the open circuit voltage is stored in the capacitor, and the voltage obtained by converting the terminal voltage of the capacitor into impedance with an amplifier is used. The battery capacity is displayed. The voltage of this capacitor is discharged through the amplifier, so when a load is connected to the battery and the battery voltage is decreasing, the capacitance is indicated by the gradually decreasing terminal voltage (discharge voltage) of the capacitor. Further, when the load is disconnected from the battery and the battery voltage becomes higher than the terminal voltage of the capacitor, the capacitance is indicated by the increasing terminal voltage (charging voltage) of the capacitor. Therefore, the capacitance value displayed by this conventional capacitance meter increases or decreases depending on changes in the terminal voltage of the capacitor, and therefore the detection accuracy cannot necessarily be said to be good.

An object of the invention is to improve detection accuracy compared to the conventional art when detecting the capacity of a battery using the terminal voltage of a capacitor charged with an open circuit voltage.

Configuration of the Invention The battery capacity meter of the present invention includes a capacitor connected in parallel to a battery to which a load to be turned on and off is connected via a unidirectional current-carrying element, and an amplifier that converts the voltage of the capacitor into impedance. The output voltage of the amplifier is output as the peak value of the battery voltage. The sample command circuit detects the moment when a load is connected to the battery and outputs a sampling command signal, and the sample hold circuit receives the sampling command signal as input and samples and holds the output signal of the peak value hold circuit. The output voltage of the sample and hold circuit is then used as a signal indicating the remaining capacity of the battery.

The present invention further includes a timer that outputs a sampling prohibition signal for a certain period of time from the moment the load is disconnected from the battery, and compares the output voltage of the amplifier with a reference output that is smaller than the output voltage of the sample and hold circuit by a predetermined value. A comparison circuit that outputs a sampling permission signal for a period in which the output voltage is higher than a reference voltage, and a gate circuit that receives the outputs of a sample command circuit, a timer, and the comparison circuit as inputs are used. The gate circuit prohibits the sampling command signal from being input to the sample hold circuit during the period when the sampling prohibition signal is input, and prohibits the sampling command signal from being input to the sample hold circuit during the period when the sampling prohibition signal is not input and the sampling permission signal is input. Allows a sampling command signal to be input to the sample and hold circuit.

Effect of the Invention When a load is connected to the battery, the battery voltage decreases, and it takes a predetermined time for the battery voltage to recover after the load is disconnected from the battery. The present invention uses a timer and gate circuit to prevent sampling of the amplifier output voltage, which is proportional to the capacitor terminal voltage, until the load is disconnected from the battery and the battery voltage is restored. Even if a timer is used, if the battery voltage decreases significantly during load, the battery voltage may not recover sufficiently. In the present invention, even if the timer does not output a sampling prohibition signal, the comparator circuit does not output a sampling permission signal unless the output voltage of the amplifier becomes larger than the reference voltage, so the gate circuit samples and holds the sampling command signal. Do not supply to the circuit. Therefore, it is possible to prevent a malfunction in which the terminal voltage of a capacitor that is not charged with the recovered battery voltage is sampled as the battery open circuit voltage. At the time when the sampling signal is output, the battery voltage has already decreased, so it is not possible to obtain a sampling permission signal by comparing the battery voltage with the reference voltage. Therefore, in the present invention, the output voltage of the amplifier and the reference voltage are compared.

The present invention prevents erroneous sampling as described above, and displays the previously measured remaining capacity until sampling is performed. In comparison, detection accuracy can be increased.

Embodiments Hereinafter, the battery capacity meter of the present invention will be explained in detail with reference to illustrated embodiments.

Figure 1 shows a circuit configuration for explaining the basic principle used in the present invention.
is the battery, 2 is the motor that is its load, 3 is the switch that turns motor 2 on and off, and battery 1 is
A motor 2 is connected to both ends of the motor 2 via a switch 3. Further, 4 is a peak value hold circuit, 5 is a sample command circuit, 6 is a sample hold circuit,
7 is a display meter, and a peak value hold circuit 4 is connected in parallel to the series circuit of the battery 1, switch 3, and motor 2, and a sample hold circuit 6 is connected to its output terminal. Further, a display meter 7 is connected to the output end of the sample hold circuit 6, an input end of the sample command circuit 5 is connected to the positive electrode side of the battery 1, and an output end is connected to the sample switch 61 of the sample hold circuit 6. . The peak value hold circuit 4 is composed of a diode 41 as a unidirectional conductive element, a capacitor 42, and an amplifier 43 that converts the voltage of the capacitor 42 into impedance.The anode of the diode 41 is connected to the positive electrode of the battery 1, and the cathode is connected to one end of the capacitor 42. and the input terminal of the amplifier 43, and the other end of the capacitor 42 is connected to the negative terminal of the battery 1, respectively. The sample command circuit 5 is constituted by a fall detection circuit consisting of a kind of differentiation circuit. The sample hold circuit 6 is composed of a sample switch 61, a capacitor 62, and an amplifier 63. One end of the sample switch 61 is connected to the output end of the amplifier 43 of the peak value hold circuit 4, and the other end is connected to one end of the capacitor 62 and the input end of the amplifier 63. The output end of the amplifier 63 is connected to the display meter 7, and the other end of the capacitor 62 is connected to the negative electrode of the battery 1.

Next, the operation will be explained. First, the changes in the terminal voltage of the battery 1, that is, the battery voltage Vb, are shown in FIG. 2A. In the figure, from time t ₁ to
During _t2 and between _t3 and _t4 , the switch 3 is closed, current flows to the motor 2 as a load, and the battery voltage Vb decreases. Also, the period between time t ₂ and _{t 3} is a period in which the load is disconnected from the battery, and the battery voltage Vb during this period, that is, the open circuit voltage Vb
Immediately after the load is released, the voltage is gradually lower than the normal open-circuit voltage, then it rises rapidly for several seconds, and continues to rise slowly for several minutes.
This means that it is not advisable to measure the battery voltage Vb immediately after a no-load state, and it is best to measure the open circuit voltage (battery voltage) Vb as late as possible, that is, just before the time _t3 when switch 3 closes, to get the desired open circuit voltage. It can be seen that similar values can be obtained.

In the peak value hold circuit 4, the battery voltage
When Vb is higher than the voltage Vc' across capacitor 42, diode 41 becomes conductive and charges capacitor 42. Conversely, the battery voltage Vb is the capacitor 42
When the voltage across the diode 41 is lower than Vc′, the diode 41
becomes non-conductive, and the voltage across the capacitor 42
Vc' is maintained higher than the battery voltage Vb. In other words, the capacitor 42 is connected to the battery voltage Vb.
The peak value of is maintained. The amplifier 43 is provided to impedance convert the voltage across the capacitor 42 and send it to the outside.
Vc is set to be equal to the voltage Vc' across the capacitor 42. However, in reality, even while the diode 41 is non-conducting, the value of the voltage Vc' across the capacitor gradually decreases due to the leakage current of the capacitor itself and the discharge current flowing through the input resistance of the amplifier 43, and the output voltage Vc of the amplifier 43. also gradually decreases. The state of change in the voltage Vc' across the capacitor 42, that is, the output voltage Vc of the amplifier 43, is as shown by the broken line in _FIG . ₃ , even if the battery voltage Vb decreases due to the load, the output voltage Vc maintains approximately the value of the battery voltage Vb immediately before being applied to the load.

Since the sample command circuit 5 consists of a falling detection circuit configured with a kind of differentiating circuit, immediately after the battery voltage Vb suddenly drops, a sampling command signal, which is a constant pulse signal, is generated as shown in FIG. 2B. Generate Vs. In the sample hold circuit 6, the capacitor 62 is closed because the sample switch 61 is closed while the sampling command signal Vs is present.
The voltage across it becomes equal to the output voltage Vc of the amplifier 43. Since the sample switch 61 is open when the sampling command signal Vs is not present, the voltage across the capacitor 62 is maintained at a constant value. The amplifier 63 is for driving the display meter 7, and its output voltage V0 is proportional to the voltage across the capacitor 62. The change in output voltage V0 is the second
This is shown by the dashed line in the figure. As can be seen from the figure, the output voltage of the sample and hold circuit 6
V0 changes immediately after the load is applied, but its value becomes equal to the value of the battery voltage Vb just before the load is applied. According to this circuit configuration, it is possible to always output the value closest to the open circuit voltage as the detection signal voltage V0 depending on the driving state of the vehicle.
By adding this to the display meter 7, the battery capacity can be indicated. In the above explanation, it is assumed that a load is applied to the battery after the open-circuit voltage has sufficiently recovered, but in reality, a load is applied before the open-circuit voltage has sufficiently recovered, and sampling malfunctions occur.

FIG. 3 shows an embodiment of the present invention that can deal with such a case. In the following description, the same reference numerals are used for parts equivalent to those in FIG. 1. In FIG. 3, 5' is the same sample command circuit as in FIG. 1, 8 is a timer, 9 is a comparison circuit, and 10
is a gate circuit, and these constitute the sample control circuit 50. That is, the outputs of the sample command circuit 5', the timer 8, and the comparison circuit 9 are input to the gate circuit 10, and the output of the gate circuit 10 is connected to the sample switch 61. The input terminals of the sample command circuit 5' and the timer 8 are connected to the positive terminal of the battery 1. The comparison circuit 9 is composed of a series circuit of resistors 91 and 92 and a comparator 93.
The series circuit No. 2 is connected in parallel to the display meter 7, and is connected to the negative input terminal of the comparator 93 and the resistor 91.
and 92 connection points are connected. Furthermore, the positive input terminal of the comparator 93 is connected to the output terminal of the amplifier 43.

In the embodiment of FIG. 3, the sample command circuit 5'
The operation is similar to that of the embodiment shown in FIG. The sampling command signal Vs' output from the sample command circuit 5' is shown in FIG. 4B.
The timer 8 is triggered by the rise of the battery voltage Vb and generates an output for a certain period of time T, and the waveform of the output signal (sampling prohibition signal) Vt is as shown in FIG. 4C. In addition, in the comparator circuit 9, the output voltage V0 of the sample hold circuit 6 is connected to the resistor 9.
Reference voltage V9 divided by 1 and 92 (here V0
90% of ) and the output voltage Vc of the peak value hold circuit 4, and the output voltage Vc is the reference voltage V9.
Only while Vc is greater than 90% of V0, the output voltage (sampling permission signal) Vh is generated as shown in FIG. 4D. The gate circuit 10 is a sampling prohibition signal Vt
The sampling command signal Vs' is passed as the sampling command signal Vs, as shown in FIG. 4E, only when the sampling signal Vs' and the sampling permission signal Vh are not generated at the same time.

The operation will be explained in more detail with reference to FIG. 4. In the figure, _t1 indicates the time when a normal measurement was performed. Next, at time _t3 , the load is applied again and the battery voltage Vb falls, so the sampling command signal Vs' is generated from the sample command circuit 5', but for T seconds from time _t2 , the sampling prohibition signal is sent from the timer 8. Vt is occurring and t ₃ − _{t 2}
<T, the sampling command signal Vs is not generated at time _t3 , and malfunction can be avoided. Note that the size of the time limit T of the timer varies depending on the situation, but generally about 5 to 50 seconds is appropriate.
Next, at time _t5, a load is applied again, but even though the unloaded period ( _t5 - _t4 ) before that is slightly longer than the time limit T of the timer, the battery voltage Vb has not yet fully recovered. Furthermore, the terminal voltage of the capacitor 42 or the output voltage Vc of the amplifier 43 is also greatly reduced because the load condition continues to be repeated. In this case, since the output voltage Vc is 90% or less of the voltage V0, the comparator circuit 9 outputs a sampling permission signal.
Vh is not generated and the sampling command signal Vs is blocked. Furthermore, at time t ₇ , there is a no-load period (t ₇ − _{t 6} )
is long enough that the battery voltage Vb has fully recovered. Therefore, sampling command signal Vs' and sampling permission signal Vh are generated, and since sampling prohibition signal Vt does not exist, supply of sampling command signal Vs is permitted and measurement is performed. As described above, in this embodiment, the sample control circuit 50 performs appropriate sampling to improve the reliability and accuracy of measurement.

In the above embodiment, the reference voltage V9, which is 90% of the voltage V0, is input to the negative input terminal of the comparator 93, but a Zener diode or the like is used in place of the resistors 91 and 92, and a constant voltage Vz is subtracted from the voltage V0. A reference voltage lower by a certain value may be obtained.

Next, FIG. 5 shows an embodiment embodying the configuration of FIG. 3. In FIG. 5, the battery voltage
Vb passes through an amplifier circuit 11 composed of resistors 111, 112 and an amplifier 113, and is converted into a signal Vb'. Although this amplifier circuit 11 was omitted in the embodiment shown in FIG. 3, if the battery voltage Vb is too low or too high, such an amplifier circuit can be used to convert the battery voltage to an appropriate voltage. is preferred. In the peak value hold circuit 4, a comparator 44 is added before the diode 41. By greatly amplifying the difference between the input voltage Vb' and the voltage of the capacitor 42, the diode 41 can be made conductive or non-conductive even if there is a slight potential difference, and an accurate peak value can be maintained. It is for the purpose of In the sample and hold circuit 6, a digital circuit is used in place of the combination of a sample switch and a capacitor used in the embodiment of FIG. That is, the A-D converter 64 converts the output voltage Vc of the sample hold circuit 6 into a digital signal (6 bits in the example shown), and inputs the value to the latch register 65 when the sampling command signal Vs is generated. be. The output of this latch register is again converted into an analog signal V0 by a DA converter 66. With this digital method, it is possible to make the holding time of the output voltage V0 of the peak value hold circuit infinitely long, and it is possible to obtain an extremely high-performance sample and hold circuit. In the embodiment shown in FIG. 5, the sample command circuit 5' is constituted by a differentiating circuit consisting of a capacitor 51' and resistors 52' and 53', and the output thereof is sent to the gate circuit 10 by using a comparator 54'. , a sampling command signal Vs' generated at the falling edge of the battery voltage Vb' is obtained. In the timer 8, a differentiating circuit is similarly constituted by a capacitor 81 and resistors 82 and 83, and a rising pulse of Vb', which is the output of the differentiating circuit, is inputted to a monostable multivibrator 85 through a comparator 84, and a pulse with a predetermined width T is generated. It is occurring. In this case, by changing the values of the capacitor 86 and resistor 87 of the monostable multivibrator 85, the time limit T
The value of can be set arbitrarily. Furthermore, for convenience when using the monostable multivibrator 85 next time, the output of the monostable multivibrator 85 is set as a negative signal in which the presence or absence of pulses is reversed from that in FIG. An AND gate can be used.

In each of the above embodiments, the battery voltage Vb
The on/off state of the load is detected by the falling and rising edges of the switch 3, but if a signal directly indicating the on/off state of the load can be obtained in conjunction with the switch 3, this signal may be used to detect the on/off state of the load. That is clear.

Effects of the Invention According to the present invention, in order to prevent erroneous sampling and display the previously measured remaining capacity until sampling is performed, the present invention is different from conventional capacity meters in which the remaining capacity fluctuates. Compared to this, it has the advantage of increasing detection accuracy.

[Brief explanation of the drawing]

Fig. 1 is a basic circuit diagram for explaining the basic principle used in the present invention, and Fig. 2 A and B are the first circuit diagram, respectively.
Figure 3 is a basic circuit diagram showing an embodiment of the present invention, Figures 4 A to E are respectively operational waveform diagrams of Figure 3, and Figure 5 embodies the configuration of Figure 3. 1 is a circuit diagram showing an embodiment of the present invention. FIG. 1...Battery, 2...Load (motor), 3...
...Switch, 4...Peak value hold circuit, 5,
5'... Sample command circuit, 6... Sample hold circuit, 7... Display meter, 8... Timer,
9... Comparison circuit, 10... Gate circuit, 50...
Sample control circuit, 61...Sample switch.

Claims (1)

[Claims] 1. The amplifier comprises a capacitor connected in parallel via a unidirectional current-carrying element to a battery connected to a load to be turned on and off, and an amplifier that converts the voltage of the capacitor into impedance. a peak value hold circuit that outputs an output voltage as a peak value of battery voltage of the battery; a sample command circuit that detects the moment when a load is connected to the battery and outputs a sampling command signal; and a sample command circuit that receives the sampling command signal. and a sample hold circuit that samples and holds the output signal of the peak value hold circuit, and the output voltage of the sample hold circuit is used as a signal indicating the remaining capacity of the battery, the battery capacity meter comprising: a timer that outputs a sampling prohibition signal for a certain period of time from the moment the circuit is disconnected from the battery; and a timer that compares the output voltage of the amplifier with a reference voltage that is smaller than the output voltage of the sample and hold circuit by a predetermined value, and determines the output voltage of the amplifier. a comparator circuit that outputs a sampling permission signal for a period in which is greater than the reference voltage; and inputs the outputs of the sample command circuit, the timer, and the comparison circuit, and outputs the sampling command signal during the period when the sampling prohibition signal is input. The sampling command signal is prohibited from being input to the sample hold circuit, and the sampling command signal is prohibited from being input to the sample hold circuit during a period when the sampling prohibition signal is not input and the sampling enable signal is input. A battery capacity meter that is equipped with a gate circuit that allows for