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JPH0525189B2 - - Google Patents
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JPH0525189B2 - - Google Patents

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Publication number
JPH0525189B2
JPH0525189B2 JP22972785A JP22972785A JPH0525189B2 JP H0525189 B2 JPH0525189 B2 JP H0525189B2 JP 22972785 A JP22972785 A JP 22972785A JP 22972785 A JP22972785 A JP 22972785A JP H0525189 B2 JPH0525189 B2 JP H0525189B2
Authority
JP
Japan
Prior art keywords
light emitting
emitting diode
type
light
mesa
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP22972785A
Other languages
Japanese (ja)
Other versions
JPS6288375A (en
Inventor
Toshio Sagawa
Kazuhiro Kurata
Takeshi Takahashi
Genta Koizumi
Akizumi Sano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP60229727A priority Critical patent/JPS6288375A/en
Priority to DE3541790A priority patent/DE3541790C2/en
Publication of JPS6288375A publication Critical patent/JPS6288375A/en
Priority to US07/178,648 priority patent/US4984035A/en
Publication of JPH0525189B2 publication Critical patent/JPH0525189B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、半導体チツプの裏面に共通電極、表
面に複数個の個別電極を有するモノリシツク発光
ダイオードアレイに関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a monolithic light emitting diode array having a common electrode on the back side of a semiconductor chip and a plurality of individual electrodes on the front side.

[従来の技術] 従来、モノリシツク発光ダイオードとしては、
単結晶基板の上に成長させたエピタキシヤル成長
層に不純物を拡散させた構造が知られている。
[Conventional technology] Conventionally, monolithic light emitting diodes are
A structure in which impurities are diffused into an epitaxial growth layer grown on a single crystal substrate is known.

第3図は、従来のモノリシツク発光ダイオード
アレイの上面図、第4図は第3図におけるA−
A′断面の斜視図である。
FIG. 3 is a top view of a conventional monolithic light emitting diode array, and FIG. 4 is a top view of a conventional monolithic light emitting diode array.
FIG. 3 is a perspective view of section A′.

図中、1はn型GaAs基板、2および3はそれ
ぞれエピタキシヤル成長させたn型GaAs1-xPx
およびn型GaAs層である。4および5は、n型
GaAs層3の表面からZnを選択拡散させることに
よつて形成したp型領域であつて、4は発光再結
合部、5は各発光再結合部4よりなる個々の発光
ダイオード部門のアイソレーシヨンストライブで
ある。6は各発光ダイオード部のn型GaAs層3
の電極部9上に設けられた通電用の個別プラス電
極、7はn型GaAs基板の裏面に設けられた各発
光ダイオード部共通のマイナス電極である。
In the figure, 1 is an n-type GaAs substrate, 2 and 3 are an epitaxially grown n-type GaAs 1-x P x layer and an n-type GaAs layer, respectively. 4 and 5 are n-type
A p-type region formed by selectively diffusing Zn from the surface of the GaAs layer 3, 4 is a light emitting recombination part, and 5 is an isolation region of each light emitting diode section consisting of each light emitting recombination part 4. It's a tribe. 6 is the n-type GaAs layer 3 of each light emitting diode part
An individual positive electrode for conducting electricity is provided on the electrode portion 9, and 7 is a negative electrode common to each light emitting diode portion provided on the back surface of the n-type GaAs substrate.

プラス電極6、マイナス電極7間に正バイヤス
を加えると、n型GaAs1-xPx層2からの電子はp
型領域である発光再結合部4に注入され、発光再
結合による光は、個別プラス電極6およびn型
GaAs層3に設けられた光取り出し孔8を通つて
矢印Cの示す如く外部に放出される。
When a positive bias is applied between the positive electrode 6 and the negative electrode 7, the electrons from the n-type GaAs 1-x P x layer 2 become p
The light is injected into the luminescent recombination part 4 which is the mold region, and the light due to the luminescent recombination is transferred to the individual positive electrode 6 and the n-type
The light is emitted to the outside as indicated by arrow C through the light extraction hole 8 provided in the GaAs layer 3.

[発明が解決しようとする問題点] しかし、従来の拡散型発光ダイオードアレイは
上記したような構成であるため、p−n接合面積
に比べて発光面積が小さく、電流に対する発光量
が少ないという問題があつた。
[Problems to be Solved by the Invention] However, because the conventional diffused light emitting diode array has the above-mentioned configuration, the problem is that the light emitting area is small compared to the pn junction area, and the amount of light emitted relative to the current is small. It was hot.

この問題点を解消しようとして、光取り出し孔
8を大きくすることは容易に考えられるが、その
ためには、光取り出し孔8を形成する電極6の輪
郭部分が細くなり、その部分が断線した場合な
ど、電流に対する発光量が著しく低下してしまう
といつた問題が新たに生じてしまう。
In order to solve this problem, it is easy to think of enlarging the light extraction hole 8, but in order to do so, the outline part of the electrode 6 that forms the light extraction hole 8 becomes thinner, and if that part becomes disconnected, etc. However, a new problem arises in that the amount of light emitted relative to the current decreases significantly.

[発明の目的] 本発明の目的は、前記した従来技術の問題点を
解消し、発光ダイオード部の発光面積が大きく且
つ発光効率の高いモノリシツク発光ダイオードア
レイを提供することにある。
[Object of the Invention] An object of the present invention is to solve the problems of the prior art described above and to provide a monolithic light emitting diode array in which the light emitting diode portion has a large light emitting area and high light emitting efficiency.

[問題点を解決するため手段] 即ち、本発明の要旨は、GaAs基板上にp−n
接合面が形成されるよう少なくとも一層の混晶系
エピタキシヤル層が成長され、前記p−n接合面
が相直交するメサ・エツチング溝により一列に並
ぶ複数個の島状の発光ダイオード部に分割されて
なるモノリシツク発光ダイオードアレイにおい
て、前記発光ダイオード部の中心部から通電用配
線が前記発光ダイオード部と平行な位置に形成さ
れている電極領域へ引き出されており、前記各発
光ダイオード部の発光面がU字型になるようにし
たことにある。
[Means for solving the problem] That is, the gist of the present invention is to
At least one mixed crystal epitaxial layer is grown to form a junction surface, and the pn junction surface is divided into a plurality of island-like light emitting diode portions aligned in a row by mutually orthogonal mesa etching grooves. In the monolithic light-emitting diode array, a current-carrying wiring is drawn out from the center of the light-emitting diode part to an electrode region formed in a position parallel to the light-emitting diode part, and the light-emitting surface of each light-emitting diode part is The reason is that it is U-shaped.

[実施例] 以下、本発明の実施例を図面に基づき詳細に説
明する。
[Example] Hereinafter, an example of the present invention will be described in detail based on the drawings.

第1図に本発明のメサ型モノリシツク発光ダイ
オードアレイの上面図、第2図に第1図のB−
B′断面の斜視図を示す。
FIG. 1 is a top view of the mesa-type monolithic light emitting diode array of the present invention, and FIG.
A perspective view of the B′ section is shown.

図中、21はP型GaAs基板、22はエピタキ
シヤル成長させたp型Ga1-xAlxAs層であり、そ
の混晶比xの値はx=0.10〜0.35程度の範囲内
で、これは希望する発光波長によつて適宜定めら
れる。23はp型Ga1-xAlxAs層22上にエピタ
キシヤル成長させたn型Ga1−yAlyAs層であり、
この混晶比yは、上記混晶比xよりも高くするこ
とによつて、p型Ga1-xAlxAs層22からの発光
波長に対する光透過性と、このn型Ga1-yAlyAs
層23からの電子の注入効率の増加およびp型
Ga1-xAlxAs層22内に注入された少数キヤリア
の閉じ込めを図つている。
In the figure, 21 is a P-type GaAs substrate, 22 is an epitaxially grown p-type Ga 1-x Al x As layer, and the value of the mixed crystal ratio x is within the range of x = 0.10 to 0.35. is appropriately determined depending on the desired emission wavelength. 23 is an n-type Ga1 - yAlyAs layer epitaxially grown on the p-type Ga1- xAlxAs layer 22;
By making this mixed crystal ratio y higher than the above-mentioned mixed crystal ratio x, the light transmittance for the emission wavelength from the p-type Ga 1- x Al y As
Increased injection efficiency of electrons from layer 23 and p-type
It is intended to confine the minority carriers injected into the Ga 1-x Al x As layer 22.

36は、n型Ga1-yAlyAs23の電極部29に
接続される通電用配線であり、個別マイナス電極
26まで引き出されている。なお、通電用配線3
6及び個別マイナス電極26は、蒸着金属膜によ
り形成されている。
Reference numeral 36 denotes a current supply wiring connected to the electrode portion 29 of the n-type Ga 1-y Al y As 23 and led out to the individual negative electrode 26 . In addition, energizing wiring 3
6 and the individual negative electrode 26 are formed of a vapor-deposited metal film.

電極部29は、発光ダイオード部30の中心部
に位置しており、発光ダイオード30上の通電用
配線の占める面積を極力小さくするようにしてあ
る。従つて、発光ダイオード部30の発光面積は
大きく、そして発光面の形状はU字型になつてい
る。
The electrode section 29 is located at the center of the light emitting diode section 30, and is designed to minimize the area occupied by the current-carrying wiring on the light emitting diode 30. Therefore, the light emitting area of the light emitting diode section 30 is large, and the shape of the light emitting surface is U-shaped.

24は、個別マイナス電極26と電極部29以
外のn型Ga1-yAlyAs層23とを絶縁するために
設けられたフオスホ・シリケート・ガラス
(PSG)膜である。
Reference numeral 24 denotes a phosphosilicate glass (PSG) film provided to insulate the individual negative electrodes 26 from the n-type Ga 1-y Al y As layer 23 other than the electrode section 29 .

25はメサ・エツチング溝で、25aは逆メサ
方向のエツチング溝、25bは順メサ方向のエツ
チング溝であり、それぞれ各発光ダイオード部3
0をアイソレートするために設けられている。な
お、各隣接する発光ダイオード部30間には逆メ
サ方向のエツチング溝が設けられ、素子を縦断す
るように順メサ方向のエツチング溝が設けられる
ようにしなければならない。
25 is a mesa etching groove, 25a is an etching groove in the reverse mesa direction, and 25b is an etching groove in the forward mesa direction.
Provided to isolate 0. Note that etching grooves in the reverse mesa direction must be provided between adjacent light emitting diode sections 30, and etching grooves in the forward mesa direction must be provided so as to traverse the device.

よつて、各個別マイナス電極26は、電極部2
9から順メサ方向のエツチング溝25b上を通つ
て引き出されるため、メサの稜部で段切れを起こ
して断線することがない。
Therefore, each individual negative electrode 26 is connected to the electrode section 2.
Since the wire is drawn out from 9 through the etched groove 25b in the forward mesa direction, there is no chance of breakage or disconnection at the edge of the mesa.

27はp型GaAs基板21の表面に金属膜を全
面蒸着させて形成した共通プラス電極である。
A common positive electrode 27 is formed by depositing a metal film over the entire surface of the p-type GaAs substrate 21.

この構造において、個別マイナス電極26と共
通プラス電極27との間の電圧を印加して発光ダ
イオード部30に順方向電流を流せば、n型
Ga1-yAlyAs層23から電子がp型Ga1-xAlxAs層
22に注入されて発光再結合を起こし、光はメサ
部すなわちU字型の発光面から上方に放出され
る。
In this structure, if a voltage is applied between the individual negative electrodes 26 and the common positive electrode 27 to cause a forward current to flow through the light emitting diode section 30, an n-type
Electrons are injected from the Ga 1-y Al y As layer 23 into the p-type Ga 1-x Al x As layer 22 to cause radiative recombination, and light is emitted upward from the mesa portion, that is, the U-shaped light emitting surface. .

なお、個別マイナス電極26が引き出し部でL
字型になつているのは、ワイヤボンデイングが容
易に行えるようにするためである。
Note that the individual negative electrode 26 is connected to the L
The reason for the shape is to facilitate wire bonding.

実施例 1 Znドープ、キヤリア濃度2×1018cm-3である厚
さ350μmのP型GaAs基板の(100)表面に液相
エピタキシヤル成長により、キヤリア濃度5×
1016cm-3のp型Ga0.9Al0.1As層を20μmおよびキヤ
リア濃度2×1017cm-3のn型Ga0.7Al0.3As層を
3μm順次成長させた。
Example 1 A carrier concentration of 5× was deposited on the (100) surface of a 350 μm thick P-type GaAs substrate doped with Zn and having a carrier concentration of 2×10 18 cm -3 by liquid phase epitaxial growth.
A p-type Ga 0.9 Al 0.1 As layer of 10 16 cm -3 with a thickness of 20 μm and an n-type Ga 0.7 Al 0.3 As layer with a carrier concentration of 2×10 17 cm -3
It was grown sequentially to 3 μm.

この表面をメサ・エツチングして、(100)面に
対して順メサ方向である<011>方向のエツチ
ング溝を2本設け、その<011>方向に垂直な
逆メサ方向である<011>方向のエツチング溝を
2本の順メサエツチング溝間に設けた。よつて、
これらメサ・エツチング溝により、<011>方
向に一列に並ぶ発光ダイオード部が形成されたこ
とになる。なお、それぞれのメサ・エツチング溝
の深さを5μmとし、発光部の広さを45μm×70μm
とした。
This surface is mesa-etched to provide two etched grooves in the <011> direction, which is the forward mesa direction, with respect to the (100) plane, and in the <011> direction, which is the reverse mesa direction perpendicular to the <011> direction. An etched groove was provided between the two forward mesa etched grooves. Then,
These mesa-etched grooves form light emitting diode portions aligned in a row in the <011> direction. The depth of each mesa etching groove is 5 μm, and the width of the light emitting part is 45 μm x 70 μm.
And so.

次に、全表面を覆うようにPSG膜を0.2μm成長
させ、その後各発光ダイオード部の中心部分即ち
電極部上のPSG膜を5μm×10μmの広さでフツ酸
により除去した。
Next, a PSG film was grown to a thickness of 0.2 μm to cover the entire surface, and then the PSG film on the central portion of each light emitting diode portion, that is, the electrode portion, was removed using hydrofluoric acid in an area of 5 μm×10 μm.

発光ダイオード部の両側のPSG膜上には、通
電用配線として各発光ダイオード部の電極部から
順メサ方向のエツチング溝上を通つて個別マイナ
ス電極まで引き出されるよう金−ゲルマニウム合
金/ニツケル/金の金属膜を蒸着し、その厚さを
それぞれ0.1μm/0.2μm/0.5μmとした。
Gold-germanium alloy/nickel/gold metal is placed on the PSG film on both sides of the light-emitting diode section so that it can be drawn out from the electrode section of each light-emitting diode section through the etched groove in the forward mesa direction to the individual negative electrode as a conductive wiring. The films were deposited to a thickness of 0.1 μm/0.2 μm/0.5 μm, respectively.

基板の裏面全体には共通プラス電極として厚さ
がそれぞれ0.1μm/0.2μm/0.5μmである金−亜
鉛/ニツケル/金の金属膜を蒸着した。発光面は
U字型になり、通電用金属配線により発光が抑え
られる領域は10μm×30μmであり、従来に比較し
て発光面積を3倍にすることができた。
A gold-zinc/nickel/gold metal film having a thickness of 0.1 μm, 0.2 μm, and 0.5 μm, respectively, was deposited as a common positive electrode on the entire back surface of the substrate. The light-emitting surface is U-shaped, and the area in which light emission is suppressed by the current-carrying metal wiring is 10 μm x 30 μm, making the light-emitting area three times that of conventional devices.

発光ダイオード部は、1mm当り16個の割合で形
成され、1.6mm×8mmのチツプ中に128個の発光ダ
イオード部を形成することができた。
The light emitting diode sections were formed at a rate of 16 per mm, and 128 light emitting diode sections could be formed in a chip of 1.6 mm x 8 mm.

このメサ型モノリシツク発光ダイオードアレイ
の立上り電圧は1.5Vで、順方向2.0Vにおいて
10mA以上、逆耐圧が7V以上、発光波長は800mm
であつた。
The rise voltage of this mesa-type monolithic light emitting diode array is 1.5V, and the forward voltage is 2.0V.
10mA or more, reverse breakdown voltage is 7V or more, emission wavelength is 800mm
It was hot.

又、順メサ方向のエツチング上に金属膜が蒸着
されているため、段切れが生ずることがなく、歩
留り100%で2000時間使用後も断線することのな
いメサ型モノリシツク発光ダイオードを得ること
ができた。
In addition, since the metal film is deposited on the etching in the forward mesa direction, no breakage occurs, and it is possible to obtain a mesa-type monolithic light emitting diode that does not break even after 2000 hours of use with a yield of 100%. Ta.

このように、本発明の実施例であれば、従来技
術に比較して発光面積を大きくすることができ、
且つ発光効率を高めることができ、更に各発光ダ
イオード部30の特性のばらつきが少ないもので
ある。
As described above, in the embodiment of the present invention, the light emitting area can be increased compared to the conventional technology,
Moreover, the light emitting efficiency can be increased, and furthermore, there is little variation in the characteristics of each light emitting diode section 30.

上記実施例では、基板結晶としてp型GaAsを
用いたが、n型GaAsを用いることも可能で、n
型GaAsを用いた場合、共通電極側をマイナス電
極、個別電極側をプラス電極としてもよい。
In the above embodiment, p-type GaAs was used as the substrate crystal, but it is also possible to use n-type GaAs.
When type GaAs is used, the common electrode side may be used as a negative electrode, and the individual electrode side may be used as a positive electrode.

また、GaAs基板上に形成される混晶系も
GaAlAsに限られるものではなく、その他の混晶
系を用いてもよい。
In addition, the mixed crystal system formed on the GaAs substrate is also
It is not limited to GaAlAs, and other mixed crystal systems may be used.

[発明の効果] 以上に説明した如く、本発明のメサ型モノリシ
ツク発光ダイオードアレイは、p−n接合層上に
形成される通電用配線の面積を小さくしたことに
より、電流に対する発光量を大きく、且つ、発光
効率を高くすることができ、更に、各発光ダイオ
ード部の発光特性のばらつきを小さくできるとい
う顕著な効果を奏する。
[Effects of the Invention] As explained above, the mesa-type monolithic light emitting diode array of the present invention can increase the amount of light emitted with respect to current by reducing the area of the current carrying wiring formed on the pn junction layer. In addition, the light emitting efficiency can be increased, and furthermore, there is a remarkable effect that the variation in the light emitting characteristics of each light emitting diode section can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例を示す上面図、第2図
は第1図におけるB−B′断面の斜視図、、第3図
は従来例を示す上面図、第4図は第3図における
A−A′断面の斜視図である。 1…n型GaAs基板、2…n型GaAs1-xPx層、
3…n型GaAs層、4…発光再結合部、5…アイ
ソレーシヨンストライプ、6…個別プラス電極、
7…共通マイナス電極、8…光取り出し孔、9,
29…電極部、21…p型GaAs基板、22…p
型Ga1-xAlxAs層、23…n型Ga1-yAlyAs層、2
4…PSG膜、25…メサ・エツチング溝、26
…個別マイナス電極、27…共通プラス電極、3
0…発光ダイオード部、36…通電用配線。
FIG. 1 is a top view showing an embodiment of the present invention, FIG. 2 is a perspective view taken along the line B-B' in FIG. 1, FIG. 3 is a top view showing a conventional example, and FIG. It is a perspective view of the AA' cross section in FIG. 1...n-type GaAs substrate, 2...n-type GaAs 1-x P x layer,
3...n-type GaAs layer, 4...luminescence recombination section, 5...isolation stripe, 6...individual positive electrode,
7... Common negative electrode, 8... Light extraction hole, 9,
29...electrode section, 21...p-type GaAs substrate, 22...p
Type Ga 1-x Al x As layer, 23...n-type Ga 1-y Al y As layer, 2
4...PSG film, 25...Mesa etching groove, 26
...Individual negative electrode, 27...Common positive electrode, 3
0...Light emitting diode section, 36...Wiring for energization.

Claims (1)

【特許請求の範囲】[Claims] 1 GaAs基板上にp−n接合面が形成されるよ
う少なくとも一層の混晶系エピタキシヤル層が成
長され、前記p−n接合面が相直交するメサ・エ
ツチング溝により一列に並ぶ複数個の島状の発光
ダイオード部に分割されてなるモノリシツク発光
ダイオードアレイにおいて、前記発光ダイオード
部の中心部から通電用配線が前記発光ダイオード
部と平行な位置に形成されている電極領域へ引き
出されており、前記各発光ダイオード部の発光面
がU字型になるようにしたことを特徴とするモノ
リシツク発光ダイオードアレイ。
1. At least one mixed crystal epitaxial layer is grown on a GaAs substrate so as to form a p-n junction, and the p-n junction is formed into a plurality of islands aligned in a line by mesa-etched grooves orthogonal to each other. In a monolithic light emitting diode array divided into light emitting diode parts having a shape, a power supply wiring is drawn out from the center of the light emitting diode part to an electrode region formed in a position parallel to the light emitting diode part, and A monolithic light emitting diode array characterized in that the light emitting surface of each light emitting diode section is U-shaped.
JP60229727A 1984-11-26 1985-10-15 Monolithic light emitting diode array Granted JPS6288375A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP60229727A JPS6288375A (en) 1985-10-15 1985-10-15 Monolithic light emitting diode array
DE3541790A DE3541790C2 (en) 1984-11-26 1985-11-26 Solid state light emitting diode array
US07/178,648 US4984035A (en) 1984-11-26 1988-04-07 Monolithic light emitting diode array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60229727A JPS6288375A (en) 1985-10-15 1985-10-15 Monolithic light emitting diode array

Publications (2)

Publication Number Publication Date
JPS6288375A JPS6288375A (en) 1987-04-22
JPH0525189B2 true JPH0525189B2 (en) 1993-04-12

Family

ID=16896747

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60229727A Granted JPS6288375A (en) 1984-11-26 1985-10-15 Monolithic light emitting diode array

Country Status (1)

Country Link
JP (1) JPS6288375A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01140115U (en) * 1988-03-17 1989-09-26

Also Published As

Publication number Publication date
JPS6288375A (en) 1987-04-22

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