JPH0527884B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to an input signal control circuit that accepts a plurality of input data and outputs the same in response to a request.

"Prior Art" For example, a xerographic type copying machine is provided with various sensors so that the copying operation can be performed appropriately. When the operator presses the key to request the start of copying, each sensor detects the status of each part of the copier, such as the presence of copy paper, the presence of toner, and paper jams during paper transport, and then The detected data is sent to the circuit that controls the operation. Conventionally, an input signal control circuit as shown in FIG. 6 has been provided so that the outputs of such a large number of sensors can be used as needed.

FIG. 6 shows that the detection data of a large number of sensors _{1 1} to 1 _o are converted by analog/digital (A/D) converters 2 ₁ to 2 _o , respectively, and sent to the input signal control circuit 3, while the copying machine operates. This figure shows the configuration of a system in which a control circuit 4 for controlling the copying machine requests data necessary for controlling the copying machine at that time, and an input signal control circuit 3 selects and outputs the data in response.

In this way, when handling detection data from a large number of various sensors, each data is processed in advance in the input signal control circuit 3 so that it can be easily processed. This means that, for example, when 8-bit digital detection data is obtained from a certain sensor, the polarity of a particular bit or all bits is inverted and then output from the input signal control circuit. Conventionally, an input signal control circuit as shown in FIG. 7 has been used to perform such processing.

The circuit shown in FIG. 7 consists of three sensors 1 ₁ to _{1 3}
The output data of the 8-bit configuration input terminal 10 ₁ ~
10 ₃ and outputs one of them from the output terminal 20, which also has an 8-bit configuration, in response to a request.

Each input terminal 10 ₁ to 10 ₃ is a data holding circuit 11
₁ to 11 ₃ to the data bus 12. A buffer circuit 13 serving as a so-called interface is connected to this data bus 12 and connects it to an external circuit.
3 is connected to the output terminal 20. Further, a control unit 16 is provided for controlling the operation of each data holding circuit 11 ₁ to 11 ₃ and the buffer circuit 13, and this control unit 16 receives command signals such as data output requests from the control circuit of the copying machine. A control terminal 17 is provided for receiving.

The data holding circuits 11 ₁ to 11 ₃ provided in this input signal control circuit store data input to the input terminals 10 ₁ to 10 ₃ using a command signal 16 from the control unit 16.
₁ to 16 ₃ to control output to the data bus 12. For example, data holding circuit 11 ₁
is the data output command signal 16 ₁ from the control unit 16
8 bits (8 bits) (not shown) that are opened and closed by
It consists of gates. Also, the buffer circuit 13
outputs the data output onto the data bus 12 to the output terminal 20 based on the command signal 19 of the control unit 16.
It is composed of, for example, eight (eight bits) ternary buffers that are output to the buffer. Further, the control section 16 is composed of a microprocessor, a memory storing its operating program, and peripheral circuits.

To start the operation of such an input signal control circuit, first, a command signal (CS) requesting the use of this circuit is sent from the control circuit of the copying machine, and command signals (A0, A1) for specifying the sensor (hereinafter referred to as "CS") are sent from the control circuit of the copying machine. (called sensor address) and data read command signal (RD)
is input to the control terminal 17. In response, the control unit 16 sends a data output command signal 16 ₁ to, for example, the data holding circuit 11 ₁ corresponding to the sensor address. This opens the gate of the data holding circuit ₁₁₁ and transfers the data to the data bus 12.
is output to. At that timing, the control unit 16 sends a data output command signal 19 to the buffer circuit 13.
Output. In this way, data is output through the output terminal 20.

For example, if you want to invert the polarity of all data input to the data holding circuit 11 ₁ of such an input signal control circuit, this data holding circuit 1
1. Attach 8 inverters (for 8 bits) externally to the input section of ₁ . If the polarity is to be inverted only for specific bits, inverters for that number of bits must be externally connected. For the other data holding circuits 11 ₂ and 11 ₃ , appropriate inverters are externally attached according to predetermined specifications.

"Problems to be Solved by the Invention" During the manufacturing process of such input signal control circuits, it is necessary to externally attach an inverter to a predetermined data retention circuit according to the specifications, but the installation location of the inverter is If the wiring is irregular and in large quantities, there is a problem that wiring errors are likely to occur. In addition, even if it becomes necessary to add an inverter or change the mounting location due to design changes to the external circuit of a copying machine, etc., if there is no extra space on the printed circuit board for external installation, the printed circuit board There was a problem that even the specifications had to be changed.

In addition, this type of input signal control circuit is used not only in copying machines but also in various devices such as facsimile machines and printers, but the specifications for external inverters etc. for each model of each device are different. Because of these differences, separate production lines had to be set up, which hindered cost reduction.

The present invention has been made focusing on the above points,
It is an object of the present invention to provide a simplified and highly versatile input signal control circuit.

Another object of the present invention is to provide an input signal control circuit in which the operation of the data polarity conversion circuit can be arbitrarily set by software.

"Means for Solving the Problems" The input signal control circuit of the present invention controls a data bus, a plurality of data polarity conversion circuits connected thereto, a bidirectional buffer circuit, and input/output operations of these data. Each of the data polarity conversion circuits has a data input terminal, and polarity information that stores polarity information that determines the polarity of each bit when data input from the input terminal is output to the data bus. The bidirectional buffer circuit is composed of a storage section and a polarity setting section that respectively determines the polarity of each bit of data input from the input terminal based on the polarity information stored in the polarity information storage section. The data polarity conversion circuit outputs the data to the data bus to an external circuit, or inputs polarity information from the external circuit to the data bus in response to a command from the data polarity conversion circuit.

Here, it is preferable that the polarity information storage section operates so as to rewrite the polarity information stored therein to predetermined constant content when a reset command signal is input.

Furthermore, for example, each data polarity conversion circuit has its own polarity information storage section, and two or more types of polarity information input from the bidirectional buffer circuit are selectively stored in these polarity information storage sections. or so that the polarity information to be stored in the polarity information storage section of all data polarity conversion circuits has the same content, so that all data polarity conversion circuits share one polarity information storage section. It is preferable to

"Operation" The input signal control circuit of the present invention configured as described above is provided with two or more input terminals for inputting predetermined data, respectively, and the polarity of the data inserted between these input terminals and the data bus is The conversion circuits can all have a constant and identical configuration.

Before using this input signal control circuit, polarity information is sent to each data polarity conversion circuit individually or all at once through a bidirectional buffer circuit. Each data polarity conversion circuit stores its polarity information in a built-in polarity information storage section. Based on this polarity information, the polarity of each bit of data input to the input terminal is determined and output to an external circuit via a data bus and a bidirectional buffer circuit.

A command signal for rewriting the polarity information of a predetermined data polarity conversion circuit is also sent from the external circuit as necessary. This input signal control circuit can meet such demands without adding hardware or the like.

"Embodiment" (Block Diagram and Outline of Operation) FIG. 1 is a block diagram showing an embodiment of the input signal control circuit of the present invention. In the embodiment shown in this figure, for convenience of explanation, data is input from three sensors 1 ₁ to 1 ₃ and these data are input to three data polarity conversion circuits 30.
An example is shown in which the data is sent to ₁ to ₃₀₃ , respectively.

These three data polarity conversion circuits 30 ₁ to 30 ₃ are connected to the data bus 12.
A bidirectional buffer circuit 40 is connected to.
The bidirectional buffer circuit 40 is a circuit capable of transmitting and receiving signals from both its input/output terminal 42 and the data bus 12, and latches the signal into the buffer 41 each time the signal is transmitted and received.

Further, the data polarity conversion circuits 30 ₁ to 30 ₃ are connected to the conversion units 31 ₁ to 31 ₃ and the polarity information storage unit 32, respectively.
₁ to 32 ₃ . This polarity information storage section 3
2 ₁ to 32 ₃ are memory circuits that store polarity information that determines the polarity of a signal for each bit when data input from the input terminal of the data polarity conversion circuit is output to the data bus 12. Also,
The converting units 31 ₁ to 31 ₃ are connected to this polarity information storage unit 32
This circuit converts the polarity of data input from the input terminal of the data polarity conversion circuit based on the polarity information stored in ₁ to ₃₂₃ .

The control unit 50 controls the data output operations of the data polarity conversion circuits 30 ₁ to 30 ₃ and the bidirectional buffer circuit 40, as well as controlling the data output operations of the data polarity conversion circuits 30 1 to 30 3 and the bidirectional buffer circuit ₄₀ , as described above with reference to FIG. It also controls the operation of storing polarity information in the polarity information storage units 32 ₁ to 32 ₃ of 30 ₃ to 30 3 . This control terminal has a sensor address signal 51 that instructs which data polarity conversion circuit should output data to the data bus 12.
₄ and the data read command signal ₅₁₁ for outputting the data to the external circuit are inputted as described above with reference to FIG. Furthermore, this control terminal receives a polarity information input command signal 51 ₂ for instructing the input operation of polarity information, and a polarity information storage section 32 1 to ₃ of each data polarity conversion circuit 30 ₁ to 30 ₃ .
2 Reset command signal 51 instructing to rewrite the polarity information stored in ₃ all at once to a certain content.
₃ enters.

In the input signal control circuit having the above configuration, first, before starting its use, each data polarity conversion circuit 30
Polarity information storage units 32 ₁ to 3 provided in ₁ to 30 ₃
2 Enter the specified polarity information in ₃ .

In this operation, polarity information is sent from the external circuit to the bidirectional buffer circuit 40, and at the same time, a polarity information input command 51 ₂ and a sensor address 51 ₄ of the data polarity conversion circuit in which this polarity information is to be stored are sent. is started by inputting it to the control terminal of the control section 50. The control unit 50 outputs a polarity information input command signal 50 ₄₂ to the bidirectional buffer circuit 40 to input it to the polarity information data bus 12 through the buffer 41 . At the same time, for example, a data polarity conversion circuit 30 stores the polarity information.
₁ , an information storage command signal 50 ₁ is output.
This allows the polarity information to be transferred to the bidirectional buffer circuit 40.
The data is sent from the buffer 41 via the data bus 12 to the polarity information storage section 32 ₁ of the data polarity conversion circuit 30 ₁ and stored therein. Similar operations are performed for the other two data polarity conversion circuits. In this way, predetermined polarity information specified by the external circuit is stored in each of the data polarity conversion circuits 30 ₁ to 30 ₃ .

After that, when the data from the sensors _{1 1} to 1 ₃ is input to the data polarity conversion circuits 30 ₁ to 30 ₃ ,
The conversion units 31 ₁ to 31 ₃ are polarity information storage units 32 ₁
The polarity of this data is changed based on the polarity information stored in ₃₂₃ , and is outputted to the data bus 12 if there is a request from the control unit 50. When a data read command signal ₅₁₁ is input from an external circuit, the control unit 50 controls the data polarity conversion circuit 3, for example.
When a data output command signal 50 ₁ is sent to 0 ₁ ,
Data is output from this data polarity conversion circuit 30 ₁ to the data bus 12 . Next, output command signal 50
₄₁ outputs this to an external circuit through a bidirectional buffer circuit 40.

Further, when the reset command signal ₅₁₃ is inputted to the control terminal of the control unit 50 from the external circuit, the control unit 50
outputs this reset command signal ₅₁₃ to all data polarity conversion circuits ₃₀₁ to ₃₀₃ . As a result, the polarity information stored in the polarity information storage units 32 ₁ to 32 ₃ of each data polarity conversion circuit 30 ₁ to 30 ₃ is all cleared to, for example, “0”.

In this way, the input signal control circuit of the present invention can freely set and change the various polarity conversion conditions to be performed by each data polarity conversion circuit 30 ₁ to 30 ₃ using polarity information from an external circuit. I can do it.

(Specific Circuit Example) FIG. 2 is a wiring diagram showing the embodiment of FIG. 1 in more detail.

In the figure, data polarity conversion circuits 30 ₁ to 30 ₃
are provided with input terminals 10 ₁ to 10 ₃ of 8-bit configuration, from which 8-bit digitized sensor detection data is input. For example, the data polarity conversion circuit 30 ₁ is provided with conversion units 31 ₁₁ to 31 ₁₈ for each bit, and each conversion unit 31 ₁₁ to 3
1 ₁₈ are connected to input polarity information one by one from the polarity information storage section 32 ₁ . The same applies to the other data polarity conversion circuits 30 ₂ and 30 ₃ . Similarly, the bidirectional buffer circuit 40 is also provided with an 8-bit input/output terminal 42.
2 is connected to an external circuit. The control terminal 51 of the control unit 50 is also connected to its external circuit, and receives a command signal (CS) 51 ₀ indicating the use of this circuit, a data read command signal (RD) 51 ₁ , and a reset command signal (RST) 51 _{3 .} , and polarity information input command signal (WR) 51 ₂ each consist of 1 bit, and the sensor address signal 51 ₄ (A0, A1) consists of 2 bits.

FIG. 3 is a block diagram showing the operating principle of the data polarity conversion circuit ₃₀₁ .

First, the content of the polarity information 61 is set to, for example, "00001111". This is stored in the polarity information storage unit ₃₂₁ and converted to the converter 3 by 1 bit each.
Sent from 1 ₁₁ to 31 ₁₈ . The converting units 31 ₁₅ to 31 ₁₈ to which the polarity information of “0” has been input send the data to the gate 34 with the same polarity, and the converting units 31 ₁₁ to 31 ₁₄ to which the polarity information of “1” has been input (“×” ”
) is the gate 34 by inverting the polarity of the data.
send to The polarity information storage unit 32 ₁ stores this polarity information 6
1 is stored by the polarity information input command signal 50 ₁₁ and cleared to zero by the reset command signal 50 ₁₃ . When the polarity information 32 ₁ is cleared to zero, all data input from the input terminal 10 ₁ is sent to the gate 34 as is. The reset command signal ₅₀₁₃ may be used to set the polarity information 61 to all "1s" instead of clearing it to zero. At that time, all data will be sent to the gate with polarity reversed. This gate 34 is opened and outputs data when the data output command signal ₅₀₁₂ is input.

FIG. 4 is a schematic diagram of the configuration of the bidirectional buffer circuit 40, in which eight (in the case of 8 bits) input and output signal transmission paths are provided between the data bus 12 and the input/output terminal 42. The circuit is constructed by inserting eight ternary buffers 41 ₁₁ and 41 ₁₂ into each signal transmission path. Each three-value buffer 41 ₁₁ , 41 ₁₂
maintain a high impedance state when no output command signal 50 ₄₁ or input command signal 50 ₄₂ is input to their respective control terminals. In this way, to control this bidirectional buffer circuit 40, it is necessary to draw two signal lines for input or output command signals from the control section 50 (Fig. 2), but only one signal line is shown in Fig. 2. Ta. Of course, FIG. 4 is a diagram of the principle of the bidirectional buffer circuit 40, and various circuit elements having similar functions may be substituted.

FIG. 5 shows a converter 31 that converts the polarity of one bit of data in the data polarity converter circuit shown in FIG.
₁₁ and a polarity information storage unit 32 ₁ that stores one bit of polarity information of the conversion unit 31 ₁₁ are integrated. That is, each of the data polarity conversion circuits 30 ₁ to 30 ₃ shown in FIG. 2 is provided with eight sets of circuits having the same configuration.

In this circuit, an inverter 71, two NOR circuits 72 and 74, an AND circuit 73, and a ternary inverter 75 are provided in this order in a data transmission path. Also, in order to store polarity information, 3
A value inverter 77 and a NAND circuit 78 are provided. In addition, a ternary buffer 76 for receiving polarity information from the data bus 12 and an inverter 79 for receiving a reset command signal are also provided.
and is provided. Here, ternary inverter 7
5, 77 are the control terminals 75 ₁ , 77 ₁
When "1" is input to the control terminals, the input signal is inverted and output, and when "0" is input to the control terminals 75 ₁ and 77 ₁ , the output is stopped.It is equipped with the three functions of a so-called gate, buffer, and inverter. .
Further, the ternary buffer 76 has both the functions of a buffer and a gate.

When polarity information is first input, "0" is input to the control terminal ₇₅₁ of the ternary inverter 75, the gate is closed, and data output is cut off. Also, at this time, the ternary buffer 7
When "1" is input to the control terminal 76 ₁ of 6, its gate opens, and the polarity information of 12 on the bus line (for example, its value is "1") is sent to the NAND circuit 7
Input to input terminal 8. At this time, " ₁ " is input to the control terminal 771 of the ternary inverter 77, and its gate is opened, and "0" is input to the inverter 79, and the other gate of the NAND circuit 78 is input. “1” is also input to the input terminal.

As a result, "0" is output from the NAND circuit 78, and this signal is input to the ternary inverter 77, whose output becomes "1". This output is again input to the NAND circuit 78. This action is repeated,
The output of the NAND circuit 78 is always "0". In this way, polarity information is stored in the loop made up of the NAND circuit 78 and the ternary inverter 77.

The output "0" of this NAND circuit 78 is connected to a NOR circuit 72 and an AND circuit 7 provided in the data transmission path.
Enter 3. Here, for example, when data "1" is input from the input terminal, the output of the inverter 71 becomes "0", the output of the NOR circuit 72 becomes "1", and the output of the AND circuit 73 becomes "0". Since both of these input to the next NOR circuit 74, its output is “0”
becomes. Here, when this data is output to the data bus 12, "1" is input to the control terminal 75 ₁ of the ternary inverter 75, and "0" is input to the control terminal 76 ₁ of the ternary buffer 76. In this way, the gate of the ternary inverter 75 opens and data "1" is output from there to the data bus.

Furthermore, when the content of the polarity information input to the NAND circuit 78 is "0", its output is always "1". In this case, the "1" is input to the NOR circuit 72 and the AND circuit 73 on the data transmission path. Since the data output from the inverter 71 is "0", the output of the NOR circuit 72 and the output of the AND circuit 73 are also "0". Therefore, the subsequent output of the NOR circuit 74 becomes "1", and the ternary inverter 75 outputs "0".

That is, when the polarity information inputted from the bus line 12 is "1", the data is outputted from this data polarity conversion circuit with the same polarity, and when the polarity information is "0", the polarity is inverted and outputted.

Furthermore, when the reset signal "1" is input from the inverter 79, its output becomes "0", and the output of the NAND circuit 78 is always "1", so that the polarity of the input data is unconditionally inverted and output.

As described above, the circuits shown in FIG. 5 connected to the input terminals of each data polarity conversion circuit,
By storing polarity information, converting input data, outputting data to the bus line 12, etc., it is possible to perform a series of data input/output operations as previously explained using FIG. .

In this embodiment, if the reset signal is to be used to output data without changing the polarity, one inverter may be inserted at point "Q" in the figure. For example, in a data polarity conversion circuit having 8 sets of such circuits, it is possible to freely set the data conversion after reset to various specific contents by turning on or off this inverter for each bit. is possible.

(Modification) The present invention is not limited to the above embodiments.

In the conversion section of the data polarity conversion circuit, it is possible to employ various known circuits that output data with the polarity unchanged or inverted. Further, the polarity information storage unit can store polarity information during the operation of the data polarity conversion path, and can employ various circuit elements such as a random access memory (RAM) or a flip-flop circuit. . The converter has a circuit configuration that allows the polarity of data to be selected in accordance with the polarity information in accordance with the configuration of the polarity information storage unit. Furthermore, the data input to the input terminal of the data polarity conversion circuit can be selected as appropriate, whether it is 1 bit, 4 bits, or 16 bits, and the input terminals of all data polarity conversion circuits do not necessarily input data with the same number of bits. There's no need to do that.

Additionally, the bidirectional buffer circuit is a circuit that accepts polarity information from an external circuit and outputs it to the data bus.
Any device may be used as long as it has a function of outputting data on the data bus to an external circuit. For example, it may be one that temporarily latches these input/output data. Furthermore, the input/output buffers do not necessarily have to be constructed in one piece. That is, a circuit that accepts polarity information may be connected to the data bus, and a circuit that outputs data may be separately connected to the data bus, and both may be operated at predetermined timing by the control section. In this case, there is no problem even if the input and output terminals of the bidirectional buffer circuit are separate.

Furthermore, in the above embodiment, it has been explained that the polarity information is stored individually for each data polarity conversion circuit, but for example, when inputting the same polarity information to all data polarity conversion circuits, the polarity information is stored all at once. A storage operation may be performed, and in this case, only one polarity information storage section may be provided, and all data polarity conversion circuits may share this section.

"Effects of the Invention" The input signal control circuit of the present invention described above can have the same structure for each data polarity conversion circuit inserted between a plurality of input terminals and a data bus. Cost reduction is possible through mass production.

Furthermore, since there is no need to separately attach inverters externally, there is no possibility of miswiring or the like. Further, since it is not necessary to externally attach such parts, it also has the advantage that the design of the circuit board becomes easy. Of course, this also allows the circuit itself to be made smaller. Furthermore, the manufacturing process of the input signal control circuit can be simplified, and its reliability can also be improved.

Furthermore, since the data can be arbitrarily processed using command signals from an external circuit, the number of bits of the digital data output from the sensor may be 4, 8,
This input signal control circuit can be used in common even in different cases such as 12 bits. Of course, even if there is a change in the required data format due to a design change, etc., it is only necessary to change the program on the external circuit side, and it has the advantage of being extremely versatile.

[Brief explanation of drawings]

FIG. 1 is a block diagram for explaining the outline of the input signal control circuit of the present invention, FIG. 2 is a wiring diagram showing a more specific embodiment thereof, and FIG. 3 is a specific implementation of the data polarity conversion circuit. A wiring diagram showing an example, FIG. 4 is a wiring diagram showing a specific example of a bidirectional buffer circuit, FIG. 5 is a main part wiring diagram showing a more specific example of a data polarity conversion circuit, and FIG. 6 7 is a schematic configuration diagram of a system suitable for using the input signal control circuit of the present invention, and FIG. 7 is a block diagram showing an example of a conventional input signal control circuit. 3...Input signal control circuit, 12...Data bus, 30 ₁ to 30 ₃ ...Data polarity conversion circuit, 31
₁ to 31 ₃ ... conversion section, 32 ₁ to 32 ₃ ... polarity information storage section, 40 ... bidirectional buffer circuit, 50 ...
control section.

Claims (1)

[Claims] 1 Consists of a data bus, a plurality of data polarity conversion circuits connected to the data bus, a bidirectional buffer circuit, and a control unit that controls data input/output operations in these. a polarity information storage unit having a terminal and storing polarity information that determines the polarity of each bit when data input from the input terminal is output to the data bus; and polarity information stored in the polarity information storage unit. and a polarity setting section that respectively determines the polarity of each bit of data input from the input terminal based on the polarity setting section, and the bidirectional buffer circuit converts the data from the data polarity conversion circuit according to a command from the control section. An input signal control circuit characterized by outputting data output to a bus to an external circuit, or inputting polarity information from an external circuit to a data bus.