JPH0527971B2 - - Google Patents
Info
- Publication number
- JPH0527971B2 JPH0527971B2 JP59152276A JP15227684A JPH0527971B2 JP H0527971 B2 JPH0527971 B2 JP H0527971B2 JP 59152276 A JP59152276 A JP 59152276A JP 15227684 A JP15227684 A JP 15227684A JP H0527971 B2 JPH0527971 B2 JP H0527971B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type
- etching
- silicon substrate
- conductive layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
Landscapes
- Pressure Sensors (AREA)
- Weting (AREA)
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明はシリコン基板を電気化学的にエツチン
グする方法に関する。特にダイアフラム型シリコ
ン圧力センサのダイアフラム形成の際の電気化学
エツチングに関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for electrochemically etching silicon substrates. In particular, it relates to electrochemical etching when forming a diaphragm of a diaphragm type silicon pressure sensor.
(従来技術)
従来、ダイアフラム型シリコン圧力センサのダ
イアフラム形成は化学エツチングや放電加工や電
気化学エツチングにより行なわれていた。(Prior Art) Conventionally, the diaphragm of a diaphragm type silicon pressure sensor has been formed by chemical etching, electrical discharge machining, or electrochemical etching.
しかしながら化学エツチングや放電加工ではダ
イアフラムの厚さを正確に制御するのは困難で、
所定の厚さに達した時にエツチングが停止する電
気化学エツチングの手法が使われだした(アイイ
ーイーイー・エレクトロン・デバイス・レターズ
(IEEE ELECTRON DEVICE LETTERS,
VOL.EDL−2,No.2,FEB.,1981,44〜45))。 However, it is difficult to accurately control the thickness of the diaphragm using chemical etching or electrical discharge machining.
Electrochemical etching techniques, in which etching stops when a predetermined thickness is reached, have begun to be used (IEEE ELECTRON DEVICE LETTERS).
VOL.EDL-2, No.2, FEB., 1981, 44-45)).
第3図a,bに従来の電気化学エツチングの方
法を示す。 Figures 3a and 3b show a conventional electrochemical etching method.
シリコン基板100はP型層とN型層とから構
成されていて、N型層側には金属膜101が付着
されている。金属膜101に正極性の電圧を印加
し、負極性側はプラチナ電極102が用いられ
る。エツチング液103は回転子104により撹
拌されエツチングが均一に進む様になつている。
エツチング液にはエチレンジアミン・ピロカテコ
ールが用いられる。金属膜101は電圧を印加す
る為の電極として働らくと共にエツチングに対す
る保護膜として働らく。第3図aに於てはN型層
が保護されP型層がエツチングされる。P型層が
全てエツチングされN型層が露出するとエツチン
グが停止し、N型層のみが残る。印加電圧は
0.5Vである。 The silicon substrate 100 is composed of a P-type layer and an N-type layer, and a metal film 101 is attached to the N-type layer side. A positive polarity voltage is applied to the metal film 101, and a platinum electrode 102 is used on the negative polarity side. The etching liquid 103 is stirred by a rotor 104 so that etching proceeds uniformly.
Ethylenediamine/pyrocatechol is used as the etching solution. The metal film 101 serves as an electrode for applying voltage and also as a protective film against etching. In FIG. 3a, the N-type layer is protected and the P-type layer is etched. When the P-type layer is completely etched and the N-type layer is exposed, the etching stops and only the N-type layer remains. The applied voltage is
It is 0.5V.
第3図bはこの電気化学エツチングを用いてダ
イアフラム型シリコン圧力センサのダイアフラム
を形成した例である。 FIG. 3b shows an example in which a diaphragm of a diaphragm type silicon pressure sensor is formed using this electrochemical etching.
P型シリコン基板105の表面に熱拡散または
エピタキシヤル成長によりN型シリコン層106
を形成し、感圧素子となるP型拡散抵抗107を
形成する。P型シリコン基板105の裏面のエツ
チングしない部分を酸化膜108で保護する。エ
ツチング液にエチレンジアミン・ピロカテコール
を用いると、P型シリコン基板105は異方性エ
ツチングされる。例えば基板の面方位を(100)
面とすると傾斜部は(111)面で54.7゜の角度を成
す。P型シリコン基板が除去されN型シリコン層
が露われるとエツチングが停止し、N型層が残
る。 An N-type silicon layer 106 is formed on the surface of the P-type silicon substrate 105 by thermal diffusion or epitaxial growth.
A P-type diffused resistor 107 which becomes a pressure sensitive element is formed. A portion of the back surface of the P-type silicon substrate 105 that will not be etched is protected with an oxide film 108. When ethylenediamine-pyrocatechol is used as the etching solution, the P-type silicon substrate 105 is anisotropically etched. For example, if the plane orientation of the board is (100)
When considered as a plane, the inclined part forms an angle of 54.7° with the (111) plane. Once the P-type silicon substrate is removed and the N-type silicon layer is exposed, etching stops, leaving the N-type layer.
ダイアフラム型シリコン圧力センサの圧力・電
気変換感度はダイアフラムの厚さの2乗に反比例
するので感度ばらつきを低減する為には正確にダ
イアフラム厚を制御する必要がある。電気化学エ
ツチングの手法を用いればダイアフラムの厚さは
N型シリコン層106の厚さで正確に規定され
る。N型シリコン層106をエピタキシヤル成長
の技術により形成すれば厚さは10%以内の精度で
制御でき、感度ばらつきの少ないダイアフラム型
圧力センサが得られる。 Since the pressure-to-electrical conversion sensitivity of a diaphragm type silicon pressure sensor is inversely proportional to the square of the diaphragm thickness, it is necessary to accurately control the diaphragm thickness in order to reduce sensitivity variations. Using the electrochemical etching technique, the thickness of the diaphragm is precisely defined by the thickness of the N-type silicon layer 106. If the N-type silicon layer 106 is formed by epitaxial growth technology, the thickness can be controlled with an accuracy of within 10%, and a diaphragm pressure sensor with less variation in sensitivity can be obtained.
(従来技術の問題点)
第3図aに示すように従来は電極コンタクトを
得る為に金属膜を蒸着等により付着していた。そ
うするとP型層のエツチング後は、この金属膜
は、無用な歪を発生しない様に除去しなくてはな
らない。また金属膜はエツチング液に対して耐腐
食性のある材料でなくてはならない等の欠点があ
つた。(Problems with the Prior Art) As shown in FIG. 3a, in the past, a metal film was deposited by vapor deposition or the like in order to obtain an electrode contact. Then, after etching the P-type layer, this metal film must be removed so as not to cause unnecessary strain. Further, the metal film has the disadvantage that it must be made of a material that is resistant to corrosion by the etching solution.
(発明の目的)
本発明の目的は上記欠点を除去し、金属膜を使
用せず電極コンタクトの得られる方法を提供する
ことにある。(Objective of the Invention) An object of the present invention is to eliminate the above-mentioned drawbacks and to provide a method by which electrode contact can be obtained without using a metal film.
(発明の構成)
本発明によれば第1の導電層と、これと逆導電
型の第2の導電層とから成る2層シリコン基板の
前記第1の導電層と同一導電型の高濃度拡散層を
前記第1の導電層の非活性領域に形成し電極と
し、電気化学エツチングにより前記第2の導電層
を除去し、前記第1の導電層を残すことを特徴と
したエツチングの方法が得られる。(Structure of the Invention) According to the present invention, a high concentration diffusion of the same conductivity type as the first conductive layer of a two-layer silicon substrate consisting of a first conductive layer and a second conductive layer of the opposite conductivity type. A method of etching is provided, characterized in that a layer is formed in a non-active area of the first conductive layer as an electrode, and the second conductive layer is removed by electrochemical etching, leaving the first conductive layer. It will be done.
(実施例)
次に本発明について図面を参照して実施例を挙
げて説明する。(Example) Next, the present invention will be described by giving examples with reference to the drawings.
第1図a,bは本発明の第1の実施例を示すシ
リコン基板の構造である。シリコン基板比抵抗1
は厚い(100)P型単結晶シリコン層4と厚さ
20μm、4Ω・cmのN型エピタキシヤル層3とか
らなる2層シリコン基板である。当該シリコン基
板1の周辺部は燐の熱拡散等によりN型高濃度拡
散層2を形成し、低抵抗の電極領域としている。
ダイアフラムを形成するにはN型高濃度拡散層に
電極配線を施し、第3図aに示すような従来の電
気化学エツチング法によりP型シリコン層を除去
し、N型エピタキシヤル層を残せば良い。シリコ
ン基板の周辺部はピンセツト等で取扱う時に傷付
くので良品は取れないので電極領域とすることに
よる損失はない。またエツチング液には一例とし
てヒドラジン水和物を用いれば保護膜はシリコン
酸化膜で良く、N型高濃度拡散層の表面には拡散
層形成時の押込み酸化中に熱酸化膜が形成される
ので、改らためて保護膜を被覆する必要はない。
第1図に於ては図示しなかつたN型エピタキシヤ
ル層には第3図の従来例に示す様な感圧素子とな
るP型拡散抵抗が形成してある。電極接続部及び
配線部は樹脂、ワツクス等で絶縁保護する必要が
ある。 FIGS. 1a and 1b show the structure of a silicon substrate showing a first embodiment of the present invention. Silicon substrate specific resistance 1
is the thick (100) P-type single crystal silicon layer 4 and the thickness
It is a two-layer silicon substrate consisting of an N-type epitaxial layer 3 of 20 μm and 4 Ω·cm. An N-type high concentration diffusion layer 2 is formed in the peripheral portion of the silicon substrate 1 by thermal diffusion of phosphorus, etc., and serves as a low resistance electrode region.
To form a diaphragm, electrode wiring is applied to the N-type heavily doped diffusion layer, and the P-type silicon layer is removed by conventional electrochemical etching as shown in Figure 3a, leaving the N-type epitaxial layer. . Since the periphery of the silicon substrate is damaged when handled with tweezers or the like, good products cannot be obtained, so there is no loss by using it as an electrode region. Furthermore, if hydrazine hydrate is used as the etching solution, the protective film may be a silicon oxide film, and a thermal oxide film is formed on the surface of the N-type high concentration diffusion layer during the indentation oxidation during formation of the diffusion layer. , there is no need to apply a protective film again.
In the N-type epitaxial layer (not shown in FIG. 1), a P-type diffused resistor is formed which becomes a pressure-sensitive element as shown in the conventional example shown in FIG. Electrode connection parts and wiring parts must be insulated and protected with resin, wax, etc.
N型高濃度拡散層を設ける場所としてはシリコ
ン基板の周辺部の1か所でも良いがN型エピタキ
シヤル層の厚さが薄くなると抵抗が高くなり電流
が流れ難くなり、電極接続部から遠い所では電流
が充分に供給されず陽極酸化膜が形成され難くな
り、エツチングが停止せず均一な膜厚を得られな
いので円環状の方が良い。 The N-type high-concentration diffusion layer can be provided in one place on the periphery of the silicon substrate, but as the thickness of the N-type epitaxial layer becomes thinner, the resistance increases and it becomes difficult for current to flow, so it is recommended to place it in a place far from the electrode connection area. In this case, a sufficient current is not supplied, making it difficult to form an anodic oxide film, and etching does not stop, making it impossible to obtain a uniform film thickness, so a circular shape is better.
第2図は本発明の第2の実施例を示すシリコン
基板の構造である第1図と同一番号は同一構成要
素である。第1図と異なる点はN型高濃度拡散層
2を、シリコン基板の周辺部だけでなく不活性領
域である切断領域にも設けた点である。切断領域
の幅は通常20〜80μmであり、N型高濃度拡散層
のシート抵抗を数Ω/□にするとシリコン基板の
中央部にも十分な電流を供給できる。本実施例は
基板の直径が大きい場合に特に有効である。断面
構造は第1図と同様である。 FIG. 2 shows the structure of a silicon substrate showing a second embodiment of the present invention. The same reference numerals as in FIG. 1 indicate the same components. The difference from FIG. 1 is that the N-type heavily doped diffusion layer 2 is provided not only in the periphery of the silicon substrate but also in the cut region, which is an inactive region. The width of the cutting region is usually 20 to 80 μm, and if the sheet resistance of the N-type heavily doped diffusion layer is several Ω/□, a sufficient current can be supplied even to the center of the silicon substrate. This embodiment is particularly effective when the diameter of the substrate is large. The cross-sectional structure is the same as that in FIG.
(発明の効果)
本発明のエツチング方法を用いればダイアフラ
ム型シリコン圧力センサや他の薄膜状デバイスを
電気化学的な手法で製造する際に金属膜を用いず
にシリコン基板の面内に均一の電流を供給でき均
一な膜厚を得られる。(Effects of the Invention) If the etching method of the present invention is used, a uniform current can be generated within the plane of the silicon substrate without using a metal film when manufacturing diaphragm silicon pressure sensors or other thin film devices using an electrochemical method. can be supplied and a uniform film thickness can be obtained.
第1図は本発明の第1の実施例であるシリコン
基板の構造図で、第2図は本発明の第2の実施例
を示すシリコン基板の構造図である。第3図a,
bは従来の電気化学エツチングの方法を示す図。
1…シリコン基板、2…N型高濃度拡散層、3
…N型エピタキシヤル層、4…P型シリコン層、
100…シリコン基板、101…金属膜、102
…プラチナ電極、103…エツチング液、104
…回転子、105…P型シリコン基板、106…
N型シリコン層、107…P型拡散抵抗、108
…酸化膜。
FIG. 1 is a structural diagram of a silicon substrate according to a first embodiment of the present invention, and FIG. 2 is a structural diagram of a silicon substrate according to a second embodiment of the present invention. Figure 3a,
b is a diagram showing a conventional electrochemical etching method. 1... Silicon substrate, 2... N-type high concentration diffusion layer, 3
...N type epitaxial layer, 4...P type silicon layer,
100...Silicon substrate, 101...Metal film, 102
...Platinum electrode, 103...Etching liquid, 104
...Rotor, 105...P-type silicon substrate, 106...
N-type silicon layer, 107...P-type diffused resistance, 108
…Oxide film.
Claims (1)
電層とから成る2層シリコン基板の前記第1の導
電層と同一導電型の高濃度拡散層を前記第1の導
電層の非活性領域に形成して電極とし、電気化学
エツチングにより前記第2の導電層を除去し、前
記第1の導電層を残すことを特徴としたエツチン
グの方法。1 A high concentration diffusion layer of the same conductivity type as the first conductive layer of a two-layer silicon substrate consisting of a first conductive layer and a second conductive layer of the opposite conductivity type is added to the first conductive layer. An etching method characterized in that the second conductive layer is formed in a non-active region to serve as an electrode, and the second conductive layer is removed by electrochemical etching, leaving the first conductive layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59152276A JPS6130039A (en) | 1984-07-23 | 1984-07-23 | Etching method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59152276A JPS6130039A (en) | 1984-07-23 | 1984-07-23 | Etching method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6130039A JPS6130039A (en) | 1986-02-12 |
| JPH0527971B2 true JPH0527971B2 (en) | 1993-04-22 |
Family
ID=15536966
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59152276A Granted JPS6130039A (en) | 1984-07-23 | 1984-07-23 | Etching method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6130039A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61137329A (en) * | 1984-12-10 | 1986-06-25 | Yokogawa Electric Corp | Fine processing method for semiconductor |
| JPH01145873A (en) * | 1987-12-02 | 1989-06-07 | Yokogawa Electric Corp | Manufacture of semiconductor pressure sensor |
| EP1119032B8 (en) * | 1992-04-22 | 2008-03-19 | Denso Corporation | A method for producing a semiconductor device |
-
1984
- 1984-07-23 JP JP59152276A patent/JPS6130039A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6130039A (en) | 1986-02-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |